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author | Richard Sandiford <richard.sandiford@arm.com> | 2023-03-30 11:09:07 +0100 |
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committer | Richard Sandiford <richard.sandiford@arm.com> | 2023-03-30 11:09:07 +0100 |
commit | 36043bcff490e6c588d5b52318fbba233f478fab (patch) | |
tree | b5c6dbb699f41671e10ad88dec5a48ef8aed3c33 /include | |
parent | c1817dc2ee18c27087de913bc970a87e67374b57 (diff) | |
download | gdb-36043bcff490e6c588d5b52318fbba233f478fab.zip gdb-36043bcff490e6c588d5b52318fbba233f478fab.tar.gz gdb-36043bcff490e6c588d5b52318fbba233f478fab.tar.bz2 |
aarch64: Deprioritise AARCH64_OPDE_REG_LIST
SME2 has many instructions that take a list of SVE registers.
There are often multiple forms, with different forms taking
different numbers of registers.
This means that if, after a successful parse and qualifier match,
we find that the number of registers does not match the opcode entry,
the associated error should have a lower priority/severity than other
errors reported at the same stage. For example, if there are 2-register
and 4-register forms of an instruction, and if the assembly code uses
the 2-register form with an out-of-range value, the out-of-range value
error against the 2-register instruction should have a higher priority
than the "wrong number of registers" error against the 4-register
instruction.
This is tested by the main SME2 patches, but seemed worth splitting out.
Diffstat (limited to 'include')
-rw-r--r-- | include/opcode/aarch64.h | 14 |
1 files changed, 9 insertions, 5 deletions
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h index 60c77ca..10c7983 100644 --- a/include/opcode/aarch64.h +++ b/include/opcode/aarch64.h @@ -1284,6 +1284,14 @@ struct aarch64_inst No syntax error, but the operands are not a valid combination, e.g. FMOV D0,S0 + The following errors are only reported against an asm string that is + syntactically valid and that has valid operand qualifiers. + + AARCH64_OPDE_REG_LIST + Error about the register list operand having an unexpected number of + registers. This error is low severity because there might be another + opcode entry that supports the given number of registers. + AARCH64_OPDE_UNTIED_IMMS The asm failed to use the same immediate for a destination operand and a tied source operand. @@ -1299,10 +1307,6 @@ struct aarch64_inst Error about some immediate value not properly aligned (i.e. not being a multiple times of a certain value). - AARCH64_OPDE_REG_LIST - Error about the register list operand having unexpected number of - registers. - AARCH64_OPDE_OTHER_ERROR Error of the highest severity and used for any severe issue that does not fall into any of the above categories. @@ -1330,11 +1334,11 @@ enum aarch64_operand_error_kind AARCH64_OPDE_SYNTAX_ERROR, AARCH64_OPDE_FATAL_SYNTAX_ERROR, AARCH64_OPDE_INVALID_VARIANT, + AARCH64_OPDE_REG_LIST, AARCH64_OPDE_UNTIED_IMMS, AARCH64_OPDE_UNTIED_OPERAND, AARCH64_OPDE_OUT_OF_RANGE, AARCH64_OPDE_UNALIGNED, - AARCH64_OPDE_REG_LIST, AARCH64_OPDE_OTHER_ERROR }; |