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authorMaciej W. Rozycki <macro@redhat.com>2024-07-19 19:01:52 +0100
committerMaciej W. Rozycki <macro@redhat.com>2024-07-19 19:01:52 +0100
commit31bd9f4682d611387993a8127a25ab42252b59c9 (patch)
tree6fb7bc6bb42bf6a5e21f28c83f46c968a147507e /include
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MIPS/opcodes: Output thread context registers numerically with MFTR/MTTR
We print MFTR and MTTR instructions' thread context register operand in disassembly using the ABI name the register number would correspond to should the targeted register be a general-purpose register. However in most cases it is wrong, because general-purpose registers are only referred when the 'u' and 'sel' operands are 1 and 0 respectively. And even in these cases the MFGPR and MTGPR aliases take precedence over the corresponding generic instruction encodings, so you won't see the valid case to normally trigger. Conversely decoding the thread context register operand numerically is always valid, so switch to using it. Adjust test coverage accordingly.
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