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authorAlan Modra <amodra@gmail.com>2001-01-10 00:24:43 +0000
committerAlan Modra <amodra@gmail.com>2001-01-10 00:24:43 +0000
commit079966a8adc698bdfc8d8cf7029b0c61facb1e75 (patch)
tree88374be2729fbc4c3f939ed93a6c6f0576b06b3c /include
parentd38ccb31e9abe28537fd73eb0ebb29492ef765ae (diff)
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Fix "movnti"
Diffstat (limited to 'include')
-rw-r--r--include/opcode/ChangeLog6
-rw-r--r--include/opcode/i386.h10
2 files changed, 10 insertions, 6 deletions
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog
index 11b2d9a..561eeac 100644
--- a/include/opcode/ChangeLog
+++ b/include/opcode/ChangeLog
@@ -1,3 +1,7 @@
+2001-01-10 Richard Schaal <richard.schaal@intel.com>
+
+ * i386.h: Correct movnti instruction.
+
2001-01-09 Jeff Johnston <jjohnstn@redhat.com>
* cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
@@ -20,7 +24,7 @@ Sat Dec 30 19:03:15 MET 2000 Jan Hubicka <jh@suse.cz>
add swapgs; disable jmp/call far direct instructions for
64bit mode; add syscall and sysret; disable registers for 0xc6
template. Add 'q' suffixes to extendable instructions, disable
- obsoletted instructions, add new sign/zero extension ones.
+ obsolete instructions, add new sign/zero extension ones.
(i386_regtab): Add extended registers.
(*Suf): Add No_qSuf.
(q_Suf, wlq_Suf, bwlq_Suf): New.
diff --git a/include/opcode/i386.h b/include/opcode/i386.h
index dd67c865..27e73fd 100644
--- a/include/opcode/i386.h
+++ b/include/opcode/i386.h
@@ -951,11 +951,11 @@ static const template i386_optab[] = {
/* Pentium4 extensions. */
-{"movnti", 2, 0x0fc3, X, CpuP4, lq_Suf|Modrm, { WordReg|WordMem, WordReg, 0 } },
-{"clflush", 1, 0x0fae, 7, CpuP4, FP|Modrm, { ByteMem, 0, 0 } },
-{"lfence", 0, 0x0fae, 0xe8, CpuP4, FP|ImmExt, { 0, 0, 0 } },
-{"mfence", 0, 0x0fae, 0xf0, CpuP4, FP|ImmExt, { 0, 0, 0 } },
-{"pause", 0, 0xf390, X, CpuP4, FP, { 0, 0, 0 } },
+{"movnti", 2, 0x0fc3, X, CpuP4, FP|Modrm, { WordReg, WordMem, 0 } },
+{"clflush", 1, 0x0fae, 7, CpuP4, FP|Modrm, { ByteMem, 0, 0 } },
+{"lfence", 0, 0x0fae, 0xe8, CpuP4, FP|ImmExt, { 0, 0, 0 } },
+{"mfence", 0, 0x0fae, 0xf0, CpuP4, FP|ImmExt, { 0, 0, 0 } },
+{"pause", 0, 0xf390, X, CpuP4, FP, { 0, 0, 0 } },
/* MMX/SSE2 instructions. */