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| author | Tsukasa OI <research_trasio@irq.a4lg.com> | 2022-06-28 19:07:52 +0900 |
|---|---|---|
| committer | Tsukasa OI <research_trasio@irq.a4lg.com> | 2022-10-28 14:17:34 +0000 |
| commit | 6b84c098e533f87d7973fd6fe8a39ee97255ebdb (patch) | |
| tree | ba56a5585518038f476d3a7e6a4b216e67f0be1e /gdb/frame.c | |
| parent | 83029f7ff5d571dff0190e8d92c26e032c7acd76 (diff) | |
| download | gdb-6b84c098e533f87d7973fd6fe8a39ee97255ebdb.zip gdb-6b84c098e533f87d7973fd6fe8a39ee97255ebdb.tar.gz gdb-6b84c098e533f87d7973fd6fe8a39ee97255ebdb.tar.bz2 | |
RISC-V: Improve "bits undefined" diagnostics
This commit improves internal error message
"internal: bad RISC-V opcode (bits 0x%lx undefined): %s %s"
to display actual unused bits (excluding non-instruction bits).
gas/ChangeLog:
* config/tc-riscv.c (validate_riscv_insn): Exclude non-
instruction bits from displaying internal diagnostics.
Change error message slightly.
Diffstat (limited to 'gdb/frame.c')
0 files changed, 0 insertions, 0 deletions