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authorMaciej W. Rozycki <macro@imgtec.com>2016-10-06 16:51:18 +0100
committerMaciej W. Rozycki <macro@imgtec.com>2016-10-06 16:56:57 +0100
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mips-tdep: Make FCRs always 32-bit
Fix a regression from commit f8b73d13b7ca ("Target-described register support for MIPS"), <https://sourceware.org/ml/gdb-patches/2007-05/msg00340.html>, <https://sourceware.org/ml/gdb-patches/2007-06/msg00256.html>, which caused Floating Point Control Registers (FCRs) to be shown as 64-bit with 64-bit targets. This came from the legacy register format where all raw registers matched the width of the architecture regardless of their actual size. The correct size was then set in `mips_register_type' for cooked registers presented to the user, which in the case of FCRs meant the cooked size was always forced to 32 bits, reflecting their actual hardware size, even though the raw format carried them in 64-bit quantities on 64-bit targets. The upper 32 bits carried in the raw FCR format have always been don't-cares, not actually retrieved from hardware and never written back. With the introduction of XML register descriptions the layout of previously defined raw registers has been preserved, so as to keep existing register handling code unchanged and make it easier for GDB and `gdbserver' to interact with each other whether neither, either or both parties talking over RSP support XML register descriptions. For the XML-described case however `mips_register_type' is not used in raw to cooked register conversion, so any special cases coded there are not taken into account. Instead a new function, `mips_pseudo_register_type', has been introduced to handle size conversion, however lacking the special case for FCRs for the Linux and the now defunct IRIX target. The correct size has been maintained for embedded targets however, due to the bundling of FCRs with the embedded registers under the `rawnum >= MIPS_EMBED_FP0_REGNUM + 32' condition. Add the missing case to `mips_pseudo_register_type' then, referring to the FCR indices explicitly, and observing that between `MIPS_EMBED_FP0_REGNUM + 32' and `MIPS_FIRST_EMBED_REGNUM' there is an unused register slot whose contents are ignored so with the removal of embedded FCRs from under that condition we don't have to care about it and we can refer to the embedded registers starting from MIPS_FIRST_EMBED_REGNUM instead. Add a test case too so that we have means to check automatically that the correct user-visible size of FCRs is maintained. gdb/ * mips-tdep.c (mips_pseudo_register_type): Make FCRs always 32-bit. gdb/testsuite/ * gdb.arch/mips-fcr.exp: New test. * gdb.arch/mips-fcr.c: Source for the new test.
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