diff options
| -rw-r--r-- | gdb/ChangeLog | 5 | ||||
| -rw-r--r-- | gdb/mips-tdep.c | 9 | ||||
| -rw-r--r-- | gdb/testsuite/ChangeLog | 5 | ||||
| -rw-r--r-- | gdb/testsuite/gdb.arch/mips-fcr.c | 22 | ||||
| -rw-r--r-- | gdb/testsuite/gdb.arch/mips-fcr.exp | 54 |
5 files changed, 94 insertions, 1 deletions
diff --git a/gdb/ChangeLog b/gdb/ChangeLog index f13888b..1590c1b 100644 --- a/gdb/ChangeLog +++ b/gdb/ChangeLog @@ -1,5 +1,10 @@ 2016-10-06 Maciej W. Rozycki <macro@imgtec.com> + * mips-tdep.c (mips_pseudo_register_type): Make FCRs always + 32-bit. + +2016-10-06 Maciej W. Rozycki <macro@imgtec.com> + * mips-tdep.c (mips_pseudo_register_type): Rearrange comments throughout. diff --git a/gdb/mips-tdep.c b/gdb/mips-tdep.c index 615c9df..b91dbfa 100644 --- a/gdb/mips-tdep.c +++ b/gdb/mips-tdep.c @@ -1079,6 +1079,13 @@ mips_pseudo_register_type (struct gdbarch *gdbarch, int regnum) if (mips_float_register_p (gdbarch, rawnum)) return rawtype; + /* Floating-point control registers are always 32-bit even though for + backwards compatibility reasons 64-bit targets will transfer them + as 64-bit quantities even if using XML descriptions. */ + if (rawnum == mips_regnum (gdbarch)->fp_control_status + || rawnum == mips_regnum (gdbarch)->fp_implementation_revision) + return builtin_type (gdbarch)->builtin_int32; + /* Use pointer types for registers if we can. For n32 we can not, since we do not have a 64-bit pointer type. */ if (mips_abi_regsize (gdbarch) @@ -1111,7 +1118,7 @@ mips_pseudo_register_type (struct gdbarch *gdbarch, int regnum) with the displayed type. */ if (gdbarch_osabi (gdbarch) != GDB_OSABI_IRIX && gdbarch_osabi (gdbarch) != GDB_OSABI_LINUX - && rawnum >= MIPS_EMBED_FP0_REGNUM + 32 + && rawnum >= MIPS_FIRST_EMBED_REGNUM && rawnum <= MIPS_LAST_EMBED_REGNUM) return builtin_type (gdbarch)->builtin_int32; diff --git a/gdb/testsuite/ChangeLog b/gdb/testsuite/ChangeLog index 223964e..56d28ac 100644 --- a/gdb/testsuite/ChangeLog +++ b/gdb/testsuite/ChangeLog @@ -1,5 +1,10 @@ 2016-10-06 Maciej W. Rozycki <macro@imgtec.com> + * gdb.arch/mips-fcr.exp: New test. + * gdb.arch/mips-fcr.c: Source for the new test. + +2016-10-06 Maciej W. Rozycki <macro@imgtec.com> + * gdb.base/solib-disc.exp: Use `standard_output_file' throughout. diff --git a/gdb/testsuite/gdb.arch/mips-fcr.c b/gdb/testsuite/gdb.arch/mips-fcr.c new file mode 100644 index 0000000..1545b21 --- /dev/null +++ b/gdb/testsuite/gdb.arch/mips-fcr.c @@ -0,0 +1,22 @@ +/* This testcase is part of GDB, the GNU debugger. + + Copyright 2016 Free Software Foundation, Inc. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see <http://www.gnu.org/licenses/>. */ + +int +main (void) +{ + return 0; +} diff --git a/gdb/testsuite/gdb.arch/mips-fcr.exp b/gdb/testsuite/gdb.arch/mips-fcr.exp new file mode 100644 index 0000000..0e779a5 --- /dev/null +++ b/gdb/testsuite/gdb.arch/mips-fcr.exp @@ -0,0 +1,54 @@ +# Copyright (C) 2016 Free Software Foundation, Inc. + +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see <http://www.gnu.org/licenses/>. + +# Contributed by Imagination Technologies, written by Maciej W. Rozycki. + +# Test MIPS Floating Point Control Register handling. + +if { ![istarget "mips*-*-*"] } then { + verbose "Skipping MIPS Floating Point Control Register tests." + return +} + +standard_testfile + +if { [prepare_for_testing ${testfile}.exp ${testfile}] } { + return +} + +if ![runto_main] { + return +} + +# First check if we have an FPU available in the first place. +gdb_test_multiple "show mipsfpu" "check for MIPS floating-point coprocessor" { + -re "The MIPS floating-point coprocessor .*\(absent\|unknown\).*$gdb_prompt $" { + unsupported "no MIPS floating-point coprocessor in the processor" + return + } + -re "The MIPS floating-point coprocessor .*$gdb_prompt $" { + verbose "MIPS floating-point coprocessor check successful." + } + default { + fail + return + } +} + +# Now check that FCRs are accessible and 32-bit wide. +gdb_test "info registers \$fcsr" "fcsr: $hex" +gdb_test "print sizeof \$fcsr" "\\\$$decimal = 4" +gdb_test "info registers \$fir" "fir: $hex" +gdb_test "print sizeof \$fir" "\\\$$decimal = 4" |