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| author | Tamar Christina <tamar.christina@arm.com> | 2017-11-09 15:22:30 +0000 |
|---|---|---|
| committer | Tamar Christina <tamar.christina@arm.com> | 2017-11-09 16:29:04 +0000 |
| commit | f42f1a1d6ca0cc84e43d7f2b85044a2565ca00f2 (patch) | |
| tree | 09df61653ce091a7efc3741d8a59748e3e55a876 /gas | |
| parent | e793c052f9d9548442a46817998a46cbca4ccb70 (diff) | |
| download | gdb-f42f1a1d6ca0cc84e43d7f2b85044a2565ca00f2.zip gdb-f42f1a1d6ca0cc84e43d7f2b85044a2565ca00f2.tar.gz gdb-f42f1a1d6ca0cc84e43d7f2b85044a2565ca00f2.tar.bz2 | |
Adds the new Fields and Operand types for the new instructions in Armv8.4-a.
gas/
* config/tc-aarch64.c (process_omitted_operand):
Add AARCH64_OPND_Va, AARCH64_OPND_SM3_IMM2
and AARCH64_OPND_IMM_2.
(parse_operands): Add AARCH64_OPND_Va, AARCH64_OPND_SM3_IMM2,
AARCH64_OPND_IMM_2, AARCH64_OPND_MASK
and AARCH64_OPND_ADDR_OFFSET.
include/
* opcode/aarch64.h:
(aarch64_opnd): Add AARCH64_OPND_Va, AARCH64_OPND_MASK,
AARCH64_OPND_IMM_2, AARCH64_OPND_ADDR_OFFSET
and AARCH64_OPND_SM3_IMM2.
(aarch64_insn_class): Add cryptosm3 and cryptosm4.
(arch64_feature_set): Make uint64_t.
opcodes/
* aarch64-asm.h (ins_addr_offset): New.
* aarch64-asm.c (aarch64_ins_reglane): Add cryptosm3.
(aarch64_ins_addr_offset): New.
* aarch64-asm-2.c: Regenerate.
* aarch64-dis.h (ext_addr_offset): New.
* aarch64-dis.c (aarch64_ext_reglane): Add cryptosm3.
(aarch64_ext_addr_offset): New.
* aarch64-dis-2.c: Regenerate.
* aarch64-opc.h (aarch64_field_kind): Add FLD_imm6_2,
FLD_imm4_2 and FLD_SM3_imm2.
* aarch64-opc.c (fields): Add FLD_imm6_2,
FLD_imm4_2 and FLD_SM3_imm2.
(operand_general_constraint_met_p): Add AARCH64_OPND_ADDR_OFFSET.
(aarch64_print_operand): Add AARCH64_OPND_Va, AARCH64_OPND_SM3_IMM2,
AARCH64_OPND_MASK, AARCH64_OPND_IMM_2 and AARCH64_OPND_ADDR_OFFSET.
* aarch64-opc-2.c (Va, MASK, IMM_2, ADDR_OFFSET, SM3_IMM2): New.
* aarch64-tbl.h
(aarch64_opcode_table): Add Va, MASK, IMM_2, ADDR_OFFSET, SM3_IMM2.
Diffstat (limited to 'gas')
| -rw-r--r-- | gas/ChangeLog | 9 | ||||
| -rw-r--r-- | gas/config/tc-aarch64.c | 8 |
2 files changed, 17 insertions, 0 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 6589654..441dc22 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,12 @@ +2017-11-09 Tamar Christina <tamar.christina@arm.com> + + * config/tc-aarch64.c (process_omitted_operand): + Add AARCH64_OPND_Va, AARCH64_OPND_SM3_IMM2 + and AARCH64_OPND_IMM_2. + (parse_operands): Add AARCH64_OPND_Va, AARCH64_OPND_SM3_IMM2, + AARCH64_OPND_IMM_2, AARCH64_OPND_MASK + and AARCH64_OPND_ADDR_OFFSET. + 2017-11-09 Tamar Christina <tamar.christina@arm.com> * config/tc-aarch64.c (aarch64_arch_option_table): Add armv8.4-a. diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c index 054ee92..84b3dc7 100644 --- a/gas/config/tc-aarch64.c +++ b/gas/config/tc-aarch64.c @@ -4999,6 +4999,7 @@ process_omitted_operand (enum aarch64_opnd type, const aarch64_opcode *opcode, case AARCH64_OPND_Sd: case AARCH64_OPND_Sn: case AARCH64_OPND_Sm: + case AARCH64_OPND_Va: case AARCH64_OPND_Vd: case AARCH64_OPND_Vn: case AARCH64_OPND_Vm: @@ -5010,6 +5011,7 @@ process_omitted_operand (enum aarch64_opnd type, const aarch64_opcode *opcode, case AARCH64_OPND_Ed: case AARCH64_OPND_En: case AARCH64_OPND_Em: + case AARCH64_OPND_SM3_IMM2: operand->reglane.regno = default_value; break; @@ -5026,6 +5028,7 @@ process_omitted_operand (enum aarch64_opnd type, const aarch64_opcode *opcode, case AARCH64_OPND_UIMM3_OP1: case AARCH64_OPND_UIMM3_OP2: case AARCH64_OPND_IMM: + case AARCH64_OPND_IMM_2: case AARCH64_OPND_WIDTH: case AARCH64_OPND_UIMM7: case AARCH64_OPND_NZCV: @@ -5390,6 +5393,7 @@ parse_operands (char *str, const aarch64_opcode *opcode) reg_type = REG_TYPE_ZN; goto vector_reg; + case AARCH64_OPND_Va: case AARCH64_OPND_Vd: case AARCH64_OPND_Vn: case AARCH64_OPND_Vm: @@ -5451,6 +5455,7 @@ parse_operands (char *str, const aarch64_opcode *opcode) case AARCH64_OPND_Ed: case AARCH64_OPND_En: case AARCH64_OPND_Em: + case AARCH64_OPND_SM3_IMM2: reg_type = REG_TYPE_VN; vector_reg_index: val = aarch64_reg_parse (&str, reg_type, NULL, &vectype); @@ -5561,6 +5566,7 @@ parse_operands (char *str, const aarch64_opcode *opcode) case AARCH64_OPND_UIMM3_OP2: case AARCH64_OPND_IMM_VLSL: case AARCH64_OPND_IMM: + case AARCH64_OPND_IMM_2: case AARCH64_OPND_WIDTH: case AARCH64_OPND_SVE_INV_LIMM: case AARCH64_OPND_SVE_LIMM: @@ -5627,6 +5633,7 @@ parse_operands (char *str, const aarch64_opcode *opcode) break; case AARCH64_OPND_IDX: + case AARCH64_OPND_MASK: case AARCH64_OPND_BIT_NUM: case AARCH64_OPND_IMMR: case AARCH64_OPND_IMMS: @@ -6046,6 +6053,7 @@ parse_operands (char *str, const aarch64_opcode *opcode) break; case AARCH64_OPND_ADDR_SIMM10: + case AARCH64_OPND_ADDR_OFFSET: po_misc_or_fail (parse_address (&str, info)); if (info->addr.pcrel || info->addr.offset.is_reg || !info->addr.preind || info->addr.postind) |