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| author | Sudakshina Das <sudi.das@arm.com> | 2019-04-11 10:13:23 +0100 |
|---|---|---|
| committer | Sudakshina Das <sudi.das@arm.com> | 2019-04-11 10:13:23 +0100 |
| commit | e54010f1aeb050cb9d65862a0afe9095a7a85f27 (patch) | |
| tree | 9d730c0e01304541dbbd95b4113a60b56c8138c2 /gas | |
| parent | 68811f8ff84895ef1cad37ac6947f1a340dd2ae2 (diff) | |
| download | gdb-e54010f1aeb050cb9d65862a0afe9095a7a85f27.zip gdb-e54010f1aeb050cb9d65862a0afe9095a7a85f27.tar.gz gdb-e54010f1aeb050cb9d65862a0afe9095a7a85f27.tar.bz2 | |
[BINUTILS, AArch64, 1/2] Add new LDGM/STGM instruction
This patch adds the new LDGM/STGM instructions of the
Armv8.5-A Memory Tagging Extension. This is part of the changes
that have been introduced recently in the 00bet10 release
The instructions are as follows:
LDGM Xt, [<Xn|SP>]
STGM Xt, [<Xn|SP>]
*** gas/ChangeLog ***
2019-04-11 Sudakshina Das <sudi.das@arm.com>
* testsuite/gas/aarch64/armv8_5-a-memtag.d: New tests for ldgm and stgm.
* testsuite/gas/aarch64/armv8_5-a-memtag.s: Likewise.
* testsuite/gas/aarch64/illegal-memtag.l: Likewise.
* testsuite/gas/aarch64/illegal-memtag.s: Likewise.
*** opcodes/ChangeLog ***
2019-04-11 Sudakshina Das <sudi.das@arm.com>
* aarch64-asm-2.c: Regenerated.
* aarch64-dis-2.c: Likewise.
* aarch64-opc-2.c: Likewise.
* aarch64-tbl.h (aarch64_opcode): Add new ldgm and stgm.
Diffstat (limited to 'gas')
| -rw-r--r-- | gas/ChangeLog | 7 | ||||
| -rw-r--r-- | gas/testsuite/gas/aarch64/armv8_5-a-memtag.d | 12 | ||||
| -rw-r--r-- | gas/testsuite/gas/aarch64/armv8_5-a-memtag.s | 2 | ||||
| -rw-r--r-- | gas/testsuite/gas/aarch64/illegal-memtag.l | 8 | ||||
| -rw-r--r-- | gas/testsuite/gas/aarch64/illegal-memtag.s | 10 |
5 files changed, 39 insertions, 0 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 75f4414..2ae6e05 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,10 @@ +2019-04-11 Sudakshina Das <sudi.das@arm.com> + + * testsuite/gas/aarch64/armv8_5-a-memtag.d: New tests for ldgm and stgm. + * testsuite/gas/aarch64/armv8_5-a-memtag.s: Likewise. + * testsuite/gas/aarch64/illegal-memtag.l: Likewise. + * testsuite/gas/aarch64/illegal-memtag.s: Likewise. + 2019-04-10 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> * config/tc-i386.c (need_plt32_p) [TE_SOLARIS]: Return FALSE. diff --git a/gas/testsuite/gas/aarch64/armv8_5-a-memtag.d b/gas/testsuite/gas/aarch64/armv8_5-a-memtag.d index 53a95fb..1075a12 100644 --- a/gas/testsuite/gas/aarch64/armv8_5-a-memtag.d +++ b/gas/testsuite/gas/aarch64/armv8_5-a-memtag.d @@ -143,3 +143,15 @@ Disassembly of section \.text: .*: d9200379 stzgm x25, \[x27\] .*: d92003e0 stzgm x0, \[sp\] .*: d920001f stzgm xzr, \[x0\] +.*: d9e00000 ldgm x0, \[x0\] +.*: d9e0001b ldgm x27, \[x0\] +.*: d9e00360 ldgm x0, \[x27\] +.*: d9e00379 ldgm x25, \[x27\] +.*: d9e003e0 ldgm x0, \[sp\] +.*: d9e0001f ldgm xzr, \[x0\] +.*: d9a00000 stgm x0, \[x0\] +.*: d9a0001b stgm x27, \[x0\] +.*: d9a00360 stgm x0, \[x27\] +.*: d9a00379 stgm x25, \[x27\] +.*: d9a003e0 stgm x0, \[sp\] +.*: d9a0001f stgm xzr, \[x0\] diff --git a/gas/testsuite/gas/aarch64/armv8_5-a-memtag.s b/gas/testsuite/gas/aarch64/armv8_5-a-memtag.s index 2ca1a68..50c9962 100644 --- a/gas/testsuite/gas/aarch64/armv8_5-a-memtag.s +++ b/gas/testsuite/gas/aarch64/armv8_5-a-memtag.s @@ -113,3 +113,5 @@ func: ldg x0, [x0, #-4096] expand_ldg_bulk stzgm + expand_ldg_bulk ldgm + expand_ldg_bulk stgm diff --git a/gas/testsuite/gas/aarch64/illegal-memtag.l b/gas/testsuite/gas/aarch64/illegal-memtag.l index aa79aac..693410b 100644 --- a/gas/testsuite/gas/aarch64/illegal-memtag.l +++ b/gas/testsuite/gas/aarch64/illegal-memtag.l @@ -14,6 +14,10 @@ [^:]*:[0-9]+: Error: immediate offset out of range -1024 to 1008 at operand 3 -- `stgp x1,x2,\[x3,#-1025\]' [^:]*:[0-9]+: Error: the optional immediate offset can only be 0 at operand 2 -- `stzgm x2,\[x3,#16\]' [^:]*:[0-9]+: Error: invalid addressing mode at operand 2 -- `stzgm x4,\[x5,#16\]!' +[^:]*:[0-9]+: Error: the optional immediate offset can only be 0 at operand 2 -- `ldgm x2,\[x3,#16\]' +[^:]*:[0-9]+: Error: invalid addressing mode at operand 2 -- `ldgm x4,\[x5,#16\]!' +[^:]*:[0-9]+: Error: the optional immediate offset can only be 0 at operand 2 -- `stgm x2,\[x3,#16\]' +[^:]*:[0-9]+: Error: invalid addressing mode at operand 2 -- `stgm x4,\[x5,#16\]!' [^:]*:[0-9]+: Error: operand 1 must be an integer or stack pointer register -- `irg xzr,x2,x3' [^:]*:[0-9]+: Error: operand 2 must be an integer or stack pointer register -- `irg x1,xzr,x3' [^:]*:[0-9]+: Error: operand 3 must be an integer register -- `irg x1,x2,sp' @@ -45,3 +49,7 @@ [^:]*:[0-9]+: Error: 64-bit integer or SP register expected at operand 2 -- `ldg x0,\[xzr,#16\]' [^:]*:[0-9]+: Error: 64-bit integer or SP register expected at operand 2 -- `stzgm x0,\[xzr\]' [^:]*:[0-9]+: Error: operand 1 must be an integer register -- `stzgm sp,\[x3\]' +[^:]*:[0-9]+: Error: 64-bit integer or SP register expected at operand 2 -- `ldgm x0,\[xzr\]' +[^:]*:[0-9]+: Error: operand 1 must be an integer register -- `ldgm sp,\[x3\]' +[^:]*:[0-9]+: Error: 64-bit integer or SP register expected at operand 2 -- `stgm x0,\[xzr\]' +[^:]*:[0-9]+: Error: operand 1 must be an integer register -- `stgm sp,\[x3\]' diff --git a/gas/testsuite/gas/aarch64/illegal-memtag.s b/gas/testsuite/gas/aarch64/illegal-memtag.s index 9c9c48b..2aaabc1 100644 --- a/gas/testsuite/gas/aarch64/illegal-memtag.s +++ b/gas/testsuite/gas/aarch64/illegal-memtag.s @@ -24,6 +24,12 @@ func: stzgm x2, [x3, #16] stzgm x4, [x5, #16]! + # LDGM/STGM + ldgm x2, [x3, #16] + ldgm x4, [x5, #16]! + stgm x2, [x3, #16] + stgm x4, [x5, #16]! + # Illegal SP/XZR registers irg xzr, x2, x3 irg x1, xzr, x3 @@ -59,3 +65,7 @@ func: # Xt == Xn with writeback should not complain st2g x2, [x2, #0]! stzg x2, [x2], #0 + ldgm x0, [xzr] + ldgm sp, [x3] + stgm x0, [xzr] + stgm sp, [x3] |