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authorGraham Markall <graham.markall@embecosm.com>2016-07-27 15:57:18 +0100
committerNick Clifton <nickc@redhat.com>2016-07-27 15:57:18 +0100
commitdb18dbabad8e7b63e98d47813ef20acac7072350 (patch)
tree471a5ded9cd7d7ee511866e79c425616193daeeb /gas
parent61d2d2b5492d892d804861225b45396fdaa0b404 (diff)
downloadgdb-db18dbabad8e7b63e98d47813ef20acac7072350.zip
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Begin implementing ARC NPS-400 Accelerator instructions
opcodes * arc-nps400-tbl.h: Change block comments to GNU format. * arc-dis.c: Add new globals addrtypenames, addrtypenames_max, and addtypeunknown. (get_addrtype): New function. (print_insn_arc): Print colons and address types when required. * arc-opc.c: Add MAKE_INSERT_NPS_ADDRTYPE macro and use to define insert and extract functions for all address types. (arc_operands): Add operands for colon and all address types. * arc-nps-400-tbl.h: Add NPS-400 BMU instructions to opcode table. * arc-opc.c: Add NPS_BD_TYPE and NPS_BMU_NUM operands, insert_nps_bd_num_buff and extract_nps_bd_num_buff functions. * arc-nps-400-tbl.h: Add NPS-400 PMU instructions to opcode table. * arc-opc.c: Add NPS_PMU_NXT_DST and NPS_PMU_NUM_JOB operands, insert_nps_pmu_num_job and extract_nps_pmu_num_job functions. include * opcode/arc.h: Add ARC_OPERAND_ADDRTYPE, ARC_OPERAND_COLON. Add the arc_nps_address_type enum and ARC_NUM_ADDRTYPES. * opcode/arc.h: Add BMU to insn_class_t enum. * opcode/arc.h: Add PMU to insn_class_t enum. gas * config/tc-arc.c: Add new global arc_addrtype_hash. Define O_colon and O_addrtype. (debug_exp): Add O_colon and O_addrtype. (tokenize_arguments): Handle colon and address type tokens. (declare_addrtype): New function. (md_begin): Initialise arc_addrtype_hash. (arc_parse_name): Add lookup of address types. (assemble_insn): Handle colons and address types by ignoring them. * testsuite/gas/arc/nps400-8.s: New file. * testsuite/gas/arc/nps400-8.d: New file. * testsuite/gas/arc/nps400-8.s: Add PMU instruction tests. * testsuite/gas/arc/nps400-8.d: Add expected PMU instruction output.
Diffstat (limited to 'gas')
-rw-r--r--gas/ChangeLog18
-rw-r--r--gas/config/tc-arc.c152
-rw-r--r--gas/testsuite/gas/arc/nps400-8.d71
-rw-r--r--gas/testsuite/gas/arc/nps400-8.s92
4 files changed, 298 insertions, 35 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 617fccd..c2d132e 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,21 @@
+2016-07-27 Graham Markall <graham.markall@embecosm.com>
+
+ * config/tc-arc.c: Add new global arc_addrtype_hash.
+ Define O_colon and O_addrtype.
+ (debug_exp): Add O_colon and O_addrtype.
+ (tokenize_arguments): Handle colon and address type
+ tokens.
+ (declare_addrtype): New function.
+ (md_begin): Initialise arc_addrtype_hash.
+ (arc_parse_name): Add lookup of address types.
+ (assemble_insn): Handle colons and address types by
+ ignoring them.
+ * testsuite/gas/arc/nps400-8.s: New file.
+ * testsuite/gas/arc/nps400-8.d: New file.
+ * testsuite/gas/arc/nps400-8.s: Add PMU instruction tests.
+ * testsuite/gas/arc/nps400-8.d: Add expected PMU
+ instruction output.
+
2016-07-26 Maciej W. Rozycki <macro@imgtec.com>
* config/tc-mips.c (RELAX_MICROMIPS_ENCODE): Add `insn32' flag.
diff --git a/gas/config/tc-arc.c b/gas/config/tc-arc.c
index 70886dd..4e4dcb3 100644
--- a/gas/config/tc-arc.c
+++ b/gas/config/tc-arc.c
@@ -45,8 +45,8 @@
#define MAJOR_OPCODE(x) (((x) & 0xF8000000) >> 27)
#define SUB_OPCODE(x) (((x) & 0x003F0000) >> 16)
-#define LP_INSN(x) ((MAJOR_OPCODE (x) == 0x4) && \
- (SUB_OPCODE (x) == 0x28))
+#define LP_INSN(x) ((MAJOR_OPCODE (x) == 0x4) \
+ && (SUB_OPCODE (x) == 0x28))
/* Equal to MAX_PRECISION in atof-ieee.c. */
#define MAX_LITTLENUMS 6
@@ -102,7 +102,8 @@ enum arc_rlx_types
#define is_spfp_p(op) (((sc) == SPX))
#define is_dpfp_p(op) (((sc) == DPX))
#define is_fpuda_p(op) (((sc) == DPA))
-#define is_br_jmp_insn_p(op) (((op)->insn_class == BRANCH || (op)->insn_class == JUMP))
+#define is_br_jmp_insn_p(op) (((op)->insn_class == BRANCH \
+ || (op)->insn_class == JUMP))
#define is_kernel_insn_p(op) (((op)->insn_class == KERNEL))
#define is_nps400_p(op) (((sc) == NPS400))
@@ -420,6 +421,9 @@ static struct hash_control *arc_reg_hash;
/* The hash table of aux register symbols. */
static struct hash_control *arc_aux_hash;
+/* The hash table of address types. */
+static struct hash_control *arc_addrtype_hash;
+
/* A table of CPU names and opcode sets. */
static const struct cpu_type
{
@@ -461,6 +465,12 @@ static const struct cpu_type
/* Used to define a bracket as operand in tokens. */
#define O_bracket O_md32
+/* Used to define a colon as an operand in tokens. */
+#define O_colon O_md31
+
+/* Used to define address types in nps400. */
+#define O_addrtype O_md30
+
/* Dummy relocation, to be sorted out. */
#define DUMMY_RELOC_ARC_ENTRY (BFD_RELOC_UNUSED + 1)
@@ -553,56 +563,56 @@ const relax_typeS md_relax_table[] =
/* BL_S s13 ->
BL s25. */
- RELAX_TABLE_ENTRY(13, 1, 2, ARC_RLX_BL),
- RELAX_TABLE_ENTRY(25, 1, 4, ARC_RLX_NONE),
+ RELAX_TABLE_ENTRY (13, 1, 2, ARC_RLX_BL),
+ RELAX_TABLE_ENTRY (25, 1, 4, ARC_RLX_NONE),
/* B_S s10 ->
B s25. */
- RELAX_TABLE_ENTRY(10, 1, 2, ARC_RLX_B),
- RELAX_TABLE_ENTRY(25, 1, 4, ARC_RLX_NONE),
+ RELAX_TABLE_ENTRY (10, 1, 2, ARC_RLX_B),
+ RELAX_TABLE_ENTRY (25, 1, 4, ARC_RLX_NONE),
/* ADD_S c,b, u3 ->
ADD<.f> a,b,u6 ->
ADD<.f> a,b,limm. */
- RELAX_TABLE_ENTRY(3, 0, 2, ARC_RLX_ADD_U6),
- RELAX_TABLE_ENTRY(6, 0, 4, ARC_RLX_ADD_LIMM),
- RELAX_TABLE_ENTRY_MAX(0, 8, ARC_RLX_NONE),
+ RELAX_TABLE_ENTRY (3, 0, 2, ARC_RLX_ADD_U6),
+ RELAX_TABLE_ENTRY (6, 0, 4, ARC_RLX_ADD_LIMM),
+ RELAX_TABLE_ENTRY_MAX (0, 8, ARC_RLX_NONE),
/* LD_S a, [b, u7] ->
LD<zz><.x><.aa><.di> a, [b, s9] ->
LD<zz><.x><.aa><.di> a, [b, limm] */
- RELAX_TABLE_ENTRY(7, 0, 2, ARC_RLX_LD_S9),
- RELAX_TABLE_ENTRY(9, 1, 4, ARC_RLX_LD_LIMM),
- RELAX_TABLE_ENTRY_MAX(1, 8, ARC_RLX_NONE),
+ RELAX_TABLE_ENTRY (7, 0, 2, ARC_RLX_LD_S9),
+ RELAX_TABLE_ENTRY (9, 1, 4, ARC_RLX_LD_LIMM),
+ RELAX_TABLE_ENTRY_MAX (1, 8, ARC_RLX_NONE),
/* MOV_S b, u8 ->
MOV<.f> b, s12 ->
MOV<.f> b, limm. */
- RELAX_TABLE_ENTRY(8, 0, 2, ARC_RLX_MOV_S12),
- RELAX_TABLE_ENTRY(8, 0, 4, ARC_RLX_MOV_LIMM),
- RELAX_TABLE_ENTRY_MAX(0, 8, ARC_RLX_NONE),
+ RELAX_TABLE_ENTRY (8, 0, 2, ARC_RLX_MOV_S12),
+ RELAX_TABLE_ENTRY (8, 0, 4, ARC_RLX_MOV_LIMM),
+ RELAX_TABLE_ENTRY_MAX (0, 8, ARC_RLX_NONE),
/* SUB_S c, b, u3 ->
SUB<.f> a, b, u6 ->
SUB<.f> a, b, limm. */
- RELAX_TABLE_ENTRY(3, 0, 2, ARC_RLX_SUB_U6),
- RELAX_TABLE_ENTRY(6, 0, 4, ARC_RLX_SUB_LIMM),
- RELAX_TABLE_ENTRY_MAX(0, 8, ARC_RLX_NONE),
+ RELAX_TABLE_ENTRY (3, 0, 2, ARC_RLX_SUB_U6),
+ RELAX_TABLE_ENTRY (6, 0, 4, ARC_RLX_SUB_LIMM),
+ RELAX_TABLE_ENTRY_MAX (0, 8, ARC_RLX_NONE),
/* MPY<.f> a, b, u6 ->
MPY<.f> a, b, limm. */
- RELAX_TABLE_ENTRY(6, 0, 4, ARC_RLX_MPY_LIMM),
- RELAX_TABLE_ENTRY_MAX(0, 8, ARC_RLX_NONE),
+ RELAX_TABLE_ENTRY (6, 0, 4, ARC_RLX_MPY_LIMM),
+ RELAX_TABLE_ENTRY_MAX (0, 8, ARC_RLX_NONE),
/* MOV<.f><.cc> b, u6 ->
MOV<.f><.cc> b, limm. */
- RELAX_TABLE_ENTRY(6, 0, 4, ARC_RLX_MOV_RLIMM),
- RELAX_TABLE_ENTRY_MAX(0, 8, ARC_RLX_NONE),
+ RELAX_TABLE_ENTRY (6, 0, 4, ARC_RLX_MOV_RLIMM),
+ RELAX_TABLE_ENTRY_MAX (0, 8, ARC_RLX_NONE),
/* ADD<.f><.cc> b, b, u6 ->
ADD<.f><.cc> b, b, limm. */
- RELAX_TABLE_ENTRY(6, 0, 4, ARC_RLX_ADD_RRLIMM),
- RELAX_TABLE_ENTRY_MAX(0, 8, ARC_RLX_NONE),
+ RELAX_TABLE_ENTRY (6, 0, 4, ARC_RLX_ADD_RRLIMM),
+ RELAX_TABLE_ENTRY_MAX (0, 8, ARC_RLX_NONE),
};
/* Order of this table's entries matters! */
@@ -979,6 +989,8 @@ debug_exp (expressionS *t)
case O_logical_or: name = "O_logical_or"; break;
case O_index: name = "O_index"; break;
case O_bracket: name = "O_bracket"; break;
+ case O_colon: name = "O_colon"; break;
+ case O_addrtype: name = "O_addrtype"; break;
}
switch (t->X_md)
@@ -1067,6 +1079,16 @@ tokenize_arguments (char *str,
++num_args;
break;
+ case ':':
+ input_line_pointer++;
+ if (!saw_arg || num_args == ntok)
+ goto err;
+ tok->X_op = O_colon;
+ saw_arg = FALSE;
+ ++tok;
+ ++num_args;
+ break;
+
case '@':
/* We have labels, function names and relocations, all
starting with @ symbol. Sort them out. */
@@ -1693,8 +1715,7 @@ find_opcode_match (const struct arc_opcode_hash_entry *entry,
const struct arc_operand *operand = &arc_operands[*opidx];
/* Only take input from real operands. */
- if ((operand->flags & ARC_OPERAND_FAKE)
- && !(operand->flags & ARC_OPERAND_BRAKET))
+ if (ARC_OPERAND_IS_FAKE (operand))
continue;
/* When we expect input, make sure we have it. */
@@ -1704,6 +1725,12 @@ find_opcode_match (const struct arc_opcode_hash_entry *entry,
/* Match operand type with expression type. */
switch (operand->flags & ARC_OPERAND_TYPECHECK_MASK)
{
+ case ARC_OPERAND_ADDRTYPE:
+ /* Check to be an address type. */
+ if (tok[tokidx].X_op != O_addrtype)
+ goto match_failed;
+ break;
+
case ARC_OPERAND_IR:
/* Check to be a register. */
if ((tok[tokidx].X_op != O_register
@@ -1755,6 +1782,12 @@ find_opcode_match (const struct arc_opcode_hash_entry *entry,
goto match_failed;
break;
+ case ARC_OPERAND_COLON:
+ /* Check if colon is also in opcode table as operand. */
+ if (tok[tokidx].X_op != O_colon)
+ goto match_failed;
+ break;
+
case ARC_OPERAND_LIMM:
case ARC_OPERAND_SIGNED:
case ARC_OPERAND_UNSIGNED:
@@ -2010,8 +2043,9 @@ pseudo_operand_match (const expressionS *tok,
case O_symbol:
/* Handle all symbols as long immediates or signed 9. */
- if (operand_real->flags & ARC_OPERAND_LIMM ||
- ((operand_real->flags & ARC_OPERAND_SIGNED) && operand_real->bits == 9))
+ if (operand_real->flags & ARC_OPERAND_LIMM
+ || ((operand_real->flags & ARC_OPERAND_SIGNED)
+ && operand_real->bits == 9))
ret = TRUE;
break;
@@ -2094,8 +2128,8 @@ find_special_case_pseudo (const char *opname,
operand_pseudo = &pseudo_insn->operand[i];
operand_real = &arc_operands[operand_pseudo->operand_idx];
- if (operand_real->flags & ARC_OPERAND_BRAKET &&
- !operand_pseudo->needs_insert)
+ if (operand_real->flags & ARC_OPERAND_BRAKET
+ && !operand_pseudo->needs_insert)
continue;
/* Has to be inserted (i.e. this token does not exist yet). */
@@ -2461,6 +2495,22 @@ declare_register_set (void)
}
}
+/* Construct a symbol for an address type. */
+
+static void
+declare_addrtype (const char *name, int number)
+{
+ const char *err;
+ symbolS *addrtypeS = symbol_create (name, undefined_section,
+ number, &zero_address_frag);
+
+ err = hash_insert (arc_addrtype_hash, S_GET_NAME (addrtypeS),
+ (void *) addrtypeS);
+ if (err)
+ as_fatal (_("Inserting \"%s\" into address type table failed: %s"),
+ name, err);
+}
+
/* Port-specific assembler initialization. This function is called
once, at assembler startup time. */
@@ -2575,6 +2625,28 @@ md_begin (void)
as_fatal (_("internal error: can't hash aux register '%s': %s"),
auxr->name, retval);
}
+
+ /* Address type declaration. */
+ arc_addrtype_hash = hash_new ();
+ if (arc_addrtype_hash == NULL)
+ as_fatal (_("Virtual memory exhausted"));
+
+ declare_addrtype ("bd", ARC_NPS400_ADDRTYPE_BD);
+ declare_addrtype ("jid", ARC_NPS400_ADDRTYPE_JID);
+ declare_addrtype ("lbd", ARC_NPS400_ADDRTYPE_LBD);
+ declare_addrtype ("mbd", ARC_NPS400_ADDRTYPE_MBD);
+ declare_addrtype ("sd", ARC_NPS400_ADDRTYPE_SD);
+ declare_addrtype ("sm", ARC_NPS400_ADDRTYPE_SM);
+ declare_addrtype ("xa", ARC_NPS400_ADDRTYPE_XA);
+ declare_addrtype ("xd", ARC_NPS400_ADDRTYPE_XD);
+ declare_addrtype ("cd", ARC_NPS400_ADDRTYPE_CD);
+ declare_addrtype ("cbd", ARC_NPS400_ADDRTYPE_CBD);
+ declare_addrtype ("cjid", ARC_NPS400_ADDRTYPE_CJID);
+ declare_addrtype ("clbd", ARC_NPS400_ADDRTYPE_CLBD);
+ declare_addrtype ("cm", ARC_NPS400_ADDRTYPE_CM);
+ declare_addrtype ("csd", ARC_NPS400_ADDRTYPE_CSD);
+ declare_addrtype ("cxa", ARC_NPS400_ADDRTYPE_CXA);
+ declare_addrtype ("cxd", ARC_NPS400_ADDRTYPE_CXD);
}
/* Write a value out to the object file, using the appropriate
@@ -3254,7 +3326,7 @@ arc_parse_name (const char *name,
if (!assembling_insn)
return FALSE;
- /* Handle only registers. */
+ /* Handle only registers and address types. */
if (e->X_op != O_absent)
return FALSE;
@@ -3265,6 +3337,15 @@ arc_parse_name (const char *name,
e->X_add_number = S_GET_VALUE (sym);
return TRUE;
}
+
+ sym = hash_find (arc_addrtype_hash, name);
+ if (sym)
+ {
+ e->X_op = O_addrtype;
+ e->X_add_number = S_GET_VALUE (sym);
+ return TRUE;
+ }
+
return FALSE;
}
@@ -3726,8 +3807,7 @@ assemble_insn (const struct arc_opcode *opcode,
const struct arc_operand *operand = &arc_operands[*argidx];
const expressionS *t = (const expressionS *) 0;
- if ((operand->flags & ARC_OPERAND_FAKE)
- && !(operand->flags & ARC_OPERAND_BRAKET))
+ if (ARC_OPERAND_IS_FAKE (operand))
continue;
if (operand->flags & ARC_OPERAND_DUPLICATE)
@@ -3764,7 +3844,9 @@ assemble_insn (const struct arc_opcode *opcode,
break;
case O_bracket:
- /* Ignore brackets. */
+ case O_colon:
+ case O_addrtype:
+ /* Ignore brackets, colons, and address types. */
break;
case O_absent:
diff --git a/gas/testsuite/gas/arc/nps400-8.d b/gas/testsuite/gas/arc/nps400-8.d
new file mode 100644
index 0000000..9f5344c
--- /dev/null
+++ b/gas/testsuite/gas/arc/nps400-8.d
@@ -0,0 +1,71 @@
+#as: -mcpu=arc700 -mnps400
+#objdump: -dr
+
+.*: +file format .*arc.*
+
+Disassembly of section .text:
+
+[0-9a-f]+ <.*>:
+ 0: 3810 0000 bdalc r0,\[cm:r0\],r0,r0
+ 4: 3a10 00c1 bdalc r1,\[cm:r2\],r2,r3
+ 8: 3850 0840 bdalc r0,\[cm:r0\],r0,0,0x1
+ c: 3b50 0c42 bdalc r2,\[cm:r3\],r3,0x1,0x1
+ 10: 3c50 0c03 bdalc r3,\[cm:r4\],r4,0x1,0x8
+ 14: 3850 0040 sbdalc r0,r0,0
+ 18: 3c50 0443 sbdalc r3,r4,0x1
+ 1c: 3811 003e bdfre 0,\[cm:r0\],r0,r0
+ 20: 3911 00be bdfre 0,\[cm:r1\],r1,r2
+ 24: 3851 007e bdfre 0,\[cm:r0\],r0,0x1
+ 28: 3a51 003e bdfre 0,\[cm:r2\],r2,0x8
+ 2c: 3851 087e bdfre 0,\[cm:r0\],r0,0,0x1
+ 30: 3e51 083e bdfre 0,\[cm:r6\],r6,0,0x8
+ 34: 3851 0c7e bdfre 0,\[cm:r0\],r0,0x1,0x1
+ 38: 3e51 0c3e bdfre 0,\[cm:r6\],r6,0x1,0x8
+ 3c: 3817 003e sbdfre 0,r0,r0
+ 40: 3917 00be sbdfre 0,r1,r2
+ 44: 3818 003e bdbgt 0,r0,r0
+ 48: 3c18 01be bdbgt 0,r4,r6
+ 4c: 381c 0000 idxalc r0,\[cm:r0\],r0,r0
+ 50: 3a1c 00c1 idxalc r1,\[cm:r2\],r2,r3
+ 54: 3d5c 0884 idxalc r4,\[cm:r5\],r5,0x2
+ 58: 385c 0040 sidxalc r0,r0
+ 5c: 3a5c 0044 sidxalc r4,r2
+ 60: 381e 003e idxfre 0,\[cm:r0\],r0,r0
+ 64: 391e 00be idxfre 0,\[cm:r1\],r1,r2
+ 68: 385e 007e idxfre 0,\[cm:r0\],r0,0x1
+ 6c: 3a5e 003e idxfre 0,\[cm:r2\],r2,0x8
+ 70: 381d 003e sidxfre 0,r0,r0
+ 74: 391d 00be sidxfre 0,r1,r2
+ 78: 3819 003e idxbgt 0,r0,r0
+ 7c: 3f19 023e idxbgt 0,r7,r8
+ 80: 3e0d 703e 0000 0000 efabgt 0,0,r0
+ 88: 3e0d 70fe ffff ffff efabgt 0,0xffffffff,r3
+ 90: 380d 0fbe 0000 0000 efabgt 0,r0,0
+ 98: 3c0d 0fbe ffff ffff efabgt 0,r4,0xffffffff
+ a0: 380d 003e efabgt 0,r0,r0
+ a4: 3f0d 023e efabgt 0,r7,r8
+ a8: 3e0d 7000 0000 0000 efabgt r0,0,r0
+ b0: 3e0d 7184 ffff ffff efabgt r4,0xffffffff,r6
+ b8: 380d 0f80 0000 0000 efabgt r0,r0,0
+ c0: 3b0d 0f82 ffff ffff efabgt r2,r3,0xffffffff
+ c8: 380d 0000 efabgt r0,r0,r0
+ cc: 380d 1247 efabgt r7,r8,r9
+ d0: 3e2f 7020 jobget 0,\[cjid:r0\]
+ d4: 3e2f 71a0 jobget 0,\[cjid:r6\]
+ d8: 3e2f 7021 jobget.cl 0,\[cjid:r0\]
+ dc: 3e2f 71a1 jobget.cl 0,\[cjid:r6\]
+ e0: 3812 003e jobdn 0,\[cjid:r0\],r0,r0
+ e4: 3a12 013e jobdn 0,\[cjid:r2\],r2,r4
+ e8: 3852 003e jobdn 0,\[cjid:r0\],r0,0
+ ec: 3a52 03fe jobdn 0,\[cjid:r2\],r2,0xf
+ f0: 381f 0000 jobalc r0,\[cm:r0\],r0,r0
+ f4: 3a1f 00c1 jobalc r1,\[cm:r2\],r2,r3
+ f8: 385f 0840 jobalc r0,\[cm:r0\],r0,0x1
+ fc: 3a5f 0801 jobalc r1,\[cm:r2\],r2,0x4
+ 100: 385f 0040 sjobalc r0,r0
+ 104: 3d5f 0046 sjobalc r6,r5
+ 108: 381a 0000 jobbgt r0,r0,r0
+ 10c: 3d1a 0182 jobbgt r2,r5,r6
+ 110: 3e6f 70ff cnljob 0
+ 114: 386f 0028 qseq r0,\[r0\]
+ 118: 3a6f 0128 qseq r2,\[r4\]
diff --git a/gas/testsuite/gas/arc/nps400-8.s b/gas/testsuite/gas/arc/nps400-8.s
new file mode 100644
index 0000000..1042183
--- /dev/null
+++ b/gas/testsuite/gas/arc/nps400-8.s
@@ -0,0 +1,92 @@
+ .text
+
+ ;; bdalc / sbdalc
+ bdalc r0,[cm:r0],r0,r0
+ bdalc r1,[cm:r2],r2,r3
+ bdalc r0,[cm:r0],r0,0,1
+ bdalc r2,[cm:r3],r3,1,1
+ bdalc r3,[cm:r4],r4,1,8
+ sbdalc r0, r0, 0
+ sbdalc r3, r4, 1
+
+ ;; bdfre / sbdfre
+ bdfre 0,[cm:r0],r0,r0
+ bdfre 0,[cm:r1],r1,r2
+ bdfre 0,[cm:r0],r0,1
+ bdfre 0,[cm:r2],r2,8
+ bdfre 0,[cm:r0],r0,0,1
+ bdfre 0,[cm:r6],r6,0,8
+ bdfre 0,[cm:r0],r0,1,1
+ bdfre 0,[cm:r6],r6,1,8
+ sbdfre 0, r0, r0
+ sbdfre 0, r1, r2
+
+ ;; bdbgt
+ bdbgt 0,r0,r0
+ bdbgt 0,r4,r6
+
+ ;; idxalc / sidxalc
+ idxalc r0,[cm:r0],r0,r0
+ idxalc r1,[cm:r2],r2,r3
+ idxalc r4,[cm:r5],r5,2
+ sidxalc r0,r0
+ sidxalc r4,r2
+
+ ;; idxfre / sidxfre
+ idxfre 0,[cm:r0],r0,r0
+ idxfre 0,[cm:r1],r1,r2
+ idxfre 0,[cm:r0],r0,1
+ idxfre 0,[cm:r2],r2,8
+ sidxfre 0, r0, r0
+ sidxfre 0, r1, r2
+
+ ;; idxbgt
+ idxbgt 0,r0,r0
+ idxbgt 0,r7,r8
+
+ ;; efabgt
+ efabgt 0,0x0,r0
+ efabgt 0,0xffffffff,r3
+ efabgt 0,r0,0x0
+ efabgt 0,r4,0xffffffff
+ efabgt 0,r0,r0
+ efabgt 0,r7,r8
+ efabgt r0,0x0,r0
+ efabgt r4,0xffffffff,r6
+ efabgt r0,r0,0x0
+ efabgt r2,r3,0xffffffff
+ efabgt r0,r0,r0
+ efabgt r7,r8,r9
+
+ ;; jobget
+ jobget 0,[cjid:r0]
+ jobget 0,[cjid:r6]
+ jobget.cl 0,[cjid:r0]
+ jobget.cl 0,[cjid:r6]
+
+ ;; jobdn
+ jobdn 0,[cjid:r0],r0,r0
+ jobdn 0,[cjid:r2],r2,r4
+ jobdn 0,[cjid:r0],r0,0
+ jobdn 0,[cjid:r2],r2,15
+
+ ;; jobalc / sjobalc
+ jobalc r0,[cm:r0],r0,r0
+ jobalc r1,[cm:r2],r2,r3
+ jobalc r0,[cm:r0],r0,1
+ jobalc r1,[cm:r2],r2,4
+ sjobalc r0,r0
+ sjobalc r6,r5
+
+ ;; jobbgt
+
+ jobbgt r0,r0,r0
+ jobbgt r2,r5,r6
+
+ ;; cnljob
+
+ cnljob 0
+
+ ;; qseq
+ qseq r0,[r0]
+ qseq r2,[r4]