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authorYuriy Kolerov <Yuriy.Kolerov@synopsys.com>2024-02-09 14:27:06 +0000
committerShahab Vahedi <shahab@synopsys.com>2024-02-14 11:36:52 +0100
commitc0852af0565c7a83e17f1358fac52a68e7047002 (patch)
tree861a4d3a8af806ff9a16bd7608e4dc8d8b9e5782 /gas
parentb235e90e740aa486e6bbe8243eedf109fed41a5c (diff)
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arc: Put DBNZ instruction to a separate class
DBNZ instruction decrements its source register operand, and if the result is non-zero it branches to the location defined by a signed half-word displacement operand. DBNZ instruction is in BRANCH class as other branch instrucitons like B, Bcc, etc. However, DBNZ is the only branch instruction that stores a branch offset in the second operand. Thus it must be placed in a distinct class and treated differently. For example, current logic of arc_insn_get_branch_target in GDB assumes that a branch offset is always stored in the first operand for BRANCH class and it's wrong for DBNZ. include/ChangeLog: 2024-02-14 Yuriy Kolerov <ykolerov@synopsys.com> * opcode/arc.h (enum insn_class_t): Add DBNZ class. opcodes/ChangeLog: 2024-02-14 Yuriy Kolerov <ykolerov@synopsys.com> * arc-tbl.h (dbnz): Use "DBNZ" class. * arc-dis.c (arc_opcode_to_insn_type): Handle "DBNZ" class. gas/ChangeLog: 2024-02-14 Yuriy Kolerov <ykolerov@synopsys.com> * config/tc-arc.c (is_br_jmp_insn_p): Add check against "DBNZ".
Diffstat (limited to 'gas')
-rw-r--r--gas/ChangeLog4
-rw-r--r--gas/config/tc-arc.c1
2 files changed, 5 insertions, 0 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index b1c8d09..b277f47 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,7 @@
+2024-02-14 Yuriy Kolerov <ykolerov@synopsys.com>
+
+ * config/tc-arc.c (is_br_jmp_insn_p): Add check against "DBNZ".
+
2024-01-29 Jose E. Marchesi <jose.marchesi@oracle.com>
* doc/c-bpf.texi (BPF Instructions): There is no indirect 64-bit
diff --git a/gas/config/tc-arc.c b/gas/config/tc-arc.c
index 69de96e..f7d8e89 100644
--- a/gas/config/tc-arc.c
+++ b/gas/config/tc-arc.c
@@ -109,6 +109,7 @@ enum arc_rlx_types
|| (op)->insn_class == BBIT0 \
|| (op)->insn_class == BBIT1 \
|| (op)->insn_class == BI \
+ || (op)->insn_class == DBNZ \
|| (op)->insn_class == EI \
|| (op)->insn_class == ENTER \
|| (op)->insn_class == JLI \