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authorIgor Tsimbalist <igor.v.tsimbalist@intel.com>2018-01-23 19:56:30 +0300
committerIgor Tsimbalist <igor.v.tsimbalist@intel.com>2018-01-23 20:09:35 +0300
commitbe3a8dca2d7241878302ca55f45129d532b6f746 (patch)
tree8466b4e7555c4c5c3923a92984c9875b18e609d1 /gas
parent3233d7d074e59b83f68a22071cff597f00d5ae81 (diff)
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Enable Intel PCONFIG instruction.
Intel has disclosed a set of new instructions for Icelake processor. The spec is https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf This patch enables Intel PCONFIG instruction. gas/ * config/tc-i386.c (cpu_arch): Add .pconfig. * doc/c-i386.texi: Document .pconfig. * testsuite/gas/i386/i386.exp: Add PCONFIG tests. * testsuite/gas/i386/pconfig-intel.d: New test. * testsuite/gas/i386/pconfig.d: Likewise. * testsuite/gas/i386/pconfig.s: Likewise. * testsuite/gas/i386/x86-64-pconfig-intel.d: Likewise. * testsuite/gas/i386/x86-64-pconfig.d: Likewise. * testsuite/gas/i386/x86-64-pconfig.s: Likewise. opcodes/ * i386-dis.c (enum): Add pconfig. * i386-gen.c (cpu_flag_init): Add CPU_PCONFIG_FLAGS. (cpu_flags): Add CpuPCONFIG. * i386-opc.h (enum): Add CpuPCONFIG. (i386_cpu_flags): Add cpupconfig. * i386-opc.tbl: Add PCONFIG instruction. * i386-init.h: Regenerate. * i386-tbl.h: Likewise.
Diffstat (limited to 'gas')
-rw-r--r--gas/ChangeLog12
-rw-r--r--gas/config/tc-i386.c2
-rw-r--r--gas/doc/c-i386.texi3
-rw-r--r--gas/testsuite/gas/i386/i386.exp4
-rw-r--r--gas/testsuite/gas/i386/pconfig-intel.d11
-rw-r--r--gas/testsuite/gas/i386/pconfig.d11
-rw-r--r--gas/testsuite/gas/i386/pconfig.s5
-rw-r--r--gas/testsuite/gas/i386/x86-64-pconfig-intel.d11
-rw-r--r--gas/testsuite/gas/i386/x86-64-pconfig.d11
-rw-r--r--gas/testsuite/gas/i386/x86-64-pconfig.s5
10 files changed, 74 insertions, 1 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 3ec3122..5e39685 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,5 +1,17 @@
2018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
+ * config/tc-i386.c (cpu_arch): Add .pconfig.
+ * doc/c-i386.texi: Document .pconfig.
+ * testsuite/gas/i386/i386.exp: Add PCONFIG tests.
+ * testsuite/gas/i386/pconfig-intel.d: New test.
+ * testsuite/gas/i386/pconfig.d: Likewise.
+ * testsuite/gas/i386/pconfig.s: Likewise.
+ * testsuite/gas/i386/x86-64-pconfig-intel.d: Likewise.
+ * testsuite/gas/i386/x86-64-pconfig.d: Likewise.
+ * testsuite/gas/i386/x86-64-pconfig.s: Likewise.
+
+2018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
+
* config/tc-i386.c (cpu_arch): Add .wbnoinvd.
* doc/c-i386.texi: Document .wbnoinvd.
* testsuite/gas/i386/i386.exp: Add WBNOINVD tests.
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index c629af1..32a8b31 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -1009,6 +1009,8 @@ static const arch_entry cpu_arch[] =
CPU_VPCLMULQDQ_FLAGS, 0 },
{ STRING_COMMA_LEN (".wbnoinvd"), PROCESSOR_UNKNOWN,
CPU_WBNOINVD_FLAGS, 0 },
+ { STRING_COMMA_LEN (".pconfig"), PROCESSOR_UNKNOWN,
+ CPU_PCONFIG_FLAGS, 0 },
};
static const noarch_entry cpu_noarch[] =
diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi
index a671be8..e669c5f 100644
--- a/gas/doc/c-i386.texi
+++ b/gas/doc/c-i386.texi
@@ -230,6 +230,7 @@ accept various extension mnemonics. For example,
@code{mwaitx},
@code{clzero},
@code{wbnoinvd},
+@code{pconfig},
@code{lwp},
@code{fma4},
@code{xop},
@@ -1241,7 +1242,7 @@ supported on the CPU specified. The choices for @var{cpu_type} are:
@item @samp{.avx512_vpopcntdq} @tab @samp{.avx512_vbmi2} @tab @samp{.avx512_vnni}
@item @samp{.avx512_bitalg}
@item @samp{.clwb} @tab @samp{.rdpid} @tab @samp{.ptwrite} @tab @item @samp{.ibt}
-@item @samp{.wbnoinvd}
+@item @samp{.wbnoinvd} @tab @samp{.pconfig}
@item @samp{.shstk} @tab @samp{.gfni} @tab @samp{.vaes} @tab @samp{.vpclmulqdq}
@item @samp{.3dnow} @tab @samp{.3dnowa} @tab @samp{.sse4a} @tab @samp{.sse5}
@item @samp{.syscall} @tab @samp{.rdtscp} @tab @samp{.svme} @tab @samp{.abm}
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index 4123cd8..a21ef84 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -415,6 +415,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]]
run_dump_test "vpclmulqdq-intel"
run_dump_test "wbnoinvd"
run_dump_test "wbnoinvd-intel"
+ run_dump_test "pconfig"
+ run_dump_test "pconfig-intel"
run_list_test "avx512vl-1" "-al"
run_list_test "avx512vl-2" "-al"
run_dump_test "fpu-bad"
@@ -884,6 +886,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
run_dump_test "x86-64-vpclmulqdq-intel"
run_dump_test "x86-64-wbnoinvd"
run_dump_test "x86-64-wbnoinvd-intel"
+ run_dump_test "x86-64-pconfig"
+ run_dump_test "x86-64-pconfig-intel"
run_dump_test "x86-64-fence-as-lock-add-yes"
run_dump_test "x86-64-fence-as-lock-add-no"
run_dump_test "x86-64-pr20141"
diff --git a/gas/testsuite/gas/i386/pconfig-intel.d b/gas/testsuite/gas/i386/pconfig-intel.d
new file mode 100644
index 0000000..08584fe
--- /dev/null
+++ b/gas/testsuite/gas/i386/pconfig-intel.d
@@ -0,0 +1,11 @@
+#objdump: -dwMintel
+#name: i386 PCONFIG (Intel disassembly)
+#source: pconfig.s
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <_start>:
+[ ]*[a-f0-9]+:[ ]*0f 01 c5[ ]*pconfig[ ]*
+#pass
diff --git a/gas/testsuite/gas/i386/pconfig.d b/gas/testsuite/gas/i386/pconfig.d
new file mode 100644
index 0000000..de61788
--- /dev/null
+++ b/gas/testsuite/gas/i386/pconfig.d
@@ -0,0 +1,11 @@
+#objdump: -dw
+#name: i386 PCONFIG insn
+
+.*: +file format .*
+
+
+Disassembly of section .text:
+
+0+ <_start>:
+[ ]*[a-f0-9]+:[ ]*0f 01 c5[ ]*pconfig[ ]*
+#pass
diff --git a/gas/testsuite/gas/i386/pconfig.s b/gas/testsuite/gas/i386/pconfig.s
new file mode 100644
index 0000000..f08c628
--- /dev/null
+++ b/gas/testsuite/gas/i386/pconfig.s
@@ -0,0 +1,5 @@
+# Check 32bit PCONFIG instructions.
+
+ .text
+_start:
+ pconfig
diff --git a/gas/testsuite/gas/i386/x86-64-pconfig-intel.d b/gas/testsuite/gas/i386/x86-64-pconfig-intel.d
new file mode 100644
index 0000000..08584fe
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-pconfig-intel.d
@@ -0,0 +1,11 @@
+#objdump: -dwMintel
+#name: i386 PCONFIG (Intel disassembly)
+#source: pconfig.s
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <_start>:
+[ ]*[a-f0-9]+:[ ]*0f 01 c5[ ]*pconfig[ ]*
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-pconfig.d b/gas/testsuite/gas/i386/x86-64-pconfig.d
new file mode 100644
index 0000000..de61788
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-pconfig.d
@@ -0,0 +1,11 @@
+#objdump: -dw
+#name: i386 PCONFIG insn
+
+.*: +file format .*
+
+
+Disassembly of section .text:
+
+0+ <_start>:
+[ ]*[a-f0-9]+:[ ]*0f 01 c5[ ]*pconfig[ ]*
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-pconfig.s b/gas/testsuite/gas/i386/x86-64-pconfig.s
new file mode 100644
index 0000000..8fb9b02
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-pconfig.s
@@ -0,0 +1,5 @@
+# Check 64bit PCONFIG instructions.
+
+ .text
+_start:
+ pconfig