[ARC] Sync cpu names with the ones accepted by GCC.

gas/
2016-12-02  Claudiu Zissulescu  <claziss@synopsys.com>

	* testsuite/gas/arc/cpu-em-err.s: New file.
	* testsuite/gas/arc/cpu-em4-err.s: Likewise.
	* testsuite/gas/arc/cpu-fpuda-err.s: Likewise.
	* testsuite/gas/arc/cpu-hs-err.s: Likewise.
	* testsuite/gas/arc/cpu-quarkse-err.s: Likewise.
	* testsuite/gas/arc/noargs_a7.s: Add .cpu.
	* config/tc-arc.c (ARC_CPU_TYPE_A6xx): Define.
	(ARC_CPU_TYPE_A7xx): Likewise.
	(ARC_CPU_TYPE_AV2EM): Likewise.
	(ARC_CPU_TYPE_AV2HS): Likewise.
	(cpu_types): Update list of known CPU names.
	(arc_show_cpu_list): New function.
	(md_show_usage): Print accepted CPU names.
	(cl_features): New variable.
	(arc_select_cpu): Use cl_features.
	(arc_option): Allow various .cpu names.
	(md_parse_option): Set cl_features.
	* doc/c-arc.texi: Update -mcpu and .cpu documentation.

9 files changed, 237 insertions, 22 deletions

diff --git a/gas/ChangeLog b/gas/ChangeLog
index f0985bb..3a43fba 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,24 @@
+2016-12-02  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* testsuite/gas/arc/cpu-em-err.s: New file.
+	* testsuite/gas/arc/cpu-em4-err.s: Likewise.
+	* testsuite/gas/arc/cpu-fpuda-err.s: Likewise.
+	* testsuite/gas/arc/cpu-hs-err.s: Likewise.
+	* testsuite/gas/arc/cpu-quarkse-err.s: Likewise.
+	* testsuite/gas/arc/noargs_a7.s: Add .cpu.
+	* config/tc-arc.c (ARC_CPU_TYPE_A6xx): Define.
+	(ARC_CPU_TYPE_A7xx): Likewise.
+	(ARC_CPU_TYPE_AV2EM): Likewise.
+	(ARC_CPU_TYPE_AV2HS): Likewise.
+	(cpu_types): Update list of known CPU names.
+	(arc_show_cpu_list): New function.
+	(md_show_usage): Print accepted CPU names.
+	(cl_features): New variable.
+	(arc_select_cpu): Use cl_features.
+	(arc_option): Allow various .cpu names.
+	(md_parse_option): Set cl_features.
+	* doc/c-arc.texi: Update -mcpu and .cpu documentation.
+
 2016-12-02  Josh Conner  <joshconner@google.com>
 
 	* configure.tgt: Add support for fuchsia (OS).
diff --git a/gas/config/tc-arc.c b/gas/config/tc-arc.c
index f5cbc8b..13e925f 100644
--- a/gas/config/tc-arc.c
+++ b/gas/config/tc-arc.c
@@ -426,6 +426,19 @@ static struct hash_control *arc_aux_hash;
 /* The hash table of address types.  */
 static struct hash_control *arc_addrtype_hash;
 
+#define ARC_CPU_TYPE_A6xx(NAME,EXTRA)			\
+  { #NAME, ARC_OPCODE_ARC600, bfd_mach_arc_arc600,	\
+      E_ARC_MACH_ARC600, EXTRA}
+#define ARC_CPU_TYPE_A7xx(NAME,EXTRA)			\
+  { #NAME, ARC_OPCODE_ARC700,  bfd_mach_arc_arc700,	\
+      E_ARC_MACH_ARC700, EXTRA}
+#define ARC_CPU_TYPE_AV2EM(NAME,EXTRA)			\
+  { #NAME,  ARC_OPCODE_ARCv2EM, bfd_mach_arc_arcv2,	\
+      EF_ARC_CPU_ARCV2EM, EXTRA}
+#define ARC_CPU_TYPE_AV2HS(NAME,EXTRA)			\
+  { #NAME,  ARC_OPCODE_ARCv2HS, bfd_mach_arc_arcv2,	\
+      EF_ARC_CPU_ARCV2HS, EXTRA}
+
 /* A table of CPU names and opcode sets.  */
 static const struct cpu_type
 {
@@ -437,16 +450,31 @@ static const struct cpu_type
 }
   cpu_types[] =
 {
-  { "arc600", ARC_OPCODE_ARC600,  bfd_mach_arc_arc600,
-    E_ARC_MACH_ARC600,  0x00},
-  { "arc700", ARC_OPCODE_ARC700,  bfd_mach_arc_arc700,
-    E_ARC_MACH_ARC700,  0x00},
-  { "nps400", ARC_OPCODE_ARC700 , bfd_mach_arc_arc700,
-    E_ARC_MACH_ARC700,  ARC_NPS400},
-  { "arcem",  ARC_OPCODE_ARCv2EM, bfd_mach_arc_arcv2,
-    EF_ARC_CPU_ARCV2EM, 0x00},
-  { "archs",  ARC_OPCODE_ARCv2HS, bfd_mach_arc_arcv2,
-    EF_ARC_CPU_ARCV2HS, ARC_CD},
+  ARC_CPU_TYPE_A7xx (arc700, 0x00),
+  ARC_CPU_TYPE_A7xx (nps400, ARC_NPS400),
+
+  ARC_CPU_TYPE_AV2EM (arcem,	  0x00),
+  ARC_CPU_TYPE_AV2EM (em,	  0x00),
+  ARC_CPU_TYPE_AV2EM (em4,	  ARC_CD),
+  ARC_CPU_TYPE_AV2EM (em4_dmips,  ARC_CD),
+  ARC_CPU_TYPE_AV2EM (em4_fpus,	  ARC_CD),
+  ARC_CPU_TYPE_AV2EM (em4_fpuda,  ARC_CD | ARC_FPUDA),
+  ARC_CPU_TYPE_AV2EM (quarkse_em, ARC_CD | ARC_SPFP | ARC_DPFP),
+
+  ARC_CPU_TYPE_AV2HS (archs,	  ARC_CD),
+  ARC_CPU_TYPE_AV2HS (hs,	  ARC_CD),
+  ARC_CPU_TYPE_AV2HS (hs34,	  ARC_CD),
+  ARC_CPU_TYPE_AV2HS (hs38,	  ARC_CD),
+  ARC_CPU_TYPE_AV2HS (hs38_linux, ARC_CD),
+
+  ARC_CPU_TYPE_A6xx (arc600, 0x00),
+  ARC_CPU_TYPE_A6xx (arc600_norm,     0x00),
+  ARC_CPU_TYPE_A6xx (arc600_mul64,    0x00),
+  ARC_CPU_TYPE_A6xx (arc600_mul32x16, 0x00),
+  ARC_CPU_TYPE_A6xx (arc601,	      0x00),
+  ARC_CPU_TYPE_A6xx (arc601_norm,     0x00),
+  ARC_CPU_TYPE_A6xx (arc601_mul64,    0x00),
+  ARC_CPU_TYPE_A6xx (arc601_mul32x16, 0x00),
   { 0, 0, 0, 0, 0 }
 };
 
@@ -469,6 +497,9 @@ static const struct feature_type
   { ARC_FPUDA, ARC_OPCODE_ARCv2EM, "double assist FP" }
 };
 
+/* Command line given features.  */
+static unsigned cl_features = 0;
+
 /* Used by the arc_reloc_op table.  Order is important.  */
 #define O_gotoff  O_md1     /* @gotoff relocation.  */
 #define O_gotpc   O_md2     /* @gotpc relocation.  */
@@ -855,7 +886,7 @@ arc_select_cpu (const char *arg, enum mach_selection_type sel)
 	  /* Initialise static global data about selected machine type.  */
 	  selected_cpu.flags = cpu_types[i].flags;
 	  selected_cpu.name = cpu_types[i].name;
-	  selected_cpu.features |= cpu_types[i].features;
+	  selected_cpu.features = cpu_types[i].features | cl_features;
 	  selected_cpu.mach = cpu_types[i].mach;
 	  cpu_flags = cpu_types[i].eflags;
           break;
@@ -978,6 +1009,7 @@ arc_option (int ignore ATTRIBUTE_UNUSED)
 
   c = get_symbol_name (&cpu);
 
+  cpu_name = cpu;
   if ((!strcmp ("ARC600", cpu))
       || (!strcmp ("ARC601", cpu))
       || (!strcmp ("A6", cpu)))
@@ -991,13 +1023,8 @@ arc_option (int ignore ATTRIBUTE_UNUSED)
     cpu_name = "archs";
   else if (!strcmp ("NPS400", cpu))
     cpu_name = "nps400";
-  else
-    cpu_name = NULL;
 
-  if (cpu_name != NULL)
-    arc_select_cpu (cpu_name, MACH_SELECTION_FROM_CPU_DIRECTIVE);
-  else
-    as_fatal (_("invalid architecture `%s' in .cpu directive"), cpu);
+  arc_select_cpu (cpu_name, MACH_SELECTION_FROM_CPU_DIRECTIVE);
 
   if (!bfd_set_arch_mach (stdoutput, bfd_arch_arc, selected_cpu.mach))
     as_fatal (_("could not set architecture and machine"));
@@ -3354,6 +3381,7 @@ md_parse_option (int c, const char *arg ATTRIBUTE_UNUSED)
 
     case OPTION_CD:
       selected_cpu.features |= ARC_CD;
+      cl_features |= ARC_CD;
       arc_check_feature ();
       break;
 
@@ -3363,21 +3391,25 @@ md_parse_option (int c, const char *arg ATTRIBUTE_UNUSED)
 
     case OPTION_NPS400:
       selected_cpu.features |= ARC_NPS400;
+      cl_features |= ARC_NPS400;
       arc_check_feature ();
       break;
 
     case OPTION_SPFP:
       selected_cpu.features |= ARC_SPFP;
+      cl_features |= ARC_SPFP;
       arc_check_feature ();
       break;
 
     case OPTION_DPFP:
       selected_cpu.features |= ARC_DPFP;
+      cl_features |= ARC_DPFP;
       arc_check_feature ();
       break;
 
     case OPTION_FPUDA:
       selected_cpu.features |= ARC_FPUDA;
+      cl_features |= ARC_FPUDA;
       arc_check_feature ();
       break;
 
@@ -3411,22 +3443,53 @@ md_parse_option (int c, const char *arg ATTRIBUTE_UNUSED)
   return 1;
 }
 
+/* Display the list of cpu names for use in the help text.  */
+
+static void
+arc_show_cpu_list (FILE *stream)
+{
+  int i, offset;
+  static const char *spaces = "                          ";
+
+  fprintf (stream, "%s", spaces);
+  offset = strlen (spaces);
+  for (i = 0; cpu_types[i].name != NULL; ++i)
+    {
+      bfd_boolean last = (cpu_types[i + 1].name == NULL);
+
+      /* If displaying the new cpu name string, and the ', ' (for all
+         but the last one) will take us past a target width of 80
+         characters, then it's time for a new line.  */
+      if (offset + strlen (cpu_types[i].name) + (last ? 0 : 2) > 80)
+        {
+          fprintf (stream, "\n%s", spaces);
+          offset = strlen (spaces);
+        }
+
+      fprintf (stream, "%s%s", cpu_types[i].name, (last ? "\n" : ", "));
+      offset += strlen (cpu_types [i].name) + (last ? 0 : 2);
+    }
+}
+
 void
 md_show_usage (FILE *stream)
 {
   fprintf (stream, _("ARC-specific assembler options:\n"));
 
-  fprintf (stream, "  -mcpu=<cpu name>\t  assemble for CPU <cpu name> "
-           "(default: %s)\n", TARGET_WITH_CPU);
-  fprintf (stream, "  -mcpu=nps400\t\t  same as -mcpu=arc700 -mnps400\n");
+  fprintf (stream, "  -mcpu=<cpu name>\t  (default: %s), assemble for"
+           " CPU <cpu name>, one of:\n", TARGET_WITH_CPU);
+  arc_show_cpu_list (stream);
+  fprintf (stream, "\n");
   fprintf (stream, "  -mA6/-mARC600/-mARC601  same as -mcpu=arc600\n");
   fprintf (stream, "  -mA7/-mARC700\t\t  same as -mcpu=arc700\n");
   fprintf (stream, "  -mEM\t\t\t  same as -mcpu=arcem\n");
   fprintf (stream, "  -mHS\t\t\t  same as -mcpu=archs\n");
 
   fprintf (stream, "  -mnps400\t\t  enable NPS-400 extended instructions\n");
-  fprintf (stream, "  -mspfp\t\t  enable single-precision floating point instructions\n");
-  fprintf (stream, "  -mdpfp\t\t  enable double-precision floating point instructions\n");
+  fprintf (stream, "  -mspfp\t\t  enable single-precision floating point"
+	   " instructions\n");
+  fprintf (stream, "  -mdpfp\t\t  enable double-precision floating point"
+	   " instructions\n");
   fprintf (stream, "  -mfpuda\t\t  enable double-precision assist floating "
                    "point\n\t\t\t  instructions for ARC EM\n");
 
diff --git a/gas/doc/c-arc.texi b/gas/doc/c-arc.texi
index 64522db..2a59c63 100644
--- a/gas/doc/c-arc.texi
+++ b/gas/doc/c-arc.texi
@@ -47,10 +47,28 @@ convenience.  Supported values for @var{cpu} are
 @item arc600
 Assemble for ARC 600.  Aliases: @code{-mA6}, @code{-mARC600}.
 
+@item arc600_norm
+Assemble for ARC 600 with norm instructions.
+
+@item arc600_mul64
+Assemble for ARC 600 with mul64 instructions.
+
+@item arc600_mul32x16
+Assemble for ARC 600 with mul32x16 instructions.
+
 @item arc601
 @cindex @code{mARC601} command line option, ARC
 Assemble for ARC 601.  Alias: @code{-mARC601}.
 
+@item arc601_norm
+Assemble for ARC 601 with norm instructions.
+
+@item arc601_mul64
+Assemble for ARC 601 with mul64 instructions.
+
+@item arc601_mul32x16
+Assemble for ARC 601 with mul32x16 instructions.
+
 @item arc700
 @cindex @code{mA7} command line option, ARC
 @cindex @code{mARC700} command line option, ARC
@@ -60,10 +78,41 @@ Assemble for ARC 700.  Aliases: @code{-mA7}, @code{-mARC700}.
 @cindex @code{mEM} command line option, ARC
 Assemble for ARC EM.  Aliases: @code{-mEM}
 
+@item em
+Assemble for ARC EM, identical as arcem variant.
+
+@item em4
+Assemble for ARC EM with code-density instructions.
+
+@item em4_dmips
+Assemble for ARC EM with code-density instructions.
+
+@item em4_fpus
+Assemble for ARC EM with code-density instructions.
+
+@item em4_fpuda
+Assemble for ARC EM with code-density, and double-precision assist
+instructions.
+
+@item quarkse_em
+Assemble for QuarkSE-EM cpu.
+
 @item archs
 @cindex @code{mHS} command line option, ARC
 Assemble for ARC HS.  Aliases: @code{-mHS}, @code{-mav2hs}.
 
+@item hs
+Assemble for ARC HS.
+
+@item hs34
+Assemble for ARC HS34.
+
+@item hs38
+Assemble for ARC HS38.
+
+@item hs38_linux
+Assemble for ARC HS38 with floating point support on.
+
 @item nps400
 @cindex @code{mnps400} command line option, ARC
 Assemble for ARC 700 with NPS-400 extended instructions.
@@ -368,6 +417,27 @@ version.  Permitted values for CPU are:
 @item ARC600
 Assemble for the ARC600 instruction set.
 
+@item arc600_norm
+Assemble for ARC 600 with norm instructions.
+
+@item arc600_mul64
+Assemble for ARC 600 with mul64 instructions.
+
+@item arc600_mul32x16
+Assemble for ARC 600 with mul32x16 instructions.
+
+@item arc601
+Assemble for ARC 601 instruction set.
+
+@item arc601_norm
+Assemble for ARC 601 with norm instructions.
+
+@item arc601_mul64
+Assemble for ARC 601 with mul64 instructions.
+
+@item arc601_mul32x16
+Assemble for ARC 601 with mul32x16 instructions.
+
 @item ARC700
 Assemble for the ARC700 instruction set.
 
@@ -377,9 +447,43 @@ Assemble for the NPS400 instruction set.
 @item EM
 Assemble for the ARC EM instruction set.
 
+@item arcem
+Assemble for ARC EM instruction set
+
+@item em4
+Assemble for ARC EM with code-density instructions.
+
+@item em4_dmips
+Assemble for ARC EM with code-density instructions.
+
+@item em4_fpus
+Assemble for ARC EM with code-density instructions.
+
+@item em4_fpuda
+Assemble for ARC EM with code-density, and double-precision assist
+instructions.
+
+@item quarkse_em
+Assemble for QuarkSE-EM instruction set.
+
 @item HS
 Assemble for the ARC HS instruction set.
 
+@item archs
+Assemble for ARC HS instruction set.
+
+@item hs
+Assemble for ARC HS instruction set.
+
+@item hs34
+Assemble for ARC HS34 instruction set.
+
+@item hs38
+Assemble for ARC HS38 instruction set.
+
+@item hs38_linux
+Assemble for ARC HS38 with floating point support on.
+
 @end table
 
 Note: the @code{.cpu} directive overrides the command line option
diff --git a/gas/testsuite/gas/arc/cpu-em-err.s b/gas/testsuite/gas/arc/cpu-em-err.s
new file mode 100644
index 0000000..4faaae7
--- /dev/null
+++ b/gas/testsuite/gas/arc/cpu-em-err.s
@@ -0,0 +1,4 @@
+;;; Check if .cpu em doesn't have code-density ops.
+; { dg-do assemble { target arc*-*-* } }
+	.cpu	em
+	sub_s r15,r2,r15	; { dg-error "Error: inappropriate arguments for opcode 'sub_s'" }
diff --git a/gas/testsuite/gas/arc/cpu-em4-err.s b/gas/testsuite/gas/arc/cpu-em4-err.s
new file mode 100644
index 0000000..7c1de24
--- /dev/null
+++ b/gas/testsuite/gas/arc/cpu-em4-err.s
@@ -0,0 +1,4 @@
+;;; Check if .cpu em4 has code-density ops.
+; { dg-do assemble { target arc*-*-* } }
+	.cpu	em4
+	sub_s r15,r2,r15
diff --git a/gas/testsuite/gas/arc/cpu-fpuda-err.s b/gas/testsuite/gas/arc/cpu-fpuda-err.s
new file mode 100644
index 0000000..b4cabf8
--- /dev/null
+++ b/gas/testsuite/gas/arc/cpu-fpuda-err.s
@@ -0,0 +1,6 @@
+;;; Check if .cpu em4_fpuda has code-density and fpuda ops.
+; { dg-do assemble { target arc*-*-* } }
+	.cpu	em4_fpuda
+	sub_s 	r15,r2,r15	; code-density op
+	dmulh11	r1,r2,r3	; fpuda op
+	fadd	r1,r2,r3	; { dg-error "Error: opcode 'fadd' not supported for target em4_fpuda" }
diff --git a/gas/testsuite/gas/arc/cpu-hs-err.s b/gas/testsuite/gas/arc/cpu-hs-err.s
new file mode 100644
index 0000000..b8763b4
--- /dev/null
+++ b/gas/testsuite/gas/arc/cpu-hs-err.s
@@ -0,0 +1,5 @@
+;;; Check if .cpu hs has code-density
+; { dg-do assemble { target arc*-*-* } }
+	.cpu	hs
+	sub_s 	r15,r2,r15	; code-density op
+	dmulh11	r1,r2,r3	; { dg-error "Error: opcode 'dmulh11' not supported for target hs" }
diff --git a/gas/testsuite/gas/arc/cpu-quarkse-err.s b/gas/testsuite/gas/arc/cpu-quarkse-err.s
new file mode 100644
index 0000000..0cf2c26
--- /dev/null
+++ b/gas/testsuite/gas/arc/cpu-quarkse-err.s
@@ -0,0 +1,7 @@
+;;; Check if .cpu em4_quarkse has code-density, spfp and dpfp ops.
+; { dg-do assemble { target arc*-*-* } }
+	.cpu	quarkse_em
+	sub_s 	r15,r2,r15	; code-density op
+	dmulh11	r1,r2,r3	; dpfp op
+	fadd	r1,r2,r3	; spfp op
+	dsp_fp_div r2,r2,r3	; QuarkSE-EM specific
diff --git a/gas/testsuite/gas/arc/noargs_a7.s b/gas/testsuite/gas/arc/noargs_a7.s
index 3158a05..ca247ad 100644
--- a/gas/testsuite/gas/arc/noargs_a7.s
+++ b/gas/testsuite/gas/arc/noargs_a7.s
@@ -1,4 +1,5 @@
 #Test if the following mnemonics are recognized for ARC700
+	.cpu ARC700
 	rtie
 	sleep
 	nop_s