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| author | Max Filippov <jcmvbkbc@gmail.com> | 2020-04-28 04:15:05 -0700 |
|---|---|---|
| committer | Max Filippov <jcmvbkbc@gmail.com> | 2020-04-29 18:31:32 -0700 |
| commit | 935f1f4ba35dc018ec6adbc1ba5f0787c84f273b (patch) | |
| tree | 22af1878042971f615dbaa26714db5f1fa108c9c /gas | |
| parent | ffc2844e9672ce4b2d9d2a4f6f676a46f64f4d09 (diff) | |
| download | gdb-935f1f4ba35dc018ec6adbc1ba5f0787c84f273b.zip gdb-935f1f4ba35dc018ec6adbc1ba5f0787c84f273b.tar.gz gdb-935f1f4ba35dc018ec6adbc1ba5f0787c84f273b.tar.bz2 | |
xtensa: gas: support optional immediate simcall parameter
Starting with RH.0 release Xtensa ISA adds immediate parameter to
simcall opcode. For assembly source compatibility treat "simcall"
instruction without parameter as "simcall 0" when parameter is required.
2020-04-29 Max Filippov <jcmvbkbc@gmail.com>
gas/
* config/tc-xtensa.c (XTENSA_MARCH_EARLIEST): Define macro as 0
if it's not defined.
(microarch_earliest): New static variable.
(xg_translate_idioms): Translate "simcall" to "simcall 0" when
simcall opcode has mandatory parameter.
(xg_init_global_config): Initialize microarch_earliest.
Diffstat (limited to 'gas')
| -rw-r--r-- | gas/ChangeLog | 9 | ||||
| -rw-r--r-- | gas/config/tc-xtensa.c | 20 |
2 files changed, 29 insertions, 0 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 69e117c..f47deba 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,12 @@ +2020-04-29 Max Filippov <jcmvbkbc@gmail.com> + + * config/tc-xtensa.c (XTENSA_MARCH_EARLIEST): Define macro as 0 + if it's not defined. + (microarch_earliest): New static variable. + (xg_translate_idioms): Translate "simcall" to "simcall 0" when + simcall opcode has mandatory parameter. + (xg_init_global_config): Initialize microarch_earliest. + 2020-04-29 Nick Clifton <nickc@redhat.com> PR 22699 diff --git a/gas/config/tc-xtensa.c b/gas/config/tc-xtensa.c index ee75c13..14a5a2a 100644 --- a/gas/config/tc-xtensa.c +++ b/gas/config/tc-xtensa.c @@ -35,6 +35,10 @@ #define XSHAL_ABI 0 #endif +#ifndef XTENSA_MARCH_EARLIEST +#define XTENSA_MARCH_EARLIEST 0 +#endif + #ifndef uint32 #define uint32 unsigned int #endif @@ -74,6 +78,8 @@ const char FLT_CHARS[] = "rRsSfFdDxXpP"; bfd_boolean density_supported; bfd_boolean absolute_literals_supported; +static unsigned microarch_earliest; + static vliw_insn cur_vinsn; unsigned xtensa_num_pipe_stages; @@ -2502,6 +2508,18 @@ xg_translate_idioms (char **popname, int *pnum_args, char **arg_strings) return 0; } + /* Without an operand, this is given a default immediate operand of 0. */ + if ((strcmp (opname, "simcall") == 0 && microarch_earliest >= 280000)) + { + if (*pnum_args == 0) + { + arg_strings[0] = (char *) xmalloc (2); + strcpy (arg_strings[0], "0"); + *pnum_args = 1; + } + return 0; + } + if (strcmp (opname, "bbsi.l") == 0) { if (xg_check_num_args (pnum_args, 3, opname, arg_strings)) @@ -5236,6 +5254,8 @@ xg_init_global_config (void) directive_state[directive_density] = XCHAL_HAVE_DENSITY; directive_state[directive_absolute_literals] = XSHAL_USE_ABSOLUTE_LITERALS; + + microarch_earliest = XTENSA_MARCH_EARLIEST; } void |