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authorH.J. Lu <hjl.tools@gmail.com>2009-12-16 15:43:16 +0000
committerH.J. Lu <hjl.tools@gmail.com>2009-12-16 15:43:16 +0000
commit7f399153c6099e976a06562a602f9654f506b64e (patch)
tree33f7b86622b4c070c7987fdd5bb79b1fc82a0d5c /gas
parent76c10ea2bb2559aa32ea4b846d30a606b6f78bff (diff)
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Replace Vex0F, Vex0F38, Vex0F3A, XOP08, XOP09 and XOP0A with VexOpcode.
gas/ 2009-12-16 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (build_vex_prefix): Replace vex0f, vex0f38, vex0f3a, xop08, xop09 and xop0a with vexopcode. opcodes/ 2009-12-16 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (opcode_modifiers): Remove Vex0F, Vex0F38, Vex0F3A, XOP08, XOP09 and XOP0A. Add VexOpcode. * i386-opc.h (Vex0F): Removed. (Vex0F38): Likewise. (Vex0F3A): Likewise. (VexOpcode): New. (VEX0F): Likewise. (VEX0F38): Likewise. (VEX0F3A): Likewise. (XOP08): Defined as a macro. (XOP09): Likewise. (XOP0A): Likewise. (i386_opcode_modifier): Remove vex0f, vex0f38, vex0f3a, xop08, xop09 and xop0a. Add vexopcode. * i386-opc.tbl: Replace Vex0F with VexOpcode=0, Vex0F38 with VexOpcode=1, Vex0F3A with VexOpcode=2, XOP08 with VexOpcode=3, XOP09 with VexOpcode=4 and XOP0A with VexOpcode=5. * i386-tbl.h: Regenerated.
Diffstat (limited to 'gas')
-rw-r--r--gas/ChangeLog5
-rw-r--r--gas/config/tc-i386.c37
2 files changed, 25 insertions, 17 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 816ce34..68dec63 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2009-12-16 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (build_vex_prefix): Replace vex0f, vex0f38,
+ vex0f3a, xop08, xop09 and xop0a with vexopcode.
+
2009-12-15 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (build_modrm_byte): Check XOP2SOURCES
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 0ddf871..bd4ca3d 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -2675,7 +2675,7 @@ build_vex_prefix (const insn_template *t)
operand. */
if (!i.swap_operand
&& i.operands == i.reg_operands
- && i.tm.opcode_modifier.vex0f
+ && i.tm.opcode_modifier.vexopcode == VEX0F
&& i.tm.opcode_modifier.s
&& i.rex == REX_B)
{
@@ -2722,7 +2722,7 @@ build_vex_prefix (const insn_template *t)
}
/* Use 2-byte VEX prefix if possible. */
- if (i.tm.opcode_modifier.vex0f
+ if (i.tm.opcode_modifier.vexopcode == VEX0F
&& (i.rex & (REX_W | REX_X | REX_B)) == 0)
{
/* 2-byte VEX prefix. */
@@ -2746,29 +2746,32 @@ build_vex_prefix (const insn_template *t)
i.vex.length = 3;
i.vex.bytes[0] = 0xc4;
- if (i.tm.opcode_modifier.vex0f)
- m = 0x1;
- else if (i.tm.opcode_modifier.vex0f38)
- m = 0x2;
- else if (i.tm.opcode_modifier.vex0f3a)
- m = 0x3;
- else if (i.tm.opcode_modifier.xop08)
+ switch (i.tm.opcode_modifier.vexopcode)
{
+ case VEX0F:
+ m = 0x1;
+ break;
+ case VEX0F38:
+ m = 0x2;
+ break;
+ case VEX0F3A:
+ m = 0x3;
+ break;
+ case XOP08:
m = 0x8;
i.vex.bytes[0] = 0x8f;
- }
- else if (i.tm.opcode_modifier.xop09)
- {
+ break;
+ case XOP09:
m = 0x9;
i.vex.bytes[0] = 0x8f;
- }
- else if (i.tm.opcode_modifier.xop0a)
- {
+ break;
+ case XOP0A:
m = 0xa;
i.vex.bytes[0] = 0x8f;
+ break;
+ default:
+ abort ();
}
- else
- abort ();
/* The high 3 bits of the second VEX byte are 1's compliment
of RXB bits from REX. */