[BINUTILS, AARCH64, 7/8] Add system registers for Memory Tagging Extension

This patch is part of the patch series to add support for ARMv8.5-A
Memory Tagging Extensions which is an optional extension to
ARMv8.5-A and is enabled using the +memtag command line option.

This patch adds all the system registers that are part of this
extension and are accessible via the MRS/MSR instructions:
- TCO
- TFSRE0_SL1
- TFSR_EL1
- TFSR_EL2
- TFSR_EL3
- TFSR_EL12
- RGSR_EL1
- GCR_EL1
TCO is also accessible with the MSR(immediate) instruction.

*** opcodes/ChangeLog ***

2018-11-12  Sudakshina Das  <sudi.das@arm.com>

	* aarch64-opc.c (aarch64_sys_regs): New entries for TCO,
	TFSRE0_SL1, TFSR_EL1, TFSR_EL2, TFSR_EL3, TFSR_EL12,
	RGSR_EL1 and GCR_EL1.
	(aarch64_sys_reg_supported_p): New check for above.
	(aarch64_pstatefields): New entry for TCO.
	(aarch64_pstatefield_supported_p): New check for above.

*** gas/ChangeLog ***

2018-11-12  Sudakshina Das  <sudi.das@arm.com>

	* testsuite/gas/aarch64/sysreg-4.s: Test TCO, TFSRE0_SL1,
	TFSR_EL1, TFSR_EL2, TFSR_EL3, TFSR_EL12, RGSR_EL1 and
	GCR_EL1 MSR and MRS.
	* testsuite/gas/aarch64/sysreg-4.d: Likewise.
	* testsuite/gas/aarch64/illegal-sysreg-4.l: Likewise.

4 files changed, 75 insertions, 1 deletions

diff --git a/gas/ChangeLog b/gas/ChangeLog
index eea9a4e..1709a9e 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,5 +1,13 @@
 2018-11-12  Sudakshina Das  <sudi.das@arm.com>
 
+	* testsuite/gas/aarch64/sysreg-4.s: Test TCO, TFSRE0_SL1,
+	TFSR_EL1, TFSR_EL2, TFSR_EL3, TFSR_EL12, RGSR_EL1 and
+	GCR_EL1 MSR and MRS.
+	* testsuite/gas/aarch64/sysreg-4.d: Likewise.
+	* testsuite/gas/aarch64/illegal-sysreg-4.l: Likewise.
+
+2018-11-12  Sudakshina Das  <sudi.das@arm.com>
+
 	* config/tc-aarch64.c (parse_operands): Add switch case for
 	AARCH64_OPND_ADDR_SIMPLE_2 and allow [base]! for it.
 	(warn_unpredictable_ldst): Exempt ldstgv_indexed for ldgv.
diff --git a/gas/testsuite/gas/aarch64/illegal-sysreg-4.l b/gas/testsuite/gas/aarch64/illegal-sysreg-4.l
index 35c3cea..36abf4f 100644
--- a/gas/testsuite/gas/aarch64/illegal-sysreg-4.l
+++ b/gas/testsuite/gas/aarch64/illegal-sysreg-4.l
@@ -14,3 +14,24 @@
 [^:]*:[0-9]+: Error: selected processor does not support system register name 'scxtnum_el3'
 [^:]*:[0-9]+: Error: selected processor does not support system register name 'scxtnum_el12'
 [^:]*:[0-9]+: Error: selected processor does not support system register name 'id_pfr2_el1'
+[^:]*:[0-9]+: Error: selected processor does not support system register name 'tco'
+[^:]*:[0-9]+: Error: selected processor does not support system register name 'tco'
+[^:]*:[0-9]+: Error: selected processor does not support system register name 'tfsre0_el1'
+[^:]*:[0-9]+: Error: selected processor does not support system register name 'tfsr_el1'
+[^:]*:[0-9]+: Error: selected processor does not support system register name 'tfsr_el2'
+[^:]*:[0-9]+: Error: selected processor does not support system register name 'tfsr_el3'
+[^:]*:[0-9]+: Error: selected processor does not support system register name 'tfsr_el12'
+[^:]*:[0-9]+: Error: selected processor does not support system register name 'rgsr_el1'
+[^:]*:[0-9]+: Error: selected processor does not support system register name 'gcr_el1'
+[^:]*:[0-9]+: Error: selected processor does not support PSTATE field name 'tco'
+[^:]*:[0-9]+: Error: selected processor does not support system register name 'tco'
+[^:]*:[0-9]+: Error: selected processor does not support PSTATE field name 'tco'
+[^:]*:[0-9]+: Error: selected processor does not support system register name 'tco'
+[^:]*:[0-9]+: Error: selected processor does not support system register name 'tfsre0_el1'
+[^:]*:[0-9]+: Error: selected processor does not support system register name 'tfsr_el1'
+[^:]*:[0-9]+: Error: selected processor does not support system register name 'tfsr_el2'
+[^:]*:[0-9]+: Error: selected processor does not support system register name 'tfsr_el3'
+[^:]*:[0-9]+: Error: selected processor does not support system register name 'tfsr_el12'
+[^:]*:[0-9]+: Error: selected processor does not support system register name 'rgsr_el1'
+[^:]*:[0-9]+: Error: selected processor does not support system register name 'gcr_el1'
+[^:]*:[0-9]+: Error: selected processor does not support PSTATE field name 'tco'
diff --git a/gas/testsuite/gas/aarch64/sysreg-4.d b/gas/testsuite/gas/aarch64/sysreg-4.d
index c24a232..0abeed8 100644
--- a/gas/testsuite/gas/aarch64/sysreg-4.d
+++ b/gas/testsuite/gas/aarch64/sysreg-4.d
@@ -1,5 +1,5 @@
 #source: sysreg-4.s
-#as: -march=armv8.5-a+rng
+#as: -march=armv8.5-a+rng+memtag
 #objdump: -dr
 
 .*:     file format .*
@@ -19,3 +19,22 @@ Disassembly of section \.text:
 .*:	d53ed0e7 	mrs	x7, scxtnum_el3
 .*:	d53dd0e7 	mrs	x7, scxtnum_el12
 .*:	d5380388 	mrs	x8, id_pfr2_el1
+.*:	d53b42e1 	mrs	x1, tco
+.*:	d53b42e2 	mrs	x2, tco
+.*:	d5386621 	mrs	x1, tfsre0_el1
+.*:	d5386501 	mrs	x1, tfsr_el1
+.*:	d53c6502 	mrs	x2, tfsr_el2
+.*:	d53e6603 	mrs	x3, tfsr_el3
+.*:	d53d660c 	mrs	x12, tfsr_el12
+.*:	d53810a1 	mrs	x1, rgsr_el1
+.*:	d53810c3 	mrs	x3, gcr_el1
+.*:	d51b42e1 	msr	tco, x1
+.*:	d51b42e2 	msr	tco, x2
+.*:	d5186621 	msr	tfsre0_el1, x1
+.*:	d5186501 	msr	tfsr_el1, x1
+.*:	d51c6502 	msr	tfsr_el2, x2
+.*:	d51e6603 	msr	tfsr_el3, x3
+.*:	d51d660c 	msr	tfsr_el12, x12
+.*:	d51810a1 	msr	rgsr_el1, x1
+.*:	d51810c3 	msr	gcr_el1, x3
+.*:	d503489f 	msr	tco, #0x8
diff --git a/gas/testsuite/gas/aarch64/sysreg-4.s b/gas/testsuite/gas/aarch64/sysreg-4.s
index b8f40d4..d25e9b9 100644
--- a/gas/testsuite/gas/aarch64/sysreg-4.s
+++ b/gas/testsuite/gas/aarch64/sysreg-4.s
@@ -12,3 +12,29 @@ func:
 	mrs x7, scxtnum_el3
 	mrs x7, scxtnum_el12
 	mrs x8, id_pfr2_el1
+
+	# ARMv8.5-a+memtag
+	# MRS (register)
+	mrs x1, tco
+	mrs x2, TCO
+	mrs x1, tfsre0_el1
+	mrs x1, TFSR_EL1
+	mrs x2, TFSR_EL2
+	mrs x3, TFSR_EL3
+	mrs x12, TFSR_EL12
+	mrs x1, rgsr_el1
+	mrs x3, gcr_el1
+
+	# MSR (register)
+	msr tco, x1
+	msr TCO, x2
+	msr tfsre0_el1, x1
+	msr TFSR_EL1, x1
+	msr TFSR_EL2, x2
+	msr TFSR_EL3, x3
+	msr TFSR_EL12, x12
+	msr rgsr_el1, x1
+	msr gcr_el1, x3
+
+	# MSR (immediate)
+	msr TCO, #8