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| author | H.J. Lu <hjl.tools@gmail.com> | 2018-09-14 12:19:58 -0700 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2018-09-14 12:20:10 -0700 |
| commit | 6865c0435a54e6d5f1fcc5cdcd56895e9a3c5484 (patch) | |
| tree | c27434e6a5abb3f09b2ee53ea2f34cc6d062f684 /gas | |
| parent | 70df6fc9bc9e114f46532dbe58caa98e495b119c (diff) | |
| download | gdb-6865c0435a54e6d5f1fcc5cdcd56895e9a3c5484.zip gdb-6865c0435a54e6d5f1fcc5cdcd56895e9a3c5484.tar.gz gdb-6865c0435a54e6d5f1fcc5cdcd56895e9a3c5484.tar.bz2 | |
x86: Support VEX/EVEX WIG encoding
Add VEXWIG, defined as 3, to indicate that the VEX.W/EVEX.W bit is
ignored by such VEX/EVEX instructions, aka WIG instructions. Set
VexW=3 on VEX/EVEX WIG instructions. Update assembler to check
VEXWIG when setting the VEX.W bit.
gas/
PR gas/23642
* config/tc-i386.c (build_vex_prefix): Check VEXWIG when setting
the VEX.W bit.
(build_evex_prefix): Check VEXWIG when setting the EVEX.W bit.
opcodes/
PR gas/23642
* i386-opc.h (VEXWIG): New.
* i386-opc.tbl: Set VexW=3 on VEX/EVEX WIG instructions.
* i386-tbl.h: Regenerated.
Diffstat (limited to 'gas')
| -rw-r--r-- | gas/ChangeLog | 7 | ||||
| -rw-r--r-- | gas/config/tc-i386.c | 31 |
2 files changed, 21 insertions, 17 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 7b24076..ff09469 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,5 +1,12 @@ 2018-09-14 H.J. Lu <hongjiu.lu@intel.com> + PR gas/23642 + * config/tc-i386.c (build_vex_prefix): Check VEXWIG when setting + the VEX.W bit. + (build_evex_prefix): Check VEXWIG when setting the EVEX.W bit. + +2018-09-14 H.J. Lu <hongjiu.lu@intel.com> + PR binutils/23655 * testsuite/gas/i386/evex.d: Updated. diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index e8284e0..d2ee3b4 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -3499,10 +3499,13 @@ build_vex_prefix (const insn_template *t) of RXB bits from REX. */ i.vex.bytes[1] = (~i.rex & 0x7) << 5 | m; - /* Check the REX.W bit. */ - w = (i.rex & REX_W) ? 1 : 0; - if (i.tm.opcode_modifier.vexw == VEXW1) - w = 1; + /* Check the REX.W bit and VEXW. */ + if (i.tm.opcode_modifier.vexw == VEXWIG) + w = (i.rex & REX_W) ? 1 : 0; + else if (i.tm.opcode_modifier.vexw) + w = i.tm.opcode_modifier.vexw == VEXW1 ? 1 : 0; + else + w = (i.rex & REX_W) ? 1 : 0; i.vex.bytes[2] = (w << 7 | register_specifier << 3 @@ -3629,19 +3632,13 @@ build_evex_prefix (void) i.vrex &= ~vrex_used; gas_assert (i.vrex == 0); - /* Check the REX.W bit. */ - w = (i.rex & REX_W) ? 1 : 0; - if (i.tm.opcode_modifier.vexw) - { - if (i.tm.opcode_modifier.vexw == VEXW1) - w = 1; - } - /* If w is not set it means we are dealing with WIG instruction. */ - else if (!w) - { - if (evexwig == evexw1) - w = 1; - } + /* Check the REX.W bit and VEXW. */ + if (i.tm.opcode_modifier.vexw == VEXWIG) + w = (evexwig == evexw1 || (i.rex & REX_W)) ? 1 : 0; + else if (i.tm.opcode_modifier.vexw) + w = i.tm.opcode_modifier.vexw == VEXW1 ? 1 : 0; + else + w = (i.rex & REX_W) ? 1 : 0; /* Encode the U bit. */ implied_prefix |= 0x4; |