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authorJim Wilson <wilson@tuliptree.org>2000-08-16 23:20:15 +0000
committerJim Wilson <wilson@tuliptree.org>2000-08-16 23:20:15 +0000
commit50b81f1903a517fd16ec7a266d6c4668a5e37cce (patch)
treed2e1c065868c30785b3ead12e1620244dfaa3dbc /gas
parentd670a150a1aa97f5b0a1e8e03184f7390a558310 (diff)
downloadgdb-50b81f1903a517fd16ec7a266d6c4668a5e37cce.zip
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Fix 3 DV bugs, and a few minor cleanups.
gas/ * config/tc-ia64.c (specify_resource, case IA64_RS_GR): Handle postincrement modified registers. Handle IA64_OPND_R3_2 addl source registers. (note_register_values): Handle IA64_OPND_R3_2 operands. gas/testsuite/ * gas/ia64/dv-raw-err.s: Add new tests for addl and postinc. * gas/ia64/dv-raw-err.l: Likewise. * gas/ia64/dv-waw-err.l: Update sed pattern. * gas/ia64/opc-f.pl: Delete fpsub, and fpadd comment. * gas/ia64/opc-f.s, gas/ia64/opc-f.d: Regenerate. include/opcode/ * ia64.h (IA64_OPCODE_POSTINC): New. opcodes/ * ia64-ic.tbl (pr-readers-nobr-nomovpr): Add addl, adds. Delete break, mov-immediate, nop. * ia64-opc-f.c: Delete fpsub instructions. * ia64-opc-m.c: Add POSTINC to all instructions with postincrement address operand. Rewrite using macros to avoid long lines. * ia64-opc.h (POSTINC): Define. * ia64-asmtab.c: Regenerate.
Diffstat (limited to 'gas')
-rw-r--r--gas/ChangeLog7
-rw-r--r--gas/config/tc-ia64.c38
-rw-r--r--gas/testsuite/ChangeLog8
-rw-r--r--gas/testsuite/gas/ia64/dv-raw-err.l4
-rw-r--r--gas/testsuite/gas/ia64/dv-raw-err.s12
-rw-r--r--gas/testsuite/gas/ia64/dv-waw-err.l2
-rw-r--r--gas/testsuite/gas/ia64/opc-f.d595
-rw-r--r--gas/testsuite/gas/ia64/opc-f.pl4
-rw-r--r--gas/testsuite/gas/ia64/opc-f.s6
9 files changed, 350 insertions, 326 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 5120290..03c7e97 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,10 @@
+2000-08-16 Jim Wilson <wilson@cygnus.com>
+
+ * config/tc-ia64.c (specify_resource, case IA64_RS_GR): Handle
+ postincrement modified registers. Handle IA64_OPND_R3_2 addl
+ source registers.
+ (note_register_values): Handle IA64_OPND_R3_2 operands.
+
2000-08-16 Jason Eckhardt <jle@cygnus.com>
* config/tc-i860.c (md_operand): Silly typo fixed.
diff --git a/gas/config/tc-ia64.c b/gas/config/tc-ia64.c
index 297b0da..66d63c7 100644
--- a/gas/config/tc-ia64.c
+++ b/gas/config/tc-ia64.c
@@ -6820,17 +6820,23 @@ dep->name, idesc->name, (rsrc_write?"write":"read"), note)
{
if (rsrc_write)
{
- for (i=0;i < idesc->num_outputs;i++)
- {
- if (idesc->operands[i] == IA64_OPND_R1
- || idesc->operands[i] == IA64_OPND_R2
- || idesc->operands[i] == IA64_OPND_R3)
- {
- specs[count] = tmpl;
- specs[count++].index =
- CURR_SLOT.opnd[i].X_add_number - REG_GR;
- }
- }
+ for (i= 0; i < idesc->num_outputs; i++)
+ if (idesc->operands[i] == IA64_OPND_R1
+ || idesc->operands[i] == IA64_OPND_R2
+ || idesc->operands[i] == IA64_OPND_R3)
+ {
+ specs[count] = tmpl;
+ specs[count++].index =
+ CURR_SLOT.opnd[i].X_add_number - REG_GR;
+ }
+ if (idesc->flags & IA64_OPCODE_POSTINC)
+ for (i = 0; i < NELEMS (idesc->operands); i++)
+ if (idesc->operands[i] == IA64_OPND_MR3)
+ {
+ specs[count] = tmpl;
+ specs[count++].index =
+ CURR_SLOT.opnd[i].X_add_number - REG_GR;
+ }
}
else
{
@@ -6849,7 +6855,9 @@ dep->name, idesc->name, (rsrc_write?"write":"read"), note)
|| ((i >= idesc->num_outputs)
&& (idesc->operands[i] == IA64_OPND_R1
|| idesc->operands[i] == IA64_OPND_R2
- || idesc->operands[i] == IA64_OPND_R3)))
+ || idesc->operands[i] == IA64_OPND_R3
+ /* addl source register. */
+ || idesc->operands[i] == IA64_OPND_R3_2)))
{
specs[count] = tmpl;
specs[count++].index =
@@ -7681,6 +7689,12 @@ note_register_values (idesc)
if (regno > 0 && regno < NELEMS(gr_values))
gr_values[regno].known = 0;
}
+ else if (idesc->operands[i] == IA64_OPND_R3_2)
+ {
+ int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
+ if (regno > 0 && regno < 4)
+ gr_values[regno].known = 0;
+ }
else if (idesc->operands[i] == IA64_OPND_P1
|| idesc->operands[i] == IA64_OPND_P2)
{
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 4cdeffb..dae6cb8 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,11 @@
+2000-08-16 Jim Wilson <wilson@cygnus.com>
+
+ * gas/ia64/dv-raw-err.s: Add new tests for addl and postinc.
+ * gas/ia64/dv-raw-err.l: Likewise.
+ * gas/ia64/dv-waw-err.l: Update sed pattern.
+ * gas/ia64/opc-f.pl: Delete fpsub, and fpadd comment.
+ * gas/ia64/opc-f.s, gas/ia64/opc-f.d: Regenerate.
+
2000-08-16 Nick Clifton <nickc@redhat.com>
* gas/arm/inst.s: Add tests for edge cases of shift based
diff --git a/gas/testsuite/gas/ia64/dv-raw-err.l b/gas/testsuite/gas/ia64/dv-raw-err.l
index 9993418..c5a0436 100644
--- a/gas/testsuite/gas/ia64/dv-raw-err.l
+++ b/gas/testsuite/gas/ia64/dv-raw-err.l
@@ -265,3 +265,7 @@
.*:542: Warning: This is the location of the conflicting usage
.*:546: Warning: Use of 'mov' .* RAW dependency 'RR#' \(impliedf\)
.*:545: Warning: This is the location of the conflicting usage
+.*:555: Warning: Use of 'addl' .* RAW dependency 'GR%, % in 1 - 127' \(impliedf\), specific resource number is 2
+.*:554: Warning: This is the location of the conflicting usage
+.*:559: Warning: Use of 'mov' violates RAW dependency 'GR%, % in 1 - 127' \(impliedf\), specific resource number is 32
+.*:558: Warning: This is the location of the conflicting usage
diff --git a/gas/testsuite/gas/ia64/dv-raw-err.s b/gas/testsuite/gas/ia64/dv-raw-err.s
index fde8a69..4d737cc 100644
--- a/gas/testsuite/gas/ia64/dv-raw-err.s
+++ b/gas/testsuite/gas/ia64/dv-raw-err.s
@@ -545,5 +545,17 @@
mov rr[r4] = r5
mov r6 = rr[r7] // impliedf
;;
+ srlz.d
+ ;;
// RSE
+
+// GR%, additional cases
+// addl
+ mov r2 = r32
+ addl r3 = 12345, r2 // impliedf, IA64_OPND_R3_2
+ ;;
+// postinc
+ ld8 r2 = [r32], 8
+ mov r8 = r32 // impliedf
+ ;;
L:
diff --git a/gas/testsuite/gas/ia64/dv-waw-err.l b/gas/testsuite/gas/ia64/dv-waw-err.l
index e446757..51fb26a 100644
--- a/gas/testsuite/gas/ia64/dv-waw-err.l
+++ b/gas/testsuite/gas/ia64/dv-waw-err.l
@@ -349,5 +349,5 @@
.*:504: Warning: This is the location of the conflicting usage
.*:508: Warning: Use of 'mov' .* WAW dependency 'PSR\.up' \(impliedf\)
.*:507: Warning: This is the location of the conflicting usage
-.*:513: Warning: Use of 'mov' .* WAW dependency 'RR#' \(impliedf\)
+.*:513: Warning: Use of 'mov' .* WAW dependency 'RR#' \(impliedf\), specific resource number is 7
.*:512: Warning: This is the location of the conflicting usage
diff --git a/gas/testsuite/gas/ia64/opc-f.d b/gas/testsuite/gas/ia64/opc-f.d
index 5087ac4..262b520 100644
--- a/gas/testsuite/gas/ia64/opc-f.d
+++ b/gas/testsuite/gas/ia64/opc-f.d
@@ -337,881 +337,866 @@ Disassembly of section \.text:
6d6: 40 30 14 02 5b 00 fsub\.d\.s3 f4=f5,f6
6dc: 00 00 04 00 nop\.i 0x0
6e0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 6e6: 40 30 14 02 5c 00 fpms\.s0 f4=f5,f1,f6
+ 6e6: 40 00 14 0c 60 00 fnmpy\.s0 f4=f5,f6
6ec: 00 00 04 00 nop\.i 0x0
6f0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 6f6: 40 30 14 02 5c 00 fpms\.s0 f4=f5,f1,f6
+ 6f6: 40 00 14 0c 60 00 fnmpy\.s0 f4=f5,f6
6fc: 00 00 04 00 nop\.i 0x0
700: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 706: 40 30 14 02 5d 00 fpms\.s1 f4=f5,f1,f6
+ 706: 40 00 14 0c 61 00 fnmpy\.s1 f4=f5,f6
70c: 00 00 04 00 nop\.i 0x0
710: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 716: 40 30 14 02 5e 00 fpms\.s2 f4=f5,f1,f6
+ 716: 40 00 14 0c 62 00 fnmpy\.s2 f4=f5,f6
71c: 00 00 04 00 nop\.i 0x0
720: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 726: 40 30 14 02 5f 00 fpms\.s3 f4=f5,f1,f6
+ 726: 40 00 14 0c 63 00 fnmpy\.s3 f4=f5,f6
72c: 00 00 04 00 nop\.i 0x0
730: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 736: 40 00 14 0c 60 00 fnmpy\.s0 f4=f5,f6
+ 736: 40 00 14 0c 64 00 fnmpy\.s\.s0 f4=f5,f6
73c: 00 00 04 00 nop\.i 0x0
740: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 746: 40 00 14 0c 60 00 fnmpy\.s0 f4=f5,f6
+ 746: 40 00 14 0c 64 00 fnmpy\.s\.s0 f4=f5,f6
74c: 00 00 04 00 nop\.i 0x0
750: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 756: 40 00 14 0c 61 00 fnmpy\.s1 f4=f5,f6
+ 756: 40 00 14 0c 65 00 fnmpy\.s\.s1 f4=f5,f6
75c: 00 00 04 00 nop\.i 0x0
760: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 766: 40 00 14 0c 62 00 fnmpy\.s2 f4=f5,f6
+ 766: 40 00 14 0c 66 00 fnmpy\.s\.s2 f4=f5,f6
76c: 00 00 04 00 nop\.i 0x0
770: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 776: 40 00 14 0c 63 00 fnmpy\.s3 f4=f5,f6
+ 776: 40 00 14 0c 67 00 fnmpy\.s\.s3 f4=f5,f6
77c: 00 00 04 00 nop\.i 0x0
780: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 786: 40 00 14 0c 64 00 fnmpy\.s\.s0 f4=f5,f6
+ 786: 40 00 14 0c 68 00 fnmpy\.d\.s0 f4=f5,f6
78c: 00 00 04 00 nop\.i 0x0
790: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 796: 40 00 14 0c 64 00 fnmpy\.s\.s0 f4=f5,f6
+ 796: 40 00 14 0c 68 00 fnmpy\.d\.s0 f4=f5,f6
79c: 00 00 04 00 nop\.i 0x0
7a0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 7a6: 40 00 14 0c 65 00 fnmpy\.s\.s1 f4=f5,f6
+ 7a6: 40 00 14 0c 69 00 fnmpy\.d\.s1 f4=f5,f6
7ac: 00 00 04 00 nop\.i 0x0
7b0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 7b6: 40 00 14 0c 66 00 fnmpy\.s\.s2 f4=f5,f6
+ 7b6: 40 00 14 0c 6a 00 fnmpy\.d\.s2 f4=f5,f6
7bc: 00 00 04 00 nop\.i 0x0
7c0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 7c6: 40 00 14 0c 67 00 fnmpy\.s\.s3 f4=f5,f6
+ 7c6: 40 00 14 0c 6b 00 fnmpy\.d\.s3 f4=f5,f6
7cc: 00 00 04 00 nop\.i 0x0
7d0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 7d6: 40 00 14 0c 68 00 fnmpy\.d\.s0 f4=f5,f6
+ 7d6: 40 00 14 0c 6c 00 fpnmpy\.s0 f4=f5,f6
7dc: 00 00 04 00 nop\.i 0x0
7e0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 7e6: 40 00 14 0c 68 00 fnmpy\.d\.s0 f4=f5,f6
+ 7e6: 40 00 14 0c 6c 00 fpnmpy\.s0 f4=f5,f6
7ec: 00 00 04 00 nop\.i 0x0
7f0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 7f6: 40 00 14 0c 69 00 fnmpy\.d\.s1 f4=f5,f6
+ 7f6: 40 00 14 0c 6d 00 fpnmpy\.s1 f4=f5,f6
7fc: 00 00 04 00 nop\.i 0x0
800: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 806: 40 00 14 0c 6a 00 fnmpy\.d\.s2 f4=f5,f6
+ 806: 40 00 14 0c 6e 00 fpnmpy\.s2 f4=f5,f6
80c: 00 00 04 00 nop\.i 0x0
810: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 816: 40 00 14 0c 6b 00 fnmpy\.d\.s3 f4=f5,f6
+ 816: 40 00 14 0c 6f 00 fpnmpy\.s3 f4=f5,f6
81c: 00 00 04 00 nop\.i 0x0
820: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 826: 40 00 14 0c 6c 00 fpnmpy\.s0 f4=f5,f6
+ 826: 40 00 14 02 40 00 fnorm\.s0 f4=f5
82c: 00 00 04 00 nop\.i 0x0
830: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 836: 40 00 14 0c 6c 00 fpnmpy\.s0 f4=f5,f6
+ 836: 40 00 14 02 40 00 fnorm\.s0 f4=f5
83c: 00 00 04 00 nop\.i 0x0
840: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 846: 40 00 14 0c 6d 00 fpnmpy\.s1 f4=f5,f6
+ 846: 40 00 14 02 41 00 fnorm\.s1 f4=f5
84c: 00 00 04 00 nop\.i 0x0
850: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 856: 40 00 14 0c 6e 00 fpnmpy\.s2 f4=f5,f6
+ 856: 40 00 14 02 42 00 fnorm\.s2 f4=f5
85c: 00 00 04 00 nop\.i 0x0
860: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 866: 40 00 14 0c 6f 00 fpnmpy\.s3 f4=f5,f6
+ 866: 40 00 14 02 43 00 fnorm\.s3 f4=f5
86c: 00 00 04 00 nop\.i 0x0
870: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 876: 40 00 14 02 40 00 fnorm\.s0 f4=f5
+ 876: 40 00 14 02 44 00 fnorm\.s\.s0 f4=f5
87c: 00 00 04 00 nop\.i 0x0
880: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 886: 40 00 14 02 40 00 fnorm\.s0 f4=f5
+ 886: 40 00 14 02 44 00 fnorm\.s\.s0 f4=f5
88c: 00 00 04 00 nop\.i 0x0
890: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 896: 40 00 14 02 41 00 fnorm\.s1 f4=f5
+ 896: 40 00 14 02 45 00 fnorm\.s\.s1 f4=f5
89c: 00 00 04 00 nop\.i 0x0
8a0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 8a6: 40 00 14 02 42 00 fnorm\.s2 f4=f5
+ 8a6: 40 00 14 02 46 00 fnorm\.s\.s2 f4=f5
8ac: 00 00 04 00 nop\.i 0x0
8b0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 8b6: 40 00 14 02 43 00 fnorm\.s3 f4=f5
+ 8b6: 40 00 14 02 47 00 fnorm\.s\.s3 f4=f5
8bc: 00 00 04 00 nop\.i 0x0
8c0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 8c6: 40 00 14 02 44 00 fnorm\.s\.s0 f4=f5
+ 8c6: 40 00 14 02 48 00 fnorm\.d\.s0 f4=f5
8cc: 00 00 04 00 nop\.i 0x0
8d0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 8d6: 40 00 14 02 44 00 fnorm\.s\.s0 f4=f5
+ 8d6: 40 00 14 02 48 00 fnorm\.d\.s0 f4=f5
8dc: 00 00 04 00 nop\.i 0x0
8e0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 8e6: 40 00 14 02 45 00 fnorm\.s\.s1 f4=f5
+ 8e6: 40 00 14 02 49 00 fnorm\.d\.s1 f4=f5
8ec: 00 00 04 00 nop\.i 0x0
8f0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 8f6: 40 00 14 02 46 00 fnorm\.s\.s2 f4=f5
+ 8f6: 40 00 14 02 4a 00 fnorm\.d\.s2 f4=f5
8fc: 00 00 04 00 nop\.i 0x0
900: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 906: 40 00 14 02 47 00 fnorm\.s\.s3 f4=f5
+ 906: 40 00 14 02 4b 00 fnorm\.d\.s3 f4=f5
90c: 00 00 04 00 nop\.i 0x0
910: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 916: 40 00 14 02 48 00 fnorm\.d\.s0 f4=f5
+ 916: 40 38 14 0c 74 00 xma\.l f4=f5,f6,f7
91c: 00 00 04 00 nop\.i 0x0
920: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 926: 40 00 14 02 48 00 fnorm\.d\.s0 f4=f5
+ 926: 40 38 14 0c 74 00 xma\.l f4=f5,f6,f7
92c: 00 00 04 00 nop\.i 0x0
930: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 936: 40 00 14 02 49 00 fnorm\.d\.s1 f4=f5
+ 936: 40 38 14 0c 77 00 xma\.h f4=f5,f6,f7
93c: 00 00 04 00 nop\.i 0x0
940: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 946: 40 00 14 02 4a 00 fnorm\.d\.s2 f4=f5
+ 946: 40 38 14 0c 76 00 xma\.hu f4=f5,f6,f7
94c: 00 00 04 00 nop\.i 0x0
950: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 956: 40 00 14 02 4b 00 fnorm\.d\.s3 f4=f5
+ 956: 40 00 14 0c 74 00 xmpy\.l f4=f5,f6
95c: 00 00 04 00 nop\.i 0x0
960: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 966: 40 38 14 0c 74 00 xma\.l f4=f5,f6,f7
+ 966: 40 00 14 0c 74 00 xmpy\.l f4=f5,f6
96c: 00 00 04 00 nop\.i 0x0
970: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 976: 40 38 14 0c 74 00 xma\.l f4=f5,f6,f7
+ 976: 40 00 14 0c 77 00 xmpy\.h f4=f5,f6
97c: 00 00 04 00 nop\.i 0x0
980: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 986: 40 38 14 0c 77 00 xma\.h f4=f5,f6,f7
+ 986: 40 00 14 0c 76 00 xmpy\.hu f4=f5,f6
98c: 00 00 04 00 nop\.i 0x0
990: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 996: 40 38 14 0c 76 00 xma\.hu f4=f5,f6,f7
+ 996: 40 38 14 0c 70 00 fselect f4=f5,f6,f7
99c: 00 00 04 00 nop\.i 0x0
9a0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 9a6: 40 00 14 0c 74 00 xmpy\.l f4=f5,f6
+ 9a6: 30 20 00 09 28 00 fclass\.m p3,p4=f4,0x100
9ac: 00 00 04 00 nop\.i 0x0
9b0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 9b6: 40 00 14 0c 74 00 xmpy\.l f4=f5,f6
+ 9b6: 40 20 00 07 28 00 fclass\.m p4,p3=f4,0x100
9bc: 00 00 04 00 nop\.i 0x0
9c0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 9c6: 40 00 14 0c 77 00 xmpy\.h f4=f5,f6
+ 9c6: 30 20 80 08 28 00 fclass\.m p3,p4=f4,0x80
9cc: 00 00 04 00 nop\.i 0x0
9d0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 9d6: 40 00 14 0c 76 00 xmpy\.hu f4=f5,f6
+ 9d6: 40 20 80 06 28 00 fclass\.m p4,p3=f4,0x80
9dc: 00 00 04 00 nop\.i 0x0
9e0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 9e6: 40 38 14 0c 70 00 fselect f4=f5,f6,f7
+ 9e6: 30 20 40 08 28 00 fclass\.m p3,p4=f4,0x40
9ec: 00 00 04 00 nop\.i 0x0
9f0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 9f6: 30 20 00 09 28 00 fclass\.m p3,p4=f4,0x100
+ 9f6: 40 20 40 06 28 00 fclass\.m p4,p3=f4,0x40
9fc: 00 00 04 00 nop\.i 0x0
a00: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- a06: 40 20 00 07 28 00 fclass\.m p4,p3=f4,0x100
+ a06: 30 20 00 88 28 00 fclass\.m p3,p4=f4,0x1
a0c: 00 00 04 00 nop\.i 0x0
a10: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- a16: 30 20 80 08 28 00 fclass\.m p3,p4=f4,0x80
+ a16: 40 20 00 86 28 00 fclass\.m p4,p3=f4,0x1
a1c: 00 00 04 00 nop\.i 0x0
a20: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- a26: 40 20 80 06 28 00 fclass\.m p4,p3=f4,0x80
+ a26: 30 20 00 08 29 00 fclass\.m p3,p4=f4,0x2
a2c: 00 00 04 00 nop\.i 0x0
a30: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- a36: 30 20 40 08 28 00 fclass\.m p3,p4=f4,0x40
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a3c: 00 00 04 00 nop\.i 0x0
a40: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- a46: 40 20 40 06 28 00 fclass\.m p4,p3=f4,0x40
+ a46: 30 20 08 88 29 00 fclass\.m p3,p4=f4,0xb
a4c: 00 00 04 00 nop\.i 0x0
a50: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- a56: 30 20 00 88 28 00 fclass\.m p3,p4=f4,0x1
+ a56: 40 20 08 86 29 00 fclass\.m p4,p3=f4,0xb
a5c: 00 00 04 00 nop\.i 0x0
a60: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- a66: 40 20 00 86 28 00 fclass\.m p4,p3=f4,0x1
+ a66: 30 20 10 88 29 00 fclass\.m p3,p4=f4,0x13
a6c: 00 00 04 00 nop\.i 0x0
a70: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- a76: 30 20 00 08 29 00 fclass\.m p3,p4=f4,0x2
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a7c: 00 00 04 00 nop\.i 0x0
a80: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- a86: 40 20 00 06 29 00 fclass\.m p4,p3=f4,0x2
+ a86: 30 20 20 88 29 00 fclass\.m p3,p4=f4,0x23
a8c: 00 00 04 00 nop\.i 0x0
a90: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- a96: 30 20 08 88 29 00 fclass\.m p3,p4=f4,0xb
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a9c: 00 00 04 00 nop\.i 0x0
aa0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- aa6: 40 20 08 86 29 00 fclass\.m p4,p3=f4,0xb
+ aa6: 30 20 fc 89 29 00 fclass\.m p3,p4=f4,0x1ff
aac: 00 00 04 00 nop\.i 0x0
ab0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- ab6: 30 20 10 88 29 00 fclass\.m p3,p4=f4,0x13
+ ab6: 40 20 fc 87 29 00 fclass\.m p4,p3=f4,0x1ff
abc: 00 00 04 00 nop\.i 0x0
ac0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- ac6: 40 20 10 86 29 00 fclass\.m p4,p3=f4,0x13
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acc: 00 00 04 00 nop\.i 0x0
ad0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- ad6: 30 20 20 88 29 00 fclass\.m p3,p4=f4,0x23
+ ad6: 40 24 00 07 28 00 fclass\.m\.unc p4,p3=f4,0x100
adc: 00 00 04 00 nop\.i 0x0
ae0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- ae6: 40 20 20 86 29 00 fclass\.m p4,p3=f4,0x23
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aec: 00 00 04 00 nop\.i 0x0
af0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- af6: 30 20 fc 89 29 00 fclass\.m p3,p4=f4,0x1ff
+ af6: 40 24 80 06 28 00 fclass\.m\.unc p4,p3=f4,0x80
afc: 00 00 04 00 nop\.i 0x0
b00: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- b06: 40 20 fc 87 29 00 fclass\.m p4,p3=f4,0x1ff
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b0c: 00 00 04 00 nop\.i 0x0
b10: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- b16: 30 24 00 09 28 00 fclass\.m\.unc p3,p4=f4,0x100
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b1c: 00 00 04 00 nop\.i 0x0
b20: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- b26: 40 24 00 07 28 00 fclass\.m\.unc p4,p3=f4,0x100
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b2c: 00 00 04 00 nop\.i 0x0
b30: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- b36: 30 24 80 08 28 00 fclass\.m\.unc p3,p4=f4,0x80
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b3c: 00 00 04 00 nop\.i 0x0
b40: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- b46: 40 24 80 06 28 00 fclass\.m\.unc p4,p3=f4,0x80
+ b46: 30 24 00 08 29 00 fclass\.m\.unc p3,p4=f4,0x2
b4c: 00 00 04 00 nop\.i 0x0
b50: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- b56: 30 24 40 08 28 00 fclass\.m\.unc p3,p4=f4,0x40
+ b56: 40 24 00 06 29 00 fclass\.m\.unc p4,p3=f4,0x2
b5c: 00 00 04 00 nop\.i 0x0
b60: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- b66: 40 24 40 06 28 00 fclass\.m\.unc p4,p3=f4,0x40
+ b66: 30 24 08 88 29 00 fclass\.m\.unc p3,p4=f4,0xb
b6c: 00 00 04 00 nop\.i 0x0
b70: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- b76: 30 24 00 88 28 00 fclass\.m\.unc p3,p4=f4,0x1
+ b76: 40 24 08 86 29 00 fclass\.m\.unc p4,p3=f4,0xb
b7c: 00 00 04 00 nop\.i 0x0
b80: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- b86: 40 24 00 86 28 00 fclass\.m\.unc p4,p3=f4,0x1
+ b86: 30 24 10 88 29 00 fclass\.m\.unc p3,p4=f4,0x13
b8c: 00 00 04 00 nop\.i 0x0
b90: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- b96: 30 24 00 08 29 00 fclass\.m\.unc p3,p4=f4,0x2
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b9c: 00 00 04 00 nop\.i 0x0
ba0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- ba6: 40 24 00 06 29 00 fclass\.m\.unc p4,p3=f4,0x2
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bac: 00 00 04 00 nop\.i 0x0
bb0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- bb6: 30 24 08 88 29 00 fclass\.m\.unc p3,p4=f4,0xb
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bbc: 00 00 04 00 nop\.i 0x0
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- bc6: 40 24 08 86 29 00 fclass\.m\.unc p4,p3=f4,0xb
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bcc: 00 00 04 00 nop\.i 0x0
bd0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- bd6: 30 24 10 88 29 00 fclass\.m\.unc p3,p4=f4,0x13
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bdc: 00 00 04 00 nop\.i 0x0
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- be6: 40 24 10 86 29 00 fclass\.m\.unc p4,p3=f4,0x13
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bf0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- bf6: 30 24 20 88 29 00 fclass\.m\.unc p3,p4=f4,0x23
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bfc: 00 00 04 00 nop\.i 0x0
c00: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- c06: 40 24 20 86 29 00 fclass\.m\.unc p4,p3=f4,0x23
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c0c: 00 00 04 00 nop\.i 0x0
c10: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- c16: 30 24 fc 89 29 00 fclass\.m\.unc p3,p4=f4,0x1ff
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c1c: 00 00 04 00 nop\.i 0x0
c20: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- c26: 40 24 fc 87 29 00 fclass\.m\.unc p4,p3=f4,0x1ff
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c2c: 00 00 04 00 nop\.i 0x0
c30: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- c36: 40 30 1c 8a 00 00 frcpa\.s0 f4,p5=f6,f7
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c3c: 00 00 04 00 nop\.i 0x0
c40: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- c46: 40 30 1c 8a 00 00 frcpa\.s0 f4,p5=f6,f7
+ c46: 40 30 1c 8a 08 00 fprcpa\.s0 f4,p5=f6,f7
c4c: 00 00 04 00 nop\.i 0x0
c50: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- c56: 40 30 1c 8a 01 00 frcpa\.s1 f4,p5=f6,f7
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c60: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- c66: 40 30 1c 8a 02 00 frcpa\.s2 f4,p5=f6,f7
+ c66: 40 30 1c 8a 0a 00 fprcpa\.s2 f4,p5=f6,f7
c6c: 00 00 04 00 nop\.i 0x0
c70: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- c76: 40 30 1c 8a 03 00 frcpa\.s3 f4,p5=f6,f7
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c7c: 00 00 04 00 nop\.i 0x0
c80: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- c86: 40 30 1c 8a 08 00 fprcpa\.s0 f4,p5=f6,f7
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c8c: 00 00 04 00 nop\.i 0x0
c90: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- c96: 40 30 1c 8a 08 00 fprcpa\.s0 f4,p5=f6,f7
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c9c: 00 00 04 00 nop\.i 0x0
ca0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- ca6: 40 30 1c 8a 09 00 fprcpa\.s1 f4,p5=f6,f7
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cac: 00 00 04 00 nop\.i 0x0
cb0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- cb6: 40 30 1c 8a 0a 00 fprcpa\.s2 f4,p5=f6,f7
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cbc: 00 00 04 00 nop\.i 0x0
cc0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- cc6: 40 30 1c 8a 0b 00 fprcpa\.s3 f4,p5=f6,f7
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ccc: 00 00 04 00 nop\.i 0x0
cd0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- cd6: 40 00 18 8a 04 00 frsqrta\.s0 f4,p5=f6
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cdc: 00 00 04 00 nop\.i 0x0
ce0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- ce6: 40 00 18 8a 04 00 frsqrta\.s0 f4,p5=f6
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cec: 00 00 04 00 nop\.i 0x0
cf0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- cf6: 40 00 18 8a 05 00 frsqrta\.s1 f4,p5=f6
+ cf6: 40 00 18 8a 0d 00 fprsqrta\.s1 f4,p5=f6
cfc: 00 00 04 00 nop\.i 0x0
d00: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- d06: 40 00 18 8a 06 00 frsqrta\.s2 f4,p5=f6
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d0c: 00 00 04 00 nop\.i 0x0
d10: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- d16: 40 00 18 8a 07 00 frsqrta\.s3 f4,p5=f6
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d1c: 00 00 04 00 nop\.i 0x0
d20: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- d26: 40 00 18 8a 0c 00 fprsqrta\.s0 f4,p5=f6
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d2c: 00 00 04 00 nop\.i 0x0
d30: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- d36: 40 00 18 8a 0c 00 fprsqrta\.s0 f4,p5=f6
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d3c: 00 00 04 00 nop\.i 0x0
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- d46: 40 00 18 8a 0d 00 fprsqrta\.s1 f4,p5=f6
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d4c: 00 00 04 00 nop\.i 0x0
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- d56: 40 00 18 8a 0e 00 fprsqrta\.s2 f4,p5=f6
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d5c: 00 00 04 00 nop\.i 0x0
d60: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- d66: 40 00 18 8a 0f 00 fprsqrta\.s3 f4,p5=f6
+ d66: 40 28 18 28 03 00 fmin\.s3 f4=f5,f6
d6c: 00 00 04 00 nop\.i 0x0
d70: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- d76: 40 28 18 28 00 00 fmin\.s0 f4=f5,f6
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d7c: 00 00 04 00 nop\.i 0x0
d80: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- d86: 40 28 18 28 00 00 fmin\.s0 f4=f5,f6
+ d86: 40 28 18 2a 00 00 fmax\.s0 f4=f5,f6
d8c: 00 00 04 00 nop\.i 0x0
d90: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- d96: 40 28 18 28 01 00 fmin\.s1 f4=f5,f6
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d9c: 00 00 04 00 nop\.i 0x0
da0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- da6: 40 28 18 28 02 00 fmin\.s2 f4=f5,f6
+ da6: 40 28 18 2a 02 00 fmax\.s2 f4=f5,f6
dac: 00 00 04 00 nop\.i 0x0
db0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- db6: 40 28 18 28 03 00 fmin\.s3 f4=f5,f6
+ db6: 40 28 18 2a 03 00 fmax\.s3 f4=f5,f6
dbc: 00 00 04 00 nop\.i 0x0
dc0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- dc6: 40 28 18 2a 00 00 fmax\.s0 f4=f5,f6
+ dc6: 40 28 18 2c 00 00 famin\.s0 f4=f5,f6
dcc: 00 00 04 00 nop\.i 0x0
dd0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- dd6: 40 28 18 2a 00 00 fmax\.s0 f4=f5,f6
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ddc: 00 00 04 00 nop\.i 0x0
de0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- de6: 40 28 18 2a 01 00 fmax\.s1 f4=f5,f6
+ de6: 40 28 18 2c 01 00 famin\.s1 f4=f5,f6
dec: 00 00 04 00 nop\.i 0x0
df0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- df6: 40 28 18 2a 02 00 fmax\.s2 f4=f5,f6
+ df6: 40 28 18 2c 02 00 famin\.s2 f4=f5,f6
dfc: 00 00 04 00 nop\.i 0x0
e00: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- e06: 40 28 18 2a 03 00 fmax\.s3 f4=f5,f6
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e0c: 00 00 04 00 nop\.i 0x0
e10: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- e16: 40 28 18 2c 00 00 famin\.s0 f4=f5,f6
+ e16: 40 28 18 2e 00 00 famax\.s0 f4=f5,f6
e1c: 00 00 04 00 nop\.i 0x0
e20: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- e26: 40 28 18 2c 00 00 famin\.s0 f4=f5,f6
+ e26: 40 28 18 2e 00 00 famax\.s0 f4=f5,f6
e2c: 00 00 04 00 nop\.i 0x0
e30: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- e36: 40 28 18 2c 01 00 famin\.s1 f4=f5,f6
+ e36: 40 28 18 2e 01 00 famax\.s1 f4=f5,f6
e3c: 00 00 04 00 nop\.i 0x0
e40: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- e46: 40 28 18 2c 02 00 famin\.s2 f4=f5,f6
+ e46: 40 28 18 2e 02 00 famax\.s2 f4=f5,f6
e4c: 00 00 04 00 nop\.i 0x0
e50: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- e56: 40 28 18 2c 03 00 famin\.s3 f4=f5,f6
+ e56: 40 28 18 2e 03 00 famax\.s3 f4=f5,f6
e5c: 00 00 04 00 nop\.i 0x0
e60: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- e66: 40 28 18 2e 00 00 famax\.s0 f4=f5,f6
+ e66: 40 28 18 28 08 00 fpmin\.s0 f4=f5,f6
e6c: 00 00 04 00 nop\.i 0x0
e70: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- e76: 40 28 18 2e 00 00 famax\.s0 f4=f5,f6
+ e76: 40 28 18 28 08 00 fpmin\.s0 f4=f5,f6
e7c: 00 00 04 00 nop\.i 0x0
e80: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- e86: 40 28 18 2e 01 00 famax\.s1 f4=f5,f6
+ e86: 40 28 18 28 09 00 fpmin\.s1 f4=f5,f6
e8c: 00 00 04 00 nop\.i 0x0
e90: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- e96: 40 28 18 2e 02 00 famax\.s2 f4=f5,f6
+ e96: 40 28 18 28 0a 00 fpmin\.s2 f4=f5,f6
e9c: 00 00 04 00 nop\.i 0x0
ea0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- ea6: 40 28 18 2e 03 00 famax\.s3 f4=f5,f6
+ ea6: 40 28 18 28 0b 00 fpmin\.s3 f4=f5,f6
eac: 00 00 04 00 nop\.i 0x0
eb0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- eb6: 40 28 18 28 08 00 fpmin\.s0 f4=f5,f6
+ eb6: 40 28 18 2a 08 00 fpmax\.s0 f4=f5,f6
ebc: 00 00 04 00 nop\.i 0x0
ec0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- ec6: 40 28 18 28 08 00 fpmin\.s0 f4=f5,f6
+ ec6: 40 28 18 2a 08 00 fpmax\.s0 f4=f5,f6
ecc: 00 00 04 00 nop\.i 0x0
ed0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- ed6: 40 28 18 28 09 00 fpmin\.s1 f4=f5,f6
+ ed6: 40 28 18 2a 09 00 fpmax\.s1 f4=f5,f6
edc: 00 00 04 00 nop\.i 0x0
ee0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- ee6: 40 28 18 28 0a 00 fpmin\.s2 f4=f5,f6
+ ee6: 40 28 18 2a 0a 00 fpmax\.s2 f4=f5,f6
eec: 00 00 04 00 nop\.i 0x0
ef0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- ef6: 40 28 18 28 0b 00 fpmin\.s3 f4=f5,f6
+ ef6: 40 28 18 2a 0b 00 fpmax\.s3 f4=f5,f6
efc: 00 00 04 00 nop\.i 0x0
f00: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- f06: 40 28 18 2a 08 00 fpmax\.s0 f4=f5,f6
+ f06: 40 28 18 2c 08 00 fpamin\.s0 f4=f5,f6
f0c: 00 00 04 00 nop\.i 0x0
f10: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- f16: 40 28 18 2a 08 00 fpmax\.s0 f4=f5,f6
+ f16: 40 28 18 2c 08 00 fpamin\.s0 f4=f5,f6
f1c: 00 00 04 00 nop\.i 0x0
f20: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- f26: 40 28 18 2a 09 00 fpmax\.s1 f4=f5,f6
+ f26: 40 28 18 2c 09 00 fpamin\.s1 f4=f5,f6
f2c: 00 00 04 00 nop\.i 0x0
f30: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- f36: 40 28 18 2a 0a 00 fpmax\.s2 f4=f5,f6
+ f36: 40 28 18 2c 0a 00 fpamin\.s2 f4=f5,f6
f3c: 00 00 04 00 nop\.i 0x0
f40: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- f46: 40 28 18 2a 0b 00 fpmax\.s3 f4=f5,f6
+ f46: 40 28 18 2c 0b 00 fpamin\.s3 f4=f5,f6
f4c: 00 00 04 00 nop\.i 0x0
f50: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- f56: 40 28 18 2c 08 00 fpamin\.s0 f4=f5,f6
+ f56: 40 28 18 2e 08 00 fpamax\.s0 f4=f5,f6
f5c: 00 00 04 00 nop\.i 0x0
f60: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- f66: 40 28 18 2c 08 00 fpamin\.s0 f4=f5,f6
+ f66: 40 28 18 2e 08 00 fpamax\.s0 f4=f5,f6
f6c: 00 00 04 00 nop\.i 0x0
f70: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- f76: 40 28 18 2c 09 00 fpamin\.s1 f4=f5,f6
+ f76: 40 28 18 2e 09 00 fpamax\.s1 f4=f5,f6
f7c: 00 00 04 00 nop\.i 0x0
f80: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- f86: 40 28 18 2c 0a 00 fpamin\.s2 f4=f5,f6
+ f86: 40 28 18 2e 0a 00 fpamax\.s2 f4=f5,f6
f8c: 00 00 04 00 nop\.i 0x0
f90: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- f96: 40 28 18 2c 0b 00 fpamin\.s3 f4=f5,f6
+ f96: 40 28 18 2e 0b 00 fpamax\.s3 f4=f5,f6
f9c: 00 00 04 00 nop\.i 0x0
fa0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- fa6: 40 28 18 2e 08 00 fpamax\.s0 f4=f5,f6
+ fa6: 30 20 14 08 20 00 fcmp\.eq\.s0 p3,p4=f4,f5
fac: 00 00 04 00 nop\.i 0x0
fb0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- fb6: 40 28 18 2e 08 00 fpamax\.s0 f4=f5,f6
+ fb6: 30 20 14 08 20 00 fcmp\.eq\.s0 p3,p4=f4,f5
fbc: 00 00 04 00 nop\.i 0x0
fc0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- fc6: 40 28 18 2e 09 00 fpamax\.s1 f4=f5,f6
+ fc6: 30 20 14 08 21 00 fcmp\.eq\.s1 p3,p4=f4,f5
fcc: 00 00 04 00 nop\.i 0x0
fd0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- fd6: 40 28 18 2e 0a 00 fpamax\.s2 f4=f5,f6
+ fd6: 30 20 14 08 22 00 fcmp\.eq\.s2 p3,p4=f4,f5
fdc: 00 00 04 00 nop\.i 0x0
fe0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- fe6: 40 28 18 2e 0b 00 fpamax\.s3 f4=f5,f6
+ fe6: 30 20 14 08 23 00 fcmp\.eq\.s3 p3,p4=f4,f5
fec: 00 00 04 00 nop\.i 0x0
ff0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- ff6: 30 20 14 08 20 00 fcmp\.eq\.s0 p3,p4=f4,f5
+ ff6: 30 20 14 08 24 00 fcmp\.lt\.s0 p3,p4=f4,f5
ffc: 00 00 04 00 nop\.i 0x0
1000: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1006: 30 20 14 08 20 00 fcmp\.eq\.s0 p3,p4=f4,f5
+ 1006: 30 20 14 08 24 00 fcmp\.lt\.s0 p3,p4=f4,f5
100c: 00 00 04 00 nop\.i 0x0
1010: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1016: 30 20 14 08 21 00 fcmp\.eq\.s1 p3,p4=f4,f5
+ 1016: 30 20 14 08 25 00 fcmp\.lt\.s1 p3,p4=f4,f5
101c: 00 00 04 00 nop\.i 0x0
1020: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1026: 30 20 14 08 22 00 fcmp\.eq\.s2 p3,p4=f4,f5
+ 1026: 30 20 14 08 26 00 fcmp\.lt\.s2 p3,p4=f4,f5
102c: 00 00 04 00 nop\.i 0x0
1030: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1036: 30 20 14 08 23 00 fcmp\.eq\.s3 p3,p4=f4,f5
+ 1036: 30 20 14 08 27 00 fcmp\.lt\.s3 p3,p4=f4,f5
103c: 00 00 04 00 nop\.i 0x0
1040: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1046: 30 20 14 08 24 00 fcmp\.lt\.s0 p3,p4=f4,f5
+ 1046: 30 20 14 88 20 00 fcmp\.le\.s0 p3,p4=f4,f5
104c: 00 00 04 00 nop\.i 0x0
1050: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1056: 30 20 14 08 24 00 fcmp\.lt\.s0 p3,p4=f4,f5
+ 1056: 30 20 14 88 20 00 fcmp\.le\.s0 p3,p4=f4,f5
105c: 00 00 04 00 nop\.i 0x0
1060: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1066: 30 20 14 08 25 00 fcmp\.lt\.s1 p3,p4=f4,f5
+ 1066: 30 20 14 88 21 00 fcmp\.le\.s1 p3,p4=f4,f5
106c: 00 00 04 00 nop\.i 0x0
1070: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1076: 30 20 14 08 26 00 fcmp\.lt\.s2 p3,p4=f4,f5
+ 1076: 30 20 14 88 22 00 fcmp\.le\.s2 p3,p4=f4,f5
107c: 00 00 04 00 nop\.i 0x0
1080: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1086: 30 20 14 08 27 00 fcmp\.lt\.s3 p3,p4=f4,f5
+ 1086: 30 20 14 88 23 00 fcmp\.le\.s3 p3,p4=f4,f5
108c: 00 00 04 00 nop\.i 0x0
1090: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1096: 30 20 14 88 20 00 fcmp\.le\.s0 p3,p4=f4,f5
+ 1096: 30 20 14 88 24 00 fcmp\.unord\.s0 p3,p4=f4,f5
109c: 00 00 04 00 nop\.i 0x0
10a0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 10a6: 30 20 14 88 20 00 fcmp\.le\.s0 p3,p4=f4,f5
+ 10a6: 30 20 14 88 24 00 fcmp\.unord\.s0 p3,p4=f4,f5
10ac: 00 00 04 00 nop\.i 0x0
10b0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 10b6: 30 20 14 88 21 00 fcmp\.le\.s1 p3,p4=f4,f5
+ 10b6: 30 20 14 88 25 00 fcmp\.unord\.s1 p3,p4=f4,f5
10bc: 00 00 04 00 nop\.i 0x0
10c0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 10c6: 30 20 14 88 22 00 fcmp\.le\.s2 p3,p4=f4,f5
+ 10c6: 30 20 14 88 26 00 fcmp\.unord\.s2 p3,p4=f4,f5
10cc: 00 00 04 00 nop\.i 0x0
10d0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 10d6: 30 20 14 88 23 00 fcmp\.le\.s3 p3,p4=f4,f5
+ 10d6: 30 20 14 88 27 00 fcmp\.unord\.s3 p3,p4=f4,f5
10dc: 00 00 04 00 nop\.i 0x0
10e0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 10e6: 30 20 14 88 24 00 fcmp\.unord\.s0 p3,p4=f4,f5
+ 10e6: 30 28 10 08 24 00 fcmp\.lt\.s0 p3,p4=f5,f4
10ec: 00 00 04 00 nop\.i 0x0
10f0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 10f6: 30 20 14 88 24 00 fcmp\.unord\.s0 p3,p4=f4,f5
+ 10f6: 30 28 10 08 24 00 fcmp\.lt\.s0 p3,p4=f5,f4
10fc: 00 00 04 00 nop\.i 0x0
1100: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1106: 30 20 14 88 25 00 fcmp\.unord\.s1 p3,p4=f4,f5
+ 1106: 30 28 10 08 25 00 fcmp\.lt\.s1 p3,p4=f5,f4
110c: 00 00 04 00 nop\.i 0x0
1110: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1116: 30 20 14 88 26 00 fcmp\.unord\.s2 p3,p4=f4,f5
+ 1116: 30 28 10 08 26 00 fcmp\.lt\.s2 p3,p4=f5,f4
111c: 00 00 04 00 nop\.i 0x0
1120: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1126: 30 20 14 88 27 00 fcmp\.unord\.s3 p3,p4=f4,f5
+ 1126: 30 28 10 08 27 00 fcmp\.lt\.s3 p3,p4=f5,f4
112c: 00 00 04 00 nop\.i 0x0
1130: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1136: 30 28 10 08 24 00 fcmp\.lt\.s0 p3,p4=f5,f4
+ 1136: 30 28 10 88 20 00 fcmp\.le\.s0 p3,p4=f5,f4
113c: 00 00 04 00 nop\.i 0x0
1140: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1146: 30 28 10 08 24 00 fcmp\.lt\.s0 p3,p4=f5,f4
+ 1146: 30 28 10 88 20 00 fcmp\.le\.s0 p3,p4=f5,f4
114c: 00 00 04 00 nop\.i 0x0
1150: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1156: 30 28 10 08 25 00 fcmp\.lt\.s1 p3,p4=f5,f4
+ 1156: 30 28 10 88 21 00 fcmp\.le\.s1 p3,p4=f5,f4
115c: 00 00 04 00 nop\.i 0x0
1160: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1166: 30 28 10 08 26 00 fcmp\.lt\.s2 p3,p4=f5,f4
+ 1166: 30 28 10 88 22 00 fcmp\.le\.s2 p3,p4=f5,f4
116c: 00 00 04 00 nop\.i 0x0
1170: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1176: 30 28 10 08 27 00 fcmp\.lt\.s3 p3,p4=f5,f4
+ 1176: 30 28 10 88 23 00 fcmp\.le\.s3 p3,p4=f5,f4
117c: 00 00 04 00 nop\.i 0x0
1180: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1186: 30 28 10 88 20 00 fcmp\.le\.s0 p3,p4=f5,f4
+ 1186: 40 20 14 06 20 00 fcmp\.eq\.s0 p4,p3=f4,f5
118c: 00 00 04 00 nop\.i 0x0
1190: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1196: 30 28 10 88 20 00 fcmp\.le\.s0 p3,p4=f5,f4
+ 1196: 40 20 14 06 20 00 fcmp\.eq\.s0 p4,p3=f4,f5
119c: 00 00 04 00 nop\.i 0x0
11a0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 11a6: 30 28 10 88 21 00 fcmp\.le\.s1 p3,p4=f5,f4
+ 11a6: 40 20 14 06 21 00 fcmp\.eq\.s1 p4,p3=f4,f5
11ac: 00 00 04 00 nop\.i 0x0
11b0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 11b6: 30 28 10 88 22 00 fcmp\.le\.s2 p3,p4=f5,f4
+ 11b6: 40 20 14 06 22 00 fcmp\.eq\.s2 p4,p3=f4,f5
11bc: 00 00 04 00 nop\.i 0x0
11c0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 11c6: 30 28 10 88 23 00 fcmp\.le\.s3 p3,p4=f5,f4
+ 11c6: 40 20 14 06 23 00 fcmp\.eq\.s3 p4,p3=f4,f5
11cc: 00 00 04 00 nop\.i 0x0
11d0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 11d6: 40 20 14 06 20 00 fcmp\.eq\.s0 p4,p3=f4,f5
+ 11d6: 40 20 14 06 24 00 fcmp\.lt\.s0 p4,p3=f4,f5
11dc: 00 00 04 00 nop\.i 0x0
11e0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 11e6: 40 20 14 06 20 00 fcmp\.eq\.s0 p4,p3=f4,f5
+ 11e6: 40 20 14 06 24 00 fcmp\.lt\.s0 p4,p3=f4,f5
11ec: 00 00 04 00 nop\.i 0x0
11f0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 11f6: 40 20 14 06 21 00 fcmp\.eq\.s1 p4,p3=f4,f5
+ 11f6: 40 20 14 06 25 00 fcmp\.lt\.s1 p4,p3=f4,f5
11fc: 00 00 04 00 nop\.i 0x0
1200: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1206: 40 20 14 06 22 00 fcmp\.eq\.s2 p4,p3=f4,f5
+ 1206: 40 20 14 06 26 00 fcmp\.lt\.s2 p4,p3=f4,f5
120c: 00 00 04 00 nop\.i 0x0
1210: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1216: 40 20 14 06 23 00 fcmp\.eq\.s3 p4,p3=f4,f5
+ 1216: 40 20 14 06 27 00 fcmp\.lt\.s3 p4,p3=f4,f5
121c: 00 00 04 00 nop\.i 0x0
1220: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1226: 40 20 14 06 24 00 fcmp\.lt\.s0 p4,p3=f4,f5
+ 1226: 40 20 14 86 20 00 fcmp\.le\.s0 p4,p3=f4,f5
122c: 00 00 04 00 nop\.i 0x0
1230: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1236: 40 20 14 06 24 00 fcmp\.lt\.s0 p4,p3=f4,f5
+ 1236: 40 20 14 86 20 00 fcmp\.le\.s0 p4,p3=f4,f5
123c: 00 00 04 00 nop\.i 0x0
1240: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1246: 40 20 14 06 25 00 fcmp\.lt\.s1 p4,p3=f4,f5
+ 1246: 40 20 14 86 21 00 fcmp\.le\.s1 p4,p3=f4,f5
124c: 00 00 04 00 nop\.i 0x0
1250: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1256: 40 20 14 06 26 00 fcmp\.lt\.s2 p4,p3=f4,f5
+ 1256: 40 20 14 86 22 00 fcmp\.le\.s2 p4,p3=f4,f5
125c: 00 00 04 00 nop\.i 0x0
1260: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1266: 40 20 14 06 27 00 fcmp\.lt\.s3 p4,p3=f4,f5
+ 1266: 40 20 14 86 23 00 fcmp\.le\.s3 p4,p3=f4,f5
126c: 00 00 04 00 nop\.i 0x0
1270: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1276: 40 20 14 86 20 00 fcmp\.le\.s0 p4,p3=f4,f5
+ 1276: 40 28 10 06 24 00 fcmp\.lt\.s0 p4,p3=f5,f4
127c: 00 00 04 00 nop\.i 0x0
1280: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1286: 40 20 14 86 20 00 fcmp\.le\.s0 p4,p3=f4,f5
+ 1286: 40 28 10 06 24 00 fcmp\.lt\.s0 p4,p3=f5,f4
128c: 00 00 04 00 nop\.i 0x0
1290: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1296: 40 20 14 86 21 00 fcmp\.le\.s1 p4,p3=f4,f5
+ 1296: 40 28 10 06 25 00 fcmp\.lt\.s1 p4,p3=f5,f4
129c: 00 00 04 00 nop\.i 0x0
12a0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 12a6: 40 20 14 86 22 00 fcmp\.le\.s2 p4,p3=f4,f5
+ 12a6: 40 28 10 06 26 00 fcmp\.lt\.s2 p4,p3=f5,f4
12ac: 00 00 04 00 nop\.i 0x0
12b0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 12b6: 40 20 14 86 23 00 fcmp\.le\.s3 p4,p3=f4,f5
+ 12b6: 40 28 10 06 27 00 fcmp\.lt\.s3 p4,p3=f5,f4
12bc: 00 00 04 00 nop\.i 0x0
12c0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 12c6: 40 28 10 06 24 00 fcmp\.lt\.s0 p4,p3=f5,f4
+ 12c6: 40 28 10 86 20 00 fcmp\.le\.s0 p4,p3=f5,f4
12cc: 00 00 04 00 nop\.i 0x0
12d0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 12d6: 40 28 10 06 24 00 fcmp\.lt\.s0 p4,p3=f5,f4
+ 12d6: 40 28 10 86 20 00 fcmp\.le\.s0 p4,p3=f5,f4
12dc: 00 00 04 00 nop\.i 0x0
12e0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 12e6: 40 28 10 06 25 00 fcmp\.lt\.s1 p4,p3=f5,f4
+ 12e6: 40 28 10 86 21 00 fcmp\.le\.s1 p4,p3=f5,f4
12ec: 00 00 04 00 nop\.i 0x0
12f0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 12f6: 40 28 10 06 26 00 fcmp\.lt\.s2 p4,p3=f5,f4
+ 12f6: 40 28 10 86 22 00 fcmp\.le\.s2 p4,p3=f5,f4
12fc: 00 00 04 00 nop\.i 0x0
1300: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1306: 40 28 10 06 27 00 fcmp\.lt\.s3 p4,p3=f5,f4
+ 1306: 40 28 10 86 23 00 fcmp\.le\.s3 p4,p3=f5,f4
130c: 00 00 04 00 nop\.i 0x0
1310: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1316: 40 28 10 86 20 00 fcmp\.le\.s0 p4,p3=f5,f4
+ 1316: 40 20 14 86 24 00 fcmp\.unord\.s0 p4,p3=f4,f5
131c: 00 00 04 00 nop\.i 0x0
1320: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1326: 40 28 10 86 20 00 fcmp\.le\.s0 p4,p3=f5,f4
+ 1326: 40 20 14 86 24 00 fcmp\.unord\.s0 p4,p3=f4,f5
132c: 00 00 04 00 nop\.i 0x0
1330: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1336: 40 28 10 86 21 00 fcmp\.le\.s1 p4,p3=f5,f4
+ 1336: 40 20 14 86 25 00 fcmp\.unord\.s1 p4,p3=f4,f5
133c: 00 00 04 00 nop\.i 0x0
1340: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1346: 40 28 10 86 22 00 fcmp\.le\.s2 p4,p3=f5,f4
+ 1346: 40 20 14 86 26 00 fcmp\.unord\.s2 p4,p3=f4,f5
134c: 00 00 04 00 nop\.i 0x0
1350: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1356: 40 28 10 86 23 00 fcmp\.le\.s3 p4,p3=f5,f4
+ 1356: 40 20 14 86 27 00 fcmp\.unord\.s3 p4,p3=f4,f5
135c: 00 00 04 00 nop\.i 0x0
1360: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1366: 40 20 14 86 24 00 fcmp\.unord\.s0 p4,p3=f4,f5
+ 1366: 40 28 18 20 00 00 fmerge\.s f4=f5,f6
136c: 00 00 04 00 nop\.i 0x0
1370: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1376: 40 20 14 86 24 00 fcmp\.unord\.s0 p4,p3=f4,f5
+ 1376: 40 28 18 22 00 00 fmerge\.ns f4=f5,f6
137c: 00 00 04 00 nop\.i 0x0
1380: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1386: 40 20 14 86 25 00 fcmp\.unord\.s1 p4,p3=f4,f5
+ 1386: 40 28 18 24 00 00 fmerge\.se f4=f5,f6
138c: 00 00 04 00 nop\.i 0x0
1390: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1396: 40 20 14 86 26 00 fcmp\.unord\.s2 p4,p3=f4,f5
+ 1396: 40 28 18 72 00 00 fmix\.lr f4=f5,f6
139c: 00 00 04 00 nop\.i 0x0
13a0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 13a6: 40 20 14 86 27 00 fcmp\.unord\.s3 p4,p3=f4,f5
+ 13a6: 40 28 18 74 00 00 fmix\.r f4=f5,f6
13ac: 00 00 04 00 nop\.i 0x0
13b0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 13b6: 40 28 18 20 00 00 fmerge\.s f4=f5,f6
+ 13b6: 40 28 18 76 00 00 fmix\.l f4=f5,f6
13bc: 00 00 04 00 nop\.i 0x0
13c0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 13c6: 40 28 18 22 00 00 fmerge\.ns f4=f5,f6
+ 13c6: 40 28 18 7a 00 00 fsxt\.l f4=f5,f6
13cc: 00 00 04 00 nop\.i 0x0
13d0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 13d6: 40 28 18 24 00 00 fmerge\.se f4=f5,f6
+ 13d6: 40 28 18 50 00 00 fpack f4=f5,f6
13dc: 00 00 04 00 nop\.i 0x0
13e0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 13e6: 40 28 18 72 00 00 fmix\.lr f4=f5,f6
+ 13e6: 40 28 18 68 00 00 fswap f4=f5,f6
13ec: 00 00 04 00 nop\.i 0x0
13f0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 13f6: 40 28 18 74 00 00 fmix\.r f4=f5,f6
+ 13f6: 40 28 18 6a 00 00 fswap\.nl f4=f5,f6
13fc: 00 00 04 00 nop\.i 0x0
1400: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1406: 40 28 18 76 00 00 fmix\.l f4=f5,f6
+ 1406: 40 28 18 6c 00 00 fswap\.nr f4=f5,f6
140c: 00 00 04 00 nop\.i 0x0
1410: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1416: 40 28 18 7a 00 00 fsxt\.l f4=f5,f6
+ 1416: 40 28 18 58 00 00 fand f4=f5,f6
141c: 00 00 04 00 nop\.i 0x0
1420: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1426: 40 28 18 50 00 00 fpack f4=f5,f6
+ 1426: 40 28 18 5a 00 00 fandcm f4=f5,f6
142c: 00 00 04 00 nop\.i 0x0
1430: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1436: 40 28 18 68 00 00 fswap f4=f5,f6
+ 1436: 40 28 18 5c 00 00 for f4=f5,f6
143c: 00 00 04 00 nop\.i 0x0
1440: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1446: 40 28 18 6a 00 00 fswap\.nl f4=f5,f6
+ 1446: 40 28 18 5e 00 00 fxor f4=f5,f6
144c: 00 00 04 00 nop\.i 0x0
1450: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1456: 40 28 18 6c 00 00 fswap\.nr f4=f5,f6
+ 1456: 40 28 18 20 08 00 fpmerge\.s f4=f5,f6
145c: 00 00 04 00 nop\.i 0x0
1460: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1466: 40 28 18 58 00 00 fand f4=f5,f6
+ 1466: 40 28 18 22 08 00 fpmerge\.ns f4=f5,f6
146c: 00 00 04 00 nop\.i 0x0
1470: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1476: 40 28 18 5a 00 00 fandcm f4=f5,f6
+ 1476: 40 28 18 24 08 00 fpmerge\.se f4=f5,f6
147c: 00 00 04 00 nop\.i 0x0
1480: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1486: 40 28 18 5c 00 00 for f4=f5,f6
+ 1486: 40 00 14 20 00 00 fabs f4=f5
148c: 00 00 04 00 nop\.i 0x0
1490: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1496: 40 28 18 5e 00 00 fxor f4=f5,f6
+ 1496: 40 28 14 22 00 00 fneg f4=f5
149c: 00 00 04 00 nop\.i 0x0
14a0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 14a6: 40 28 18 20 08 00 fpmerge\.s f4=f5,f6
+ 14a6: 40 00 14 22 00 00 fnegabs f4=f5
14ac: 00 00 04 00 nop\.i 0x0
14b0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 14b6: 40 28 18 22 08 00 fpmerge\.ns f4=f5,f6
+ 14b6: 40 00 14 20 08 00 fpabs f4=f5
14bc: 00 00 04 00 nop\.i 0x0
14c0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 14c6: 40 28 18 24 08 00 fpmerge\.se f4=f5,f6
+ 14c6: 40 28 14 22 08 00 fpneg f4=f5
14cc: 00 00 04 00 nop\.i 0x0
14d0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 14d6: 40 00 14 20 00 00 fabs f4=f5
+ 14d6: 40 00 14 22 08 00 fpnegabs f4=f5
14dc: 00 00 04 00 nop\.i 0x0
14e0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 14e6: 40 28 14 22 00 00 fneg f4=f5
+ 14e6: 40 28 00 30 00 00 fcvt\.fx\.s0 f4=f5
14ec: 00 00 04 00 nop\.i 0x0
14f0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 14f6: 40 00 14 22 00 00 fnegabs f4=f5
+ 14f6: 40 28 00 30 00 00 fcvt\.fx\.s0 f4=f5
14fc: 00 00 04 00 nop\.i 0x0
1500: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1506: 40 00 14 20 08 00 fpabs f4=f5
+ 1506: 40 28 00 30 01 00 fcvt\.fx\.s1 f4=f5
150c: 00 00 04 00 nop\.i 0x0
1510: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1516: 40 28 14 22 08 00 fpneg f4=f5
+ 1516: 40 28 00 30 02 00 fcvt\.fx\.s2 f4=f5
151c: 00 00 04 00 nop\.i 0x0
1520: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1526: 40 00 14 22 08 00 fpnegabs f4=f5
+ 1526: 40 28 00 30 03 00 fcvt\.fx\.s3 f4=f5
152c: 00 00 04 00 nop\.i 0x0
1530: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1536: 40 28 00 30 00 00 fcvt\.fx\.s0 f4=f5
+ 1536: 40 28 00 34 00 00 fcvt\.fx\.trunc\.s0 f4=f5
153c: 00 00 04 00 nop\.i 0x0
1540: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1546: 40 28 00 30 00 00 fcvt\.fx\.s0 f4=f5
+ 1546: 40 28 00 34 00 00 fcvt\.fx\.trunc\.s0 f4=f5
154c: 00 00 04 00 nop\.i 0x0
1550: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1556: 40 28 00 30 01 00 fcvt\.fx\.s1 f4=f5
+ 1556: 40 28 00 34 01 00 fcvt\.fx\.trunc\.s1 f4=f5
155c: 00 00 04 00 nop\.i 0x0
1560: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1566: 40 28 00 30 02 00 fcvt\.fx\.s2 f4=f5
+ 1566: 40 28 00 34 02 00 fcvt\.fx\.trunc\.s2 f4=f5
156c: 00 00 04 00 nop\.i 0x0
1570: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1576: 40 28 00 30 03 00 fcvt\.fx\.s3 f4=f5
+ 1576: 40 28 00 34 03 00 fcvt\.fx\.trunc\.s3 f4=f5
157c: 00 00 04 00 nop\.i 0x0
1580: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1586: 40 28 00 34 00 00 fcvt\.fx\.trunc\.s0 f4=f5
+ 1586: 40 28 00 32 00 00 fcvt\.fxu\.s0 f4=f5
158c: 00 00 04 00 nop\.i 0x0
1590: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1596: 40 28 00 34 00 00 fcvt\.fx\.trunc\.s0 f4=f5
+ 1596: 40 28 00 32 00 00 fcvt\.fxu\.s0 f4=f5
159c: 00 00 04 00 nop\.i 0x0
15a0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 15a6: 40 28 00 34 01 00 fcvt\.fx\.trunc\.s1 f4=f5
+ 15a6: 40 28 00 32 01 00 fcvt\.fxu\.s1 f4=f5
15ac: 00 00 04 00 nop\.i 0x0
15b0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 15b6: 40 28 00 34 02 00 fcvt\.fx\.trunc\.s2 f4=f5
+ 15b6: 40 28 00 32 02 00 fcvt\.fxu\.s2 f4=f5
15bc: 00 00 04 00 nop\.i 0x0
15c0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 15c6: 40 28 00 34 03 00 fcvt\.fx\.trunc\.s3 f4=f5
+ 15c6: 40 28 00 32 03 00 fcvt\.fxu\.s3 f4=f5
15cc: 00 00 04 00 nop\.i 0x0
15d0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 15d6: 40 28 00 32 00 00 fcvt\.fxu\.s0 f4=f5
+ 15d6: 40 28 00 36 00 00 fcvt\.fxu\.trunc\.s0 f4=f5
15dc: 00 00 04 00 nop\.i 0x0
15e0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 15e6: 40 28 00 32 00 00 fcvt\.fxu\.s0 f4=f5
+ 15e6: 40 28 00 36 00 00 fcvt\.fxu\.trunc\.s0 f4=f5
15ec: 00 00 04 00 nop\.i 0x0
15f0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 15f6: 40 28 00 32 01 00 fcvt\.fxu\.s1 f4=f5
+ 15f6: 40 28 00 36 01 00 fcvt\.fxu\.trunc\.s1 f4=f5
15fc: 00 00 04 00 nop\.i 0x0
1600: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1606: 40 28 00 32 02 00 fcvt\.fxu\.s2 f4=f5
+ 1606: 40 28 00 36 02 00 fcvt\.fxu\.trunc\.s2 f4=f5
160c: 00 00 04 00 nop\.i 0x0
1610: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1616: 40 28 00 32 03 00 fcvt\.fxu\.s3 f4=f5
+ 1616: 40 28 00 36 03 00 fcvt\.fxu\.trunc\.s3 f4=f5
161c: 00 00 04 00 nop\.i 0x0
1620: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1626: 40 28 00 36 00 00 fcvt\.fxu\.trunc\.s0 f4=f5
+ 1626: 40 28 00 30 08 00 fpcvt\.fx\.s0 f4=f5
162c: 00 00 04 00 nop\.i 0x0
1630: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1636: 40 28 00 36 00 00 fcvt\.fxu\.trunc\.s0 f4=f5
+ 1636: 40 28 00 30 08 00 fpcvt\.fx\.s0 f4=f5
163c: 00 00 04 00 nop\.i 0x0
1640: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1646: 40 28 00 36 01 00 fcvt\.fxu\.trunc\.s1 f4=f5
+ 1646: 40 28 00 30 09 00 fpcvt\.fx\.s1 f4=f5
164c: 00 00 04 00 nop\.i 0x0
1650: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1656: 40 28 00 36 02 00 fcvt\.fxu\.trunc\.s2 f4=f5
+ 1656: 40 28 00 30 0a 00 fpcvt\.fx\.s2 f4=f5
165c: 00 00 04 00 nop\.i 0x0
1660: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1666: 40 28 00 36 03 00 fcvt\.fxu\.trunc\.s3 f4=f5
+ 1666: 40 28 00 30 0b 00 fpcvt\.fx\.s3 f4=f5
166c: 00 00 04 00 nop\.i 0x0
1670: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1676: 40 28 00 30 08 00 fpcvt\.fx\.s0 f4=f5
+ 1676: 40 28 00 34 08 00 fpcvt\.fx\.trunc\.s0 f4=f5
167c: 00 00 04 00 nop\.i 0x0
1680: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1686: 40 28 00 30 08 00 fpcvt\.fx\.s0 f4=f5
+ 1686: 40 28 00 34 08 00 fpcvt\.fx\.trunc\.s0 f4=f5
168c: 00 00 04 00 nop\.i 0x0
1690: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1696: 40 28 00 30 09 00 fpcvt\.fx\.s1 f4=f5
+ 1696: 40 28 00 34 09 00 fpcvt\.fx\.trunc\.s1 f4=f5
169c: 00 00 04 00 nop\.i 0x0
16a0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 16a6: 40 28 00 30 0a 00 fpcvt\.fx\.s2 f4=f5
+ 16a6: 40 28 00 34 0a 00 fpcvt\.fx\.trunc\.s2 f4=f5
16ac: 00 00 04 00 nop\.i 0x0
16b0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 16b6: 40 28 00 30 0b 00 fpcvt\.fx\.s3 f4=f5
+ 16b6: 40 28 00 34 0b 00 fpcvt\.fx\.trunc\.s3 f4=f5
16bc: 00 00 04 00 nop\.i 0x0
16c0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 16c6: 40 28 00 34 08 00 fpcvt\.fx\.trunc\.s0 f4=f5
+ 16c6: 40 28 00 32 08 00 fpcvt\.fxu\.s0 f4=f5
16cc: 00 00 04 00 nop\.i 0x0
16d0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 16d6: 40 28 00 34 08 00 fpcvt\.fx\.trunc\.s0 f4=f5
+ 16d6: 40 28 00 32 08 00 fpcvt\.fxu\.s0 f4=f5
16dc: 00 00 04 00 nop\.i 0x0
16e0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 16e6: 40 28 00 34 09 00 fpcvt\.fx\.trunc\.s1 f4=f5
+ 16e6: 40 28 00 32 09 00 fpcvt\.fxu\.s1 f4=f5
16ec: 00 00 04 00 nop\.i 0x0
16f0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 16f6: 40 28 00 34 0a 00 fpcvt\.fx\.trunc\.s2 f4=f5
+ 16f6: 40 28 00 32 0a 00 fpcvt\.fxu\.s2 f4=f5
16fc: 00 00 04 00 nop\.i 0x0
1700: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1706: 40 28 00 34 0b 00 fpcvt\.fx\.trunc\.s3 f4=f5
+ 1706: 40 28 00 32 0b 00 fpcvt\.fxu\.s3 f4=f5
170c: 00 00 04 00 nop\.i 0x0
1710: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1716: 40 28 00 32 08 00 fpcvt\.fxu\.s0 f4=f5
+ 1716: 40 28 00 36 08 00 fpcvt\.fxu\.trunc\.s0 f4=f5
171c: 00 00 04 00 nop\.i 0x0
1720: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1726: 40 28 00 32 08 00 fpcvt\.fxu\.s0 f4=f5
+ 1726: 40 28 00 36 08 00 fpcvt\.fxu\.trunc\.s0 f4=f5
172c: 00 00 04 00 nop\.i 0x0
1730: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1736: 40 28 00 32 09 00 fpcvt\.fxu\.s1 f4=f5
+ 1736: 40 28 00 36 09 00 fpcvt\.fxu\.trunc\.s1 f4=f5
173c: 00 00 04 00 nop\.i 0x0
1740: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1746: 40 28 00 32 0a 00 fpcvt\.fxu\.s2 f4=f5
+ 1746: 40 28 00 36 0a 00 fpcvt\.fxu\.trunc\.s2 f4=f5
174c: 00 00 04 00 nop\.i 0x0
1750: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1756: 40 28 00 32 0b 00 fpcvt\.fxu\.s3 f4=f5
+ 1756: 40 28 00 36 0b 00 fpcvt\.fxu\.trunc\.s3 f4=f5
175c: 00 00 04 00 nop\.i 0x0
1760: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1766: 40 28 00 36 08 00 fpcvt\.fxu\.trunc\.s0 f4=f5
+ 1766: 40 28 00 38 00 00 fcvt\.xf f4=f5
176c: 00 00 04 00 nop\.i 0x0
1770: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1776: 40 28 00 36 08 00 fpcvt\.fxu\.trunc\.s0 f4=f5
+ 1776: 40 00 14 02 40 00 fnorm\.s0 f4=f5
177c: 00 00 04 00 nop\.i 0x0
1780: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1786: 40 28 00 36 09 00 fpcvt\.fxu\.trunc\.s1 f4=f5
+ 1786: 00 00 00 08 00 00 fsetc\.s0 0x0,0x0
178c: 00 00 04 00 nop\.i 0x0
1790: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1796: 40 28 00 36 0a 00 fpcvt\.fxu\.trunc\.s2 f4=f5
+ 1796: 00 f8 fd 08 00 00 fsetc\.s0 0x3f,0x3f
179c: 00 00 04 00 nop\.i 0x0
17a0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 17a6: 40 28 00 36 0b 00 fpcvt\.fxu\.trunc\.s3 f4=f5
+ 17a6: 00 00 00 08 00 00 fsetc\.s0 0x0,0x0
17ac: 00 00 04 00 nop\.i 0x0
17b0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 17b6: 40 28 00 38 00 00 fcvt\.xf f4=f5
+ 17b6: 00 f8 fd 08 00 00 fsetc\.s0 0x3f,0x3f
17bc: 00 00 04 00 nop\.i 0x0
17c0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 17c6: 40 00 14 02 40 00 fnorm\.s0 f4=f5
+ 17c6: 00 00 00 08 01 00 fsetc\.s1 0x0,0x0
17cc: 00 00 04 00 nop\.i 0x0
17d0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 17d6: 00 00 00 08 00 00 fsetc\.s0 0x0,0x0
+ 17d6: 00 f8 fd 08 01 00 fsetc\.s1 0x3f,0x3f
17dc: 00 00 04 00 nop\.i 0x0
17e0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 17e6: 00 f8 fd 08 00 00 fsetc\.s0 0x3f,0x3f
+ 17e6: 00 00 00 08 02 00 fsetc\.s2 0x0,0x0
17ec: 00 00 04 00 nop\.i 0x0
17f0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 17f6: 00 00 00 08 00 00 fsetc\.s0 0x0,0x0
+ 17f6: 00 f8 fd 08 02 00 fsetc\.s2 0x3f,0x3f
17fc: 00 00 04 00 nop\.i 0x0
1800: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1806: 00 f8 fd 08 00 00 fsetc\.s0 0x3f,0x3f
+ 1806: 00 00 00 08 03 00 fsetc\.s3 0x0,0x0
180c: 00 00 04 00 nop\.i 0x0
1810: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1816: 00 00 00 08 01 00 fsetc\.s1 0x0,0x0
+ 1816: 00 f8 fd 08 03 00 fsetc\.s3 0x3f,0x3f
181c: 00 00 04 00 nop\.i 0x0
1820: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1826: 00 f8 fd 08 01 00 fsetc\.s1 0x3f,0x3f
+ 1826: 00 00 00 0a 00 00 fclrf\.s0
182c: 00 00 04 00 nop\.i 0x0
1830: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1836: 00 00 00 08 02 00 fsetc\.s2 0x0,0x0
+ 1836: 00 00 00 0a 00 00 fclrf\.s0
183c: 00 00 04 00 nop\.i 0x0
1840: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1846: 00 f8 fd 08 02 00 fsetc\.s2 0x3f,0x3f
+ 1846: 00 00 00 0a 01 00 fclrf\.s1
184c: 00 00 04 00 nop\.i 0x0
1850: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1856: 00 00 00 08 03 00 fsetc\.s3 0x0,0x0
+ 1856: 00 00 00 0a 02 00 fclrf\.s2
185c: 00 00 04 00 nop\.i 0x0
1860: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1866: 00 f8 fd 08 03 00 fsetc\.s3 0x3f,0x3f
+ 1866: 00 00 00 0a 03 00 fclrf\.s3
186c: 00 00 04 00 nop\.i 0x0
1870: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1876: 00 00 00 0a 00 00 fclrf\.s0
+ 1876: 90 e7 ff 10 04 00 fchkf\.s0 0 <_start>
187c: 00 00 04 00 nop\.i 0x0
1880: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1886: 00 00 00 0a 00 00 fclrf\.s0
+ 1886: 80 e7 ff 10 04 00 fchkf\.s0 0 <_start>
188c: 00 00 04 00 nop\.i 0x0
1890: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1896: 00 00 00 0a 01 00 fclrf\.s1
+ 1896: 70 e7 ff 10 05 00 fchkf\.s1 0 <_start>
189c: 00 00 04 00 nop\.i 0x0
18a0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 18a6: 00 00 00 0a 02 00 fclrf\.s2
+ 18a6: 60 e7 ff 10 06 00 fchkf\.s2 0 <_start>
18ac: 00 00 04 00 nop\.i 0x0
18b0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 18b6: 00 00 00 0a 03 00 fclrf\.s3
+ 18b6: 50 e7 ff 10 07 00 fchkf\.s3 0 <_start>
18bc: 00 00 04 00 nop\.i 0x0
18c0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 18c6: 40 e7 ff 10 04 00 fchkf\.s0 0 <_start>
+ 18c6: 00 00 00 00 00 00 break\.f 0x0
18cc: 00 00 04 00 nop\.i 0x0
- 18d0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 18d6: 30 e7 ff 10 04 00 fchkf\.s0 0 <_start>
- 18dc: 00 00 04 00 nop\.i 0x0
- 18e0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 18e6: 20 e7 ff 10 05 00 fchkf\.s1 0 <_start>
- 18ec: 00 00 04 00 nop\.i 0x0
- 18f0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 18f6: 10 e7 ff 10 06 00 fchkf\.s2 0 <_start>
- 18fc: 00 00 04 00 nop\.i 0x0
- 1900: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1906: 00 e7 ff 10 07 00 fchkf\.s3 0 <_start>
- 190c: 00 00 04 00 nop\.i 0x0
- 1910: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1916: 00 00 00 00 00 00 break\.f 0x0
- 191c: 00 00 04 00 nop\.i 0x0
- 1920: 0d 00 00 00 01 00 \[MFI\] nop\.m 0x0
- 1926: 00 00 00 02 00 00 nop\.f 0x0
- 192c: 00 00 04 00 nop\.i 0x0;;
+ 18d0: 0d 00 00 00 01 00 \[MFI\] nop\.m 0x0
+ 18d6: 00 00 00 02 00 00 nop\.f 0x0
+ 18dc: 00 00 04 00 nop\.i 0x0;;
diff --git a/gas/testsuite/gas/ia64/opc-f.pl b/gas/testsuite/gas/ia64/opc-f.pl
index 70354f8..296d428 100644
--- a/gas/testsuite/gas/ia64/opc-f.pl
+++ b/gas/testsuite/gas/ia64/opc-f.pl
@@ -14,8 +14,8 @@ foreach $i ( "fma", "fma.s", "fma.d", "fpma",
}
foreach $i ( "fmpy", "fmpy.s", "fmpy.d", "fpmpy",
- "fadd", "fadd.s", "fadd.d", #"fpadd", ??? ias doesn't eat it
- "fsub", "fsub.s", "fsub.d", "fpsub",
+ "fadd", "fadd.s", "fadd.d",
+ "fsub", "fsub.s", "fsub.d",
"fnmpy", "fnmpy.s", "fnmpy.d", "fpnmpy" ) {
foreach $s (@sf) {
print "\t${i}${s} f4 = f5, f6\n";
diff --git a/gas/testsuite/gas/ia64/opc-f.s b/gas/testsuite/gas/ia64/opc-f.s
index 929ba6a..c44c840 100644
--- a/gas/testsuite/gas/ia64/opc-f.s
+++ b/gas/testsuite/gas/ia64/opc-f.s
@@ -134,12 +134,6 @@ _start:
fsub.d.s2 f4 = f5, f6
fsub.d.s3 f4 = f5, f6
- fpsub f4 = f5, f6
- fpsub.s0 f4 = f5, f6
- fpsub.s1 f4 = f5, f6
- fpsub.s2 f4 = f5, f6
- fpsub.s3 f4 = f5, f6
-
fnmpy f4 = f5, f6
fnmpy.s0 f4 = f5, f6
fnmpy.s1 f4 = f5, f6
generated by cgit v1.1 at 2024-09-15 03:29:57 +0000