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authorAlan Modra <amodra@gmail.com>2016-12-21 19:13:52 +1030
committerAlan Modra <amodra@gmail.com>2016-12-21 19:18:46 +1030
commit4e25adb3956f880efc28bfebabe79be7338b413f (patch)
tree9e8b41dbf37bac5ab3c6c78abdd26ff6c59019fc /gas
parent9962fe293d16e1e1e4d05154e751fc7576226954 (diff)
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Remove high bit set characters
gas/ * doc/c-lm32.texi: Fix chars with high bit set. * testsuite/gas/bfin/vector2.s: Likewise. gold/ * arm.cc: Fix comment chars with high bit set. include/ * coff/pe.h: Fix comment chars with high bit set. * opcode/xgate.h: Likewise. ld/ * testsuite/ld-scripts/sysroot-prefix.exp: Fix chars with high bit set.
Diffstat (limited to 'gas')
-rw-r--r--gas/ChangeLog5
-rw-r--r--gas/doc/c-lm32.texi2
-rw-r--r--gas/testsuite/gas/bfin/vector2.s10
3 files changed, 11 insertions, 6 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 6c923c3..29c1c0a 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,5 +1,10 @@
2016-12-21 Alan Modra <amodra@gmail.com>
+ * doc/c-lm32.texi: Fix chars with high bit set.
+ * testsuite/gas/bfin/vector2.s: Likewise.
+
+2016-12-21 Alan Modra <amodra@gmail.com>
+
PR gas/10946
* doc/as.texinfo (Chars): Document escape sequences.
diff --git a/gas/doc/c-lm32.texi b/gas/doc/c-lm32.texi
index 6b535b7..fdfa70f 100644
--- a/gas/doc/c-lm32.texi
+++ b/gas/doc/c-lm32.texi
@@ -10,7 +10,7 @@
@ifclear GENERIC
@node Machine Dependencies
-@chapter LM£" Dependent Features
+@chapter LM32 Dependent Features
@end ifclear
@cindex LM32 support
diff --git a/gas/testsuite/gas/bfin/vector2.s b/gas/testsuite/gas/bfin/vector2.s
index be1a5b7..204f72d 100644
--- a/gas/testsuite/gas/bfin/vector2.s
+++ b/gas/testsuite/gas/bfin/vector2.s
@@ -93,7 +93,7 @@ r1=r2 +|+ r3 (SCO);
r4=r3 +|+ r5 (SCO);
r6=r3 +|+ r7 (SCO);
-//Dreg = Dreg –|+ Dreg (opt_mode_0) ; /* subtract | add (b) */
+//Dreg = Dreg -|+ Dreg (opt_mode_0) ; /* subtract | add (b) */
r6=r0 -|+ r1(s) ; /* same as above, subtract|add with saturation */
r0=r1 -|+ r2 ;
@@ -125,7 +125,7 @@ r4=r3 -|+ r5 (SCO);
r6=r3 -|+ r7 (SCO);
-//Dreg = Dreg +|– Dreg (opt_mode_0) ; /* add | subtract (b) */
+//Dreg = Dreg +|- Dreg (opt_mode_0) ; /* add | subtract (b) */
r0=r2 +|- r1(co) ; /* add|subtract with half-word results crossed over in the destination register */
r0=r1 +|- r2 ;
@@ -156,7 +156,7 @@ r1=r2 +|- r3 (SCO);
r4=r3 +|- r5 (SCO);
r6=r3 +|- r7 (SCO);
-//Dreg = Dreg –|– Dreg (opt_mode_0) ; /* subtract | subtract (b) */
+//Dreg = Dreg -|- Dreg (opt_mode_0) ; /* subtract | subtract (b) */
r7=r3 -|- r6(sco) ; /* subtract|subtract with saturation and half-word results crossed over in the destination register */
r0=r1 -|- r2 ;
@@ -188,7 +188,7 @@ r4=r3 -|- r5 (SCO);
r6=r3 -|- r7 (SCO);
//Quad 16-Bit Operations
-//Dreg = Dreg +|+ Dreg, Dreg = Dreg –|– Dreg (opt_mode_0,opt_mode_2) ; /* add | add, subtract | subtract; the set of source registers must be the same for each operation (b) */
+//Dreg = Dreg +|+ Dreg, Dreg = Dreg -|- Dreg (opt_mode_0,opt_mode_2) ; /* add | add, subtract | subtract; the set of source registers must be the same for each operation (b) */
r5=r3 +|+ r4, r7=r3-|-r4 ; /* quad 16-bit operations, add|add, subtract|subtract */
r0=r1 +|+ r2, r7=r1 -|- r2;
@@ -284,7 +284,7 @@ r4=r3 +|+ r5, r3=r3 -|- r5(SCO,ASL);
r6=r3 +|+ r7, r2=r3 -|- r7(SCO,ASL);
-//Dreg = Dreg +|– Dreg, Dreg = Dreg –|+ Dreg (opt_mode_0,opt_mode_2) ; /* add | subtract, subtract | add; the set of source registers must be the same for each operation (b) */
+//Dreg = Dreg +|- Dreg, Dreg = Dreg -|+ Dreg (opt_mode_0,opt_mode_2) ; /* add | subtract, subtract | add; the set of source registers must be the same for each operation (b) */
r5=r3 +|- r4, r7=r3 -|+ r4 ; /* quad 16-bit operations, add|subtract, subtract|add */
r0=r1 +|- r2, r7=r1 -|+ r2;