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| author | H.J. Lu <hjl.tools@gmail.com> | 2016-11-07 14:58:38 -0800 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2016-11-07 14:58:38 -0800 |
| commit | 48c97fa1ba7d6628352fc2433abd91a41f6c8171 (patch) | |
| tree | 6ace8e9feb806261451632e6410f65abc7f9bac1 /gas | |
| parent | 5996220cfa24ef6fddb782617720cd56913b1bb7 (diff) | |
| download | gdb-48c97fa1ba7d6628352fc2433abd91a41f6c8171.zip gdb-48c97fa1ba7d6628352fc2433abd91a41f6c8171.tar.gz gdb-48c97fa1ba7d6628352fc2433abd91a41f6c8171.tar.bz2 | |
X86: Properly handle bad FPU opcode
Since Bad_Opcode and FGRPd9_2 were the same in i386-dis.c, all
Bad_Opcode entries in float_reg were displaced as FGRPd9_2. This
patch adds an entry for Bad_Opcode in fgrps to avoid treating it
as FGRPd9_2.
gas/
PR binutils/20775
* testsuite/gas/i386/i386.exp: Run fpu-bad.
* testsuite/gas/i386/fpu-bad.d: New file.
* testsuite/gas/i386/fpu-bad.s: Likewise.
opcodes/
PR binutils/20775
* i386-dis.c (FGRPd9_2): Replace 0 with 1.
(FGRPd9_4): Replace 1 with 2.
(FGRPd9_5): Replace 2 with 3.
(FGRPd9_6): Replace 3 with 4.
(FGRPd9_7): Replace 4 with 5.
(FGRPda_5): Replace 5 with 6.
(FGRPdb_4): Replace 6 with 7.
(FGRPde_3): Replace 7 with 8.
(FGRPdf_4): Replace 8 with 9.
(fgrps): Add an entry for Bad_Opcode.
Diffstat (limited to 'gas')
| -rw-r--r-- | gas/ChangeLog | 7 | ||||
| -rw-r--r-- | gas/testsuite/gas/i386/fpu-bad.d | 11 | ||||
| -rw-r--r-- | gas/testsuite/gas/i386/fpu-bad.s | 4 | ||||
| -rw-r--r-- | gas/testsuite/gas/i386/i386.exp | 1 |
4 files changed, 23 insertions, 0 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 6cdfc69..e8481a3 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,10 @@ +2016-11-07 H.J. Lu <hongjiu.lu@intel.com> + + PR binutils/20775 + * testsuite/gas/i386/i386.exp: Run fpu-bad. + * testsuite/gas/i386/fpu-bad.d: New file. + * testsuite/gas/i386/fpu-bad.s: Likewise. + 2016-11-04 Nathan Sidwell <nathan@acm.org> gas/ diff --git a/gas/testsuite/gas/i386/fpu-bad.d b/gas/testsuite/gas/i386/fpu-bad.d new file mode 100644 index 0000000..ea1fe24 --- /dev/null +++ b/gas/testsuite/gas/i386/fpu-bad.d @@ -0,0 +1,11 @@ +#as: --32 +#objdump: -dw +#name: i386 fpu bad opcodes + +.*: +file format .* + +Disassembly of section .text: + +0+ <start>: + +[a-f0-9]+: dd f0 \(bad\) +#pass diff --git a/gas/testsuite/gas/i386/fpu-bad.s b/gas/testsuite/gas/i386/fpu-bad.s new file mode 100644 index 0000000..a038170 --- /dev/null +++ b/gas/testsuite/gas/i386/fpu-bad.s @@ -0,0 +1,4 @@ + .text +start: + .byte 0xdd + .byte 0xf0 diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp index 11c342a..1b28fa1 100644 --- a/gas/testsuite/gas/i386/i386.exp +++ b/gas/testsuite/gas/i386/i386.exp @@ -378,6 +378,7 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]] run_dump_test "ptwrite-intel" run_list_test "avx512vl-1" "-al" run_list_test "avx512vl-2" "-al" + run_dump_test "fpu-bad" # These tests require support for 8 and 16 bit relocs, # so we only run them for ELF and COFF targets. |