Support Intel AVX-IFMA

x86: Support Intel AVX-IFMA

Intel AVX IFMA instructions are marked with CpuVEX_PREFIX, which is
cleared by default.  Without {vex} pseudo prefix, Intel IFMA instructions
are encoded with EVEX prefix.  {vex} pseudo prefix will turn on VEX
encoding for Intel IFMA instructions.

gas/

	* NEWS: Support Intel AVX-IFMA.
	* config/tc-i386.c (cpu_arch): Add avx_ifma.
	* doc/c-i386.texi: Document .avx_ifma.
	* testsuite/gas/i386/avx-ifma.d: New file.
	* testsuite/gas/i386/avx-ifma-intel.d: Likewise.
	* testsuite/gas/i386/avx-ifma.s: Likewise.
	* testsuite/gas/i386/x86-64-avx-ifma.d: Likewise.
	* testsuite/gas/i386/x86-64-avx-ifma-intel.d: Likewise.
	* testsuite/gas/i386/x86-64-avx-ifma.s: Likewise.
	* testsuite/gas/i386/i386.exp: Run AVX IFMA tests.

opcodes/

	* i386-dis.c (PREFIX_VEX_0F38B4): New.
	(PREFIX_VEX_0F38B5): Likewise.
	(VEX_W_0F38B4_P_2): Likewise.
	(VEX_W_0F38B5_P_2): Likewise.
	(prefix_table): Add PREFIX_VEX_0F38B4 and PREFIX_VEX_0F38B5.
	(vex_table): Add VEX_W_0F38B4_P_2 and VEX_W_0F38B5_P_2.
	* i386-dis-evex.h: Fold AVX512IFMA entries to AVX-IFMA.
	* i386-gen.c (cpu_flag_init): Clear the CpuAVX_IFMA bit in
	CPU_UNKNOWN_FLAGS. Add CPU_AVX_IFMA_FLGAS and
	CPU_ANY_AVX_IFMA_FLAGS. Add CpuAVX_IFMA to CPU_AVX2_FLAGS.
	(cpu_flags): Add CpuAVX_IFMA.
	* i386-opc.h (CpuAVX_IFMA): New.
	(i386_cpu_flags): Add cpuavx_ifma.
	* i386-opc.tbl: Add Intel AVX IFMA instructions.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

Co-authored-by: Haochen Jiang <haochen.jiang@intel.com>

15 files changed, 252 insertions, 15 deletions

diff --git a/gas/NEWS b/gas/NEWS
index dd8f857..e1e0cbf 100644
--- a/gas/NEWS
+++ b/gas/NEWS
@@ -1,5 +1,7 @@
 -*- text -*-
 
+* Add support for Intel AVX-IFMA instructions.
+
 * Add support for Intel PREFETCHI instructions.
 
 * Add support for Intel AMX-FP16 instructions.
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index bea2de9..7e9fcca 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -1096,6 +1096,7 @@ static const arch_entry cpu_arch[] =
   SUBARCH (hreset, HRESET, ANY_HRESET, false),
   SUBARCH (avx512_fp16, AVX512_FP16, ANY_AVX512_FP16, false),
   SUBARCH (prefetchi, PREFETCHI, PREFETCHI, false),
+  SUBARCH (avx_ifma, AVX_IFMA, ANY_AVX_IFMA, false),
 };
 
 #undef SUBARCH
diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi
index 55a587b..7bdbd26 100644
--- a/gas/doc/c-i386.texi
+++ b/gas/doc/c-i386.texi
@@ -195,6 +195,7 @@ accept various extension mnemonics.  For example,
 @code{avx_vnni},
 @code{avx512_fp16},
 @code{prefetchi},
+@code{avx_ifma},
 @code{amx_int8},
 @code{amx_bf16},
 @code{amx_fp16},
@@ -828,9 +829,9 @@ prefix which generates REX prefix unconditionally.
 @samp{@{nooptimize@}} -- disable instruction size optimization.
 @end itemize
 
-Mnemonics of Intel VNNI instructions are encoded with the EVEX prefix
+Mnemonics of Intel VNNI/IFMA instructions are encoded with the EVEX prefix
 by default.  The pseudo @samp{@{vex@}} prefix can be used to encode
-mnemonics of Intel VNNI instructions with the VEX prefix.
+mnemonics of Intel VNNI/IFMA instructions with the VEX prefix.
 
 @cindex conversion instructions, i386
 @cindex i386 conversion instructions
@@ -1488,7 +1489,7 @@ supported on the CPU specified.  The choices for @var{cpu_type} are:
 @item @samp{.avx512_bitalg} @tab @samp{.avx512_bf16} @tab @samp{.avx512_vp2intersect}
 @item @samp{.tdx} @tab @samp{.avx_vnni}  @tab @samp{.avx512_fp16}
 @item @samp{.clwb} @tab @samp{.rdpid} @tab @samp{.ptwrite} @tab @samp{.ibt}
-@item @samp{.prefetchi}
+@item @samp{.prefetchi} @tab @samp{.avx_ifma}
 @item @samp{.wbnoinvd} @tab @samp{.pconfig} @tab @samp{.waitpkg} @tab @samp{.cldemote}
 @item @samp{.shstk} @tab @samp{.gfni} @tab @samp{.vaes} @tab @samp{.vpclmulqdq}
 @item @samp{.movdiri} @tab @samp{.movdir64b} @tab @samp{.enqcmd} @tab @samp{.tsxldtrk}
diff --git a/gas/testsuite/gas/i386/avx-ifma-intel.d b/gas/testsuite/gas/i386/avx-ifma-intel.d
new file mode 100644
index 0000000..b56ba84
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx-ifma-intel.d
@@ -0,0 +1,37 @@
+#as:
+#objdump: -dw -Mintel
+#name: i386 AVX IFMA insns (Intel disassembly)
+#source: avx-ifma.s
+
+.*: +file format .*
+
+
+Disassembly of section .text:
+
+0+ <_start>:
+[ 	]*[a-f0-9]+:[ 	]*62 f2 dd 08 b5 d2[ 	]*vpmadd52huq xmm2,xmm4,xmm2
+[ 	]*[a-f0-9]+:[ 	]*62 f2 dd 08 b5 d2[ 	]*vpmadd52huq xmm2,xmm4,xmm2
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 d9 b5 d2[ 	]*\{vex\} vpmadd52huq xmm2,xmm4,xmm2
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 d9 b5 11[ 	]*\{vex\} vpmadd52huq xmm2,xmm4,XMMWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 dd 28 b5 d2[ 	]*vpmadd52huq ymm2,ymm4,ymm2
+[ 	]*[a-f0-9]+:[ 	]*62 f2 dd 28 b5 d2[ 	]*vpmadd52huq ymm2,ymm4,ymm2
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 dd b5 d2[ 	]*\{vex\} vpmadd52huq ymm2,ymm4,ymm2
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 dd b5 11[ 	]*\{vex\} vpmadd52huq ymm2,ymm4,YMMWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 dd 08 b4 d2[ 	]*vpmadd52luq xmm2,xmm4,xmm2
+[ 	]*[a-f0-9]+:[ 	]*62 f2 dd 08 b4 d2[ 	]*vpmadd52luq xmm2,xmm4,xmm2
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 d9 b4 d2[ 	]*\{vex\} vpmadd52luq xmm2,xmm4,xmm2
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 d9 b4 11[ 	]*\{vex\} vpmadd52luq xmm2,xmm4,XMMWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 dd 28 b4 d2[ 	]*vpmadd52luq ymm2,ymm4,ymm2
+[ 	]*[a-f0-9]+:[ 	]*62 f2 dd 28 b4 d2[ 	]*vpmadd52luq ymm2,ymm4,ymm2
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 dd b4 d2[ 	]*\{vex\} vpmadd52luq ymm2,ymm4,ymm2
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 dd b4 11[ 	]*\{vex\} vpmadd52luq ymm2,ymm4,YMMWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:[ 	]*62 f2 fd 48 b5 c0[ 	]*vpmadd52huq zmm0,zmm0,zmm0
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 fd b5 c0[ 	]*\{vex\} vpmadd52huq ymm0,ymm0,ymm0
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 f9 b5 c0[ 	]*\{vex\} vpmadd52huq xmm0,xmm0,xmm0
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 fd b5 c0[ 	]*\{vex\} vpmadd52huq ymm0,ymm0,ymm0
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 f9 b5 c0[ 	]*\{vex\} vpmadd52huq xmm0,xmm0,xmm0
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 fd b5 c0[ 	]*\{vex\} vpmadd52huq ymm0,ymm0,ymm0
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 f9 b5 c0[ 	]*\{vex\} vpmadd52huq xmm0,xmm0,xmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f2 dd 08 b5 d2[ 	]*vpmadd52huq xmm2,xmm4,xmm2
+[ 	]*[a-f0-9]+:[ 	]*62 f2 dd 28 b5 d2[ 	]*vpmadd52huq ymm2,ymm4,ymm2
+#pass
diff --git a/gas/testsuite/gas/i386/avx-ifma-inval.l b/gas/testsuite/gas/i386/avx-ifma-inval.l
new file mode 100644
index 0000000..5294c2c
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx-ifma-inval.l
@@ -0,0 +1,3 @@
+.* Assembler messages:
+.*:6: Error: unsupported .* `vpmadd52huq'
+.*:7: Error: operand .* `vpmadd52huq'
diff --git a/gas/testsuite/gas/i386/avx-ifma-inval.s b/gas/testsuite/gas/i386/avx-ifma-inval.s
new file mode 100644
index 0000000..4b763b6
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx-ifma-inval.s
@@ -0,0 +1,7 @@
+# Check illegal in AVXIFMA instructions
+
+	.text
+	.arch .noavx512ifma
+_start:
+	vpmadd52huq %xmm2, %xmm4, %xmm2{%k6}
+	vpmadd52huq %zmm2, %zmm4, %zmm2
diff --git a/gas/testsuite/gas/i386/avx-ifma.d b/gas/testsuite/gas/i386/avx-ifma.d
new file mode 100644
index 0000000..c84b4ca
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx-ifma.d
@@ -0,0 +1,37 @@
+#as:
+#objdump: -dw
+#name: i386 AVX IFMA insns
+#source: avx-ifma.s
+
+.*: +file format .*
+
+
+Disassembly of section .text:
+
+0+ <_start>:
+[ 	]*[a-f0-9]+:[ 	]*62 f2 dd 08 b5 d2[ 	]*vpmadd52huq %xmm2,%xmm4,%xmm2
+[ 	]*[a-f0-9]+:[ 	]*62 f2 dd 08 b5 d2[ 	]*vpmadd52huq %xmm2,%xmm4,%xmm2
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 d9 b5 d2[ 	]*\{vex\} vpmadd52huq %xmm2,%xmm4,%xmm2
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 d9 b5 11[ 	]*\{vex\} vpmadd52huq \(%ecx\),%xmm4,%xmm2
+[ 	]*[a-f0-9]+:[ 	]*62 f2 dd 28 b5 d2[ 	]*vpmadd52huq %ymm2,%ymm4,%ymm2
+[ 	]*[a-f0-9]+:[ 	]*62 f2 dd 28 b5 d2[ 	]*vpmadd52huq %ymm2,%ymm4,%ymm2
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 dd b5 d2[ 	]*\{vex\} vpmadd52huq %ymm2,%ymm4,%ymm2
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 dd b5 11[ 	]*\{vex\} vpmadd52huq \(%ecx\),%ymm4,%ymm2
+[ 	]*[a-f0-9]+:[ 	]*62 f2 dd 08 b4 d2[ 	]*vpmadd52luq %xmm2,%xmm4,%xmm2
+[ 	]*[a-f0-9]+:[ 	]*62 f2 dd 08 b4 d2[ 	]*vpmadd52luq %xmm2,%xmm4,%xmm2
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 d9 b4 d2[ 	]*\{vex\} vpmadd52luq %xmm2,%xmm4,%xmm2
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 d9 b4 11[ 	]*\{vex\} vpmadd52luq \(%ecx\),%xmm4,%xmm2
+[ 	]*[a-f0-9]+:[ 	]*62 f2 dd 28 b4 d2[ 	]*vpmadd52luq %ymm2,%ymm4,%ymm2
+[ 	]*[a-f0-9]+:[ 	]*62 f2 dd 28 b4 d2[ 	]*vpmadd52luq %ymm2,%ymm4,%ymm2
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 dd b4 d2[ 	]*\{vex\} vpmadd52luq %ymm2,%ymm4,%ymm2
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 dd b4 11[ 	]*\{vex\} vpmadd52luq \(%ecx\),%ymm4,%ymm2
+[ 	]*[a-f0-9]+:[ 	]*62 f2 fd 48 b5 c0[ 	]*vpmadd52huq %zmm0,%zmm0,%zmm0
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 fd b5 c0[ 	]*\{vex\} vpmadd52huq %ymm0,%ymm0,%ymm0
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 f9 b5 c0[ 	]*\{vex\} vpmadd52huq %xmm0,%xmm0,%xmm0
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 fd b5 c0[ 	]*\{vex\} vpmadd52huq %ymm0,%ymm0,%ymm0
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 f9 b5 c0[ 	]*\{vex\} vpmadd52huq %xmm0,%xmm0,%xmm0
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 fd b5 c0[ 	]*\{vex\} vpmadd52huq %ymm0,%ymm0,%ymm0
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 f9 b5 c0[ 	]*\{vex\} vpmadd52huq %xmm0,%xmm0,%xmm0
+[ 	]*[a-f0-9]+:[ 	]*62 f2 dd 08 b5 d2[ 	]*vpmadd52huq %xmm2,%xmm4,%xmm2
+[ 	]*[a-f0-9]+:[ 	]*62 f2 dd 28 b5 d2[ 	]*vpmadd52huq %ymm2,%ymm4,%ymm2
+#pass
diff --git a/gas/testsuite/gas/i386/avx-ifma.s b/gas/testsuite/gas/i386/avx-ifma.s
new file mode 100644
index 0000000..8104696
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx-ifma.s
@@ -0,0 +1,40 @@
+       .allow_index_reg
+
+.macro test_insn mnemonic
+       \mnemonic	%xmm2, %xmm4, %xmm2
+       {evex} \mnemonic %xmm2, %xmm4, %xmm2
+       {vex}  \mnemonic %xmm2, %xmm4, %xmm2
+       {vex}  \mnemonic (%ecx), %xmm4, %xmm2
+       \mnemonic	%ymm2, %ymm4, %ymm2
+       {evex} \mnemonic %ymm2, %ymm4, %ymm2
+       {vex}  \mnemonic %ymm2, %ymm4, %ymm2
+       {vex}  \mnemonic (%ecx), %ymm4, %ymm2
+.endm
+
+       .text
+_start:
+       test_insn vpmadd52huq
+       test_insn vpmadd52luq
+
+       .arch .noavx512vl
+
+       vpmadd52huq	  %zmm0, %zmm0, %zmm0
+       vpmadd52huq	  %ymm0, %ymm0, %ymm0
+       vpmadd52huq	  %xmm0, %xmm0, %xmm0
+
+       .arch default
+       .arch .noavx512ifma
+       
+       vpmadd52huq	  %ymm0, %ymm0, %ymm0
+       vpmadd52huq	  %xmm0, %xmm0, %xmm0
+
+       .arch default
+       .arch .noavx512f
+
+       vpmadd52huq	  %ymm0, %ymm0, %ymm0
+       vpmadd52huq	  %xmm0, %xmm0, %xmm0
+
+       .arch default
+       .arch .avx_ifma
+        vpmadd52huq       %xmm2, %xmm4, %xmm2
+        vpmadd52huq       %ymm2, %ymm4, %ymm2
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index 1b0bacb..1e6e796 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -474,6 +474,9 @@ if [gas_32_check] then {
     run_list_test "avx512_bf16_vl-inval"
     run_dump_test "avx-vnni"
     run_list_test "avx-vnni-inval"
+    run_dump_test "avx-ifma"
+    run_dump_test "avx-ifma-intel"
+    run_list_test "avx-ifma-inval"
     run_list_test "sg"
     run_dump_test "clzero"
     run_dump_test "invlpgb"
@@ -1142,6 +1145,9 @@ if [gas_64_check] then {
     run_dump_test "x86-64-amx-fp16"
     run_dump_test "x86-64-amx-fp16-intel"
     run_dump_test "x86-64-amx-fp16-bad"
+    run_dump_test "x86-64-avx-ifma"
+    run_dump_test "x86-64-avx-ifma-intel"
+    run_list_test "x86-64-avx-ifma-inval"
     run_dump_test "x86-64-clzero"
     run_dump_test "x86-64-mwaitx-bdver4"
     run_list_test "x86-64-mwaitx-reg"
diff --git a/gas/testsuite/gas/i386/noavx512-1.l b/gas/testsuite/gas/i386/noavx512-1.l
index 15a6fc6..a289b23 100644
--- a/gas/testsuite/gas/i386/noavx512-1.l
+++ b/gas/testsuite/gas/i386/noavx512-1.l
@@ -37,9 +37,9 @@
 .*:120: Error: .*not supported.*
 .*:121: Error: .*not supported.*
 .*:122: Error: .*not supported.*
-.*:126: Error: .*not supported.*
-.*:127: Error: .*not supported.*
-.*:128: Error: .*not supported.*
+.*:126: Error: .*operand .*
+.*:127: Error: .*unsupported .*
+.*:128: Error: .*unsupported .*
 .*:135: Error: .*operand size mismatch.*
 .*:136: Error: .*unsupported masking.*
 .*:137: Error: .*unsupported masking.*
@@ -50,9 +50,9 @@
 .*:142: Error: .*not supported.*
 .*:143: Error: .*not supported.*
 .*:144: Error: .*not supported.*
-.*:148: Error: .*not supported.*
-.*:149: Error: .*not supported.*
-.*:150: Error: .*not supported.*
+.*:148: Error: .*operand .*
+.*:149: Error: .*unsupported .*
+.*:150: Error: .*unsupported .*
 .*:151: Error: .*not supported.*
 .*:157: Error: .*operand size mismatch.*
 .*:158: Error: .*unsupported masking.*
@@ -64,9 +64,9 @@
 .*:164: Error: .*not supported.*
 .*:165: Error: .*not supported.*
 .*:166: Error: .*not supported.*
-.*:170: Error: .*not supported.*
-.*:171: Error: .*not supported.*
-.*:172: Error: .*not supported.*
+.*:170: Error: .*operand .*
+.*:171: Error: .*unsupported .*
+.*:172: Error: .*unsupported .*
 .*:173: Error: .*not supported.*
 .*:174: Error: .*not supported.*
 .*:175: Error: .*not supported.*
@@ -84,9 +84,9 @@
 .*:189: Error: .*bad register name.*
 .*:190: Error: .*unknown vector operation.*
 .*:191: Error: .*unknown vector operation.*
-.*:192: Error: .*not supported.*
-.*:193: Error: .*not supported.*
-.*:194: Error: .*not supported.*
+.*:192: Error: .*bad register name.*
+.*:193: Error: .*unknown vector operation.*
+.*:194: Error: .*unknown vector operation.*
 .*:195: Error: .*not supported.*
 .*:196: Error: .*not supported.*
 .*:197: Error: .*not supported.*
diff --git a/gas/testsuite/gas/i386/x86-64-avx-ifma-intel.d b/gas/testsuite/gas/i386/x86-64-avx-ifma-intel.d
new file mode 100644
index 0000000..0b3b053e
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx-ifma-intel.d
@@ -0,0 +1,34 @@
+#as:
+#objdump: -dw -Mintel
+#name: x86-64 AVX IFMA insns (Intel disassembly)
+#source: x86-64-avx-ifma.s
+
+.*: +file format .*
+
+
+Disassembly of section .text:
+
+0+ <_start>:
+[ 	]*[a-f0-9]+:[ 	]*62 d2 dd 08 b5 d4[ 	]*vpmadd52huq xmm2,xmm4,xmm12
+[ 	]*[a-f0-9]+:[ 	]*62 d2 dd 08 b5 d4[ 	]*vpmadd52huq xmm2,xmm4,xmm12
+[ 	]*[a-f0-9]+:[ 	]*c4 c2 d9 b5 d4[ 	]*\{vex\} vpmadd52huq xmm2,xmm4,xmm12
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 d9 b5 11[ 	]*\{vex\} vpmadd52huq xmm2,xmm4,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:[ 	]*62 b2 dd 08 b5 d6[ 	]*vpmadd52huq xmm2,xmm4,xmm22
+[ 	]*[a-f0-9]+:[ 	]*62 d2 dd 28 b5 d4[ 	]*vpmadd52huq ymm2,ymm4,ymm12
+[ 	]*[a-f0-9]+:[ 	]*62 d2 dd 28 b5 d4[ 	]*vpmadd52huq ymm2,ymm4,ymm12
+[ 	]*[a-f0-9]+:[ 	]*c4 c2 dd b5 d4[ 	]*\{vex\} vpmadd52huq ymm2,ymm4,ymm12
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 dd b5 11[ 	]*\{vex\} vpmadd52huq ymm2,ymm4,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:[ 	]*62 b2 dd 28 b5 d6[ 	]*vpmadd52huq ymm2,ymm4,ymm22
+[ 	]*[a-f0-9]+:[ 	]*62 d2 dd 08 b4 d4[ 	]*vpmadd52luq xmm2,xmm4,xmm12
+[ 	]*[a-f0-9]+:[ 	]*62 d2 dd 08 b4 d4[ 	]*vpmadd52luq xmm2,xmm4,xmm12
+[ 	]*[a-f0-9]+:[ 	]*c4 c2 d9 b4 d4[ 	]*\{vex\} vpmadd52luq xmm2,xmm4,xmm12
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 d9 b4 11[ 	]*\{vex\} vpmadd52luq xmm2,xmm4,XMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:[ 	]*62 b2 dd 08 b4 d6[ 	]*vpmadd52luq xmm2,xmm4,xmm22
+[ 	]*[a-f0-9]+:[ 	]*62 d2 dd 28 b4 d4[ 	]*vpmadd52luq ymm2,ymm4,ymm12
+[ 	]*[a-f0-9]+:[ 	]*62 d2 dd 28 b4 d4[ 	]*vpmadd52luq ymm2,ymm4,ymm12
+[ 	]*[a-f0-9]+:[ 	]*c4 c2 dd b4 d4[ 	]*\{vex\} vpmadd52luq ymm2,ymm4,ymm12
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 dd b4 11[ 	]*\{vex\} vpmadd52luq ymm2,ymm4,YMMWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:[ 	]*62 b2 dd 28 b4 d6[ 	]*vpmadd52luq ymm2,ymm4,ymm22
+[ 	]*[a-f0-9]+:[ 	]*62 d2 dd 08 b5 d4[ 	]*vpmadd52huq xmm2,xmm4,xmm12
+[ 	]*[a-f0-9]+:[ 	]*62 d2 dd 28 b5 d4[ 	]*vpmadd52huq ymm2,ymm4,ymm12
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-avx-ifma-inval.l b/gas/testsuite/gas/i386/x86-64-avx-ifma-inval.l
new file mode 100644
index 0000000..fad43f6
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx-ifma-inval.l
@@ -0,0 +1,4 @@
+.* Assembler messages:
+.*:6: Error: unsupported .* `vpmadd52huq'
+.*:7: Error: unsupported .* `vpmadd52huq'
+.*:8: Error: operand .* `vpmadd52huq'
diff --git a/gas/testsuite/gas/i386/x86-64-avx-ifma-inval.s b/gas/testsuite/gas/i386/x86-64-avx-ifma-inval.s
new file mode 100644
index 0000000..76da0f1
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx-ifma-inval.s
@@ -0,0 +1,8 @@
+# Check illegal in AVXIFMA instructions
+
+	.text
+	.arch .noavx512ifma
+_start:
+	vpmadd52huq %xmm2, %xmm4, %xmm2{%k6}
+	vpmadd52huq %xmm22, %xmm4, %xmm2{%k1}
+	vpmadd52huq %zmm2, %zmm4, %zmm2
diff --git a/gas/testsuite/gas/i386/x86-64-avx-ifma.d b/gas/testsuite/gas/i386/x86-64-avx-ifma.d
new file mode 100644
index 0000000..b1670b6
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx-ifma.d
@@ -0,0 +1,34 @@
+#as:
+#objdump: -dw
+#name: x86-64 AVX IFMA insns
+#source: x86-64-avx-ifma.s
+
+.*: +file format .*
+
+
+Disassembly of section .text:
+
+0+ <_start>:
+[ 	]*[a-f0-9]+:[ 	]*62 d2 dd 08 b5 d4[ 	]*vpmadd52huq %xmm12,%xmm4,%xmm2
+[ 	]*[a-f0-9]+:[ 	]*62 d2 dd 08 b5 d4[ 	]*vpmadd52huq %xmm12,%xmm4,%xmm2
+[ 	]*[a-f0-9]+:[ 	]*c4 c2 d9 b5 d4[ 	]*\{vex\} vpmadd52huq %xmm12,%xmm4,%xmm2
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 d9 b5 11[ 	]*\{vex\} vpmadd52huq \(%rcx\),%xmm4,%xmm2
+[ 	]*[a-f0-9]+:[ 	]*62 b2 dd 08 b5 d6[ 	]*vpmadd52huq %xmm22,%xmm4,%xmm2
+[ 	]*[a-f0-9]+:[ 	]*62 d2 dd 28 b5 d4[ 	]*vpmadd52huq %ymm12,%ymm4,%ymm2
+[ 	]*[a-f0-9]+:[ 	]*62 d2 dd 28 b5 d4[ 	]*vpmadd52huq %ymm12,%ymm4,%ymm2
+[ 	]*[a-f0-9]+:[ 	]*c4 c2 dd b5 d4[ 	]*\{vex\} vpmadd52huq %ymm12,%ymm4,%ymm2
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 dd b5 11[ 	]*\{vex\} vpmadd52huq \(%rcx\),%ymm4,%ymm2
+[ 	]*[a-f0-9]+:[ 	]*62 b2 dd 28 b5 d6[ 	]*vpmadd52huq %ymm22,%ymm4,%ymm2
+[ 	]*[a-f0-9]+:[ 	]*62 d2 dd 08 b4 d4[ 	]*vpmadd52luq %xmm12,%xmm4,%xmm2
+[ 	]*[a-f0-9]+:[ 	]*62 d2 dd 08 b4 d4[ 	]*vpmadd52luq %xmm12,%xmm4,%xmm2
+[ 	]*[a-f0-9]+:[ 	]*c4 c2 d9 b4 d4[ 	]*\{vex\} vpmadd52luq %xmm12,%xmm4,%xmm2
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 d9 b4 11[ 	]*\{vex\} vpmadd52luq \(%rcx\),%xmm4,%xmm2
+[ 	]*[a-f0-9]+:[ 	]*62 b2 dd 08 b4 d6[ 	]*vpmadd52luq %xmm22,%xmm4,%xmm2
+[ 	]*[a-f0-9]+:[ 	]*62 d2 dd 28 b4 d4[ 	]*vpmadd52luq %ymm12,%ymm4,%ymm2
+[ 	]*[a-f0-9]+:[ 	]*62 d2 dd 28 b4 d4[ 	]*vpmadd52luq %ymm12,%ymm4,%ymm2
+[ 	]*[a-f0-9]+:[ 	]*c4 c2 dd b4 d4[ 	]*\{vex\} vpmadd52luq %ymm12,%ymm4,%ymm2
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 dd b4 11[ 	]*\{vex\} vpmadd52luq \(%rcx\),%ymm4,%ymm2
+[ 	]*[a-f0-9]+:[ 	]*62 b2 dd 28 b4 d6[ 	]*vpmadd52luq %ymm22,%ymm4,%ymm2
+[ 	]*[a-f0-9]+:[ 	]*62 d2 dd 08 b5 d4[ 	]*vpmadd52huq %xmm12,%xmm4,%xmm2
+[ 	]*[a-f0-9]+:[ 	]*62 d2 dd 28 b5 d4[ 	]*vpmadd52huq %ymm12,%ymm4,%ymm2
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-avx-ifma.s b/gas/testsuite/gas/i386/x86-64-avx-ifma.s
new file mode 100644
index 0000000..bfc524a
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx-ifma.s
@@ -0,0 +1,23 @@
+       .allow_index_reg
+
+.macro test_insn mnemonic
+       \mnemonic	%xmm12, %xmm4, %xmm2
+       {evex} \mnemonic %xmm12, %xmm4, %xmm2
+       {vex}  \mnemonic %xmm12, %xmm4, %xmm2
+       {vex}  \mnemonic (%rcx), %xmm4, %xmm2
+       \mnemonic	%xmm22, %xmm4, %xmm2
+       \mnemonic	%ymm12, %ymm4, %ymm2
+       {evex} \mnemonic %ymm12, %ymm4, %ymm2
+       {vex}  \mnemonic %ymm12, %ymm4, %ymm2
+       {vex}  \mnemonic (%rcx), %ymm4, %ymm2
+       \mnemonic	%ymm22, %ymm4, %ymm2
+.endm
+
+       .text
+_start:
+       test_insn vpmadd52huq
+       test_insn vpmadd52luq
+
+       .arch .avx_ifma
+        vpmadd52huq       %xmm12, %xmm4, %xmm2
+        vpmadd52huq       %ymm12, %ymm4, %ymm2