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authorMatthew Fortune <matthew.fortune@imgtec.com>2014-07-29 11:27:59 +0100
committerMatthew Fortune <matthew.fortune@imgtec.com>2014-07-29 11:27:59 +0100
commit351cdf24d223290b15fa991e5052ec9e9bd1e284 (patch)
treede4c8ba7c7c1f74323befdb6fca0873a4da678d5 /gas
parent7e09a22367934a6d53f79d8b01135832b80ab246 (diff)
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[MIPS] Implement O32 FPXX, FP64 and FP64A ABI extensions
Specification: https://dmz-portal.mips.com/wiki/MIPS_O32_ABI_-_FR0_and_FR1_Interlinking include/ * elf/mips.h (PT_MIPS_ABIFLAGS, SHT_MIPS_ABIFLAGS): Define. (Val_GNU_MIPS_ABI_FP_OLD_64): Rename from Val_GNU_MIPS_ABI_FP_64. (Val_GNU_MIPS_ABI_FP_64): Redefine. (Val_GNU_MIPS_ABI_FP_XX): Define. (Elf_External_ABIFlags_v0, Elf_Internal_ABIFlags_v0): New structures. (AFL_REG_NONE, AFL_REG_32, AFL_REG_64, AFL_REG_128): Define. (AFL_ASE_DSP, AFL_ASE_DSPR2, AFL_ASE_EVA, AFL_ASE_MCU): Likewise. (AFL_ASE_MDMX, AFL_ASE_MIPS3D, AFL_ASE_MT, AFL_ASE_SMARTMIPS): Likewise. (AFL_ASE_VIRT, AFL_ASE_MSA, AFL_ASE_MIPS16): Likewise. (AFL_ASE_MICROMIPS, AFL_ASE_XPA): Likewise. (AFL_EXT_XLR, AFL_EXT_OCTEON2, AFL_EXT_OCTEONP): Likewise. (AFL_EXT_LOONGSON_3A, AFL_EXT_OCTEON, AFL_EXT_5900): Likewise. (AFL_EXT_4650, AFL_EXT_4010, AFL_EXT_4100, AFL_EXT_3900): Likewise. (AFL_EXT_10000, AFL_EXT_SB1, AFL_EXT_4111, AFL_EXT_4120): Likewise. (AFL_EXT_5400, AFL_EXT_5500, AFL_EXT_LOONGSON_2E): Likewise. (AFL_EXT_LOONGSON_2F): Likewise. (bfd_mips_elf_swap_abiflags_v0_in): Prototype. (bfd_mips_elf_swap_abiflags_v0_out): Likewise. (bfd_mips_isa_ext): Likewise. bfd/ * elfxx-mips.c (ABI_O32_P, MIPS_ELF_ABIFLAGS_SECTION_NAME_P): New macro. (mips_elf_obj_tdata): Add abiflags and abiflags_valid fields. (bfd_mips_elf_swap_abiflags_v0_in): New function. (bfd_mips_elf_swap_abiflags_v0_out): Likewise. (_bfd_mips_elf_section_from_shdr): Handle SHT_MIPS_ABIFLAGS. (_bfd_mips_elf_fake_sections): Likewise. (_bfd_mips_elf_always_size_sections): Handle .MIPS.abiflags. (_bfd_mips_elf_additional_program_headers): Account for new PT_MIPS_ABIFLAGS program header. (_bfd_mips_elf_modify_segment_map): Create PT_MIPS_ABIFLAGS segment and associate with .MIPS.abiflags. (_bfd_mips_elf_gc_mark_extra_sections): New function. (bfd_mips_isa_ext, update_mips_abiflags_isa): New static function. (infer_mips_abiflags): Likewise. (_bfd_mips_elf_final_link): Handle .MIPS.abiflags. (mips_32bit_flags_p): Moved higher. (mips_elf_merge_obj_attributes, _bfd_mips_fp_abi_string): Error checking for FP ABIs. (_bfd_mips_elf_merge_private_bfd_data): Restructure and add abiflags checks. Check EF_MIPS_FP64 flag consistency. (print_mips_ases, print_mips_isa_ext): New static function. (print_mips_fp_abi_value, get_mips_reg_size): Likewise. (_bfd_mips_elf_print_private_bfd_data): Display abiflags data. (_bfd_mips_post_process_headers): Set EI_ABIVERSION = 3 for Val_GNU_MIPS_ABI_FP_64 or Val_GNU_MIPS_ABI_FP_64A. * elfxx-mips.h (_bfd_mips_elf_gc_mark_extra_sections): New prototype. * elf32-mips.c (elf_backend_gc_mark_extra_sections): Implement. * elfn32-mips.c (elf_backend_gc_mark_extra_sections): Implement. * elf64-mips.c (elf_backend_gc_mark_extra_sections): Implement. binutils/ * readelf.c (get_mips_segment_type): Display name for PT_MIPS_ABIFLAGS. (get_mips_section_type_name): Display name for SHT_MIPS_ABIFLAGS. (display_mips_gnu_attribute): Abstracted fp abi printing to... (print_mips_fp_abi_value): New static function. Handle new FP ABIs. (print_mips_ases, print_mips_isa_ext): New static functions. (get_mips_reg_size): Likewise. (process_mips_specific): Display abiflags data. elfcpp/ * elfcpp.h (PT_MIPS_ABIFLAGS): New program header type. gas/ * config/tc-mips.c (mips_flags_frag): New static global. (struct mips_set_options): Add oddspreg field. (file_mips_opts, mips_opts): Initialize oddspreg. (ISA_HAS_ODD_SINGLE_FPR): Add CPU argument and update for R5900 and Loongson-3a. (enum options, md_longopts, md_parse_option): Add -mfpxx, -modd-spreg and -mno-odd-spreg options. (md_begin): Create .MIPS.abiflags section. (fpabi_incompatible_with, fpabi_requires): New static function. (check_fpabi): Likewise. (mips_check_options): Handle fp=xx and oddspreg restrictions. (file_mips_check_options): Set oddspreg by default for fp=xx. (mips_oddfpreg_ok): Re-write function. (check_regno): Check odd numbered registers regardless of FPR size. For fp != 32 use as_bad instead of as_warn. (match_float_constant): Rewrite check regarding FP register width. Add support for generating constants when MXHC1 is present. Handle fp=xx to comply with the ABI. (macro): Update M_LI_DD similarly to match_float_constant. Generate MTHC1 when available. Check that correct code can be generated for fp=xx and fp=64 ABIs. (parse_code_option, s_mipsset): Add fp=xx, oddspreg and nooddspreg options. (mips_convert_ase_flags): New static function. (mips_elf_final_processing): Use fpabi == Val_GNU_MIPS_ABI_FP_OLD_64 to determine when to add the EF_MIPS_FP64 flag. Populate the .MIPS.abiflags section. (md_mips_end): Update .gnu_attribute based on command line and .module as applicable. Use check_fpabi to ensure .gnu.attribute and command line/.module options are consistent. * doc/as.texinfo: Add missing -mgp64/-mfp64 options and document new -mfpxx, -modd-spreg and -mno-odd-spreg options. * doc/c-mips.texi: Document -mfpxx, -modd-spreg, -mno-odd-spreg, gnu_attribute values and FP ABIs. ld/ * emulparams/elf32bmip.sh: Add .MIPS.abiflags. * emulparams/elf32bmipn32-defs.sh: Likewise. * emulparams/elf64bmip-defs.sh: Likewise. opcodes/ * micromips-opc.c (COD, LCD) New macros. (cfc1, ctc1): Remove FP_S attribute. (dmfc1, mfc1, mfhc1): Add LCD attribute. (dmtc1, mtc1, mthc1): Add COD attribute. * mips-opc.c (cfc1, cftc1, ctc, cttc1): Remove FP_S attribute. binutils/testsuite/ * binutils-all/readelf.s: Account for .MIPS.abiflags and .gnu.attributes. * binutils-all/readelf.ss-tmips: Likewise. * binutils-all/strip-3.d: Likewise. gas/testsuite/ * gas/mips/attr-gnu-4-0.d: New. * gas/mips/attr-gnu-4-0.s: Likewise. * gas/mips/attr-gnu-4-1-mfp32.l: Likewise. * gas/mips/attr-gnu-4-1-mfp32.s: Likewise. * gas/mips/attr-gnu-4-1-mfp64.l: Likewise. * gas/mips/attr-gnu-4-1-mfp64.s: Likewise. * gas/mips/attr-gnu-4-1-mfpxx.s: Likewise. * gas/mips/attr-gnu-4-1-msingle-float.l: Likewise. * gas/mips/attr-gnu-4-1-msingle-float.s: Likewise. * gas/mips/attr-gnu-4-1-msoft-float.l: Likewise. * gas/mips/attr-gnu-4-1-msoft-float.s: Likewise. * gas/mips/attr-gnu-4-1.d: Likewise. * gas/mips/attr-gnu-4-1.s: Likewise. * gas/mips/attr-gnu-4-2-mdouble-float.l: Likewise. * gas/mips/attr-gnu-4-2-mdouble-float.s: Likewise. * gas/mips/attr-gnu-4-2-msoft-float.l: Likewise. * gas/mips/attr-gnu-4-2-msoft-float.s: Likewise. * gas/mips/attr-gnu-4-2.d: Likewise. * gas/mips/attr-gnu-4-2.s: Likewise. * gas/mips/attr-gnu-4-3-mhard-float.l: Likewise. * gas/mips/attr-gnu-4-3-mhard-float.s: Likewise. * gas/mips/attr-gnu-4-3.d: Likewise. * gas/mips/attr-gnu-4-3.s: Likewise. * gas/mips/attr-gnu-4-4.l: Likewise. * gas/mips/attr-gnu-4-4.s: Likewise. * gas/mips/attr-gnu-4-5-64.l: Likewise. * gas/mips/attr-gnu-4-5-64.s: Likewise. * gas/mips/attr-gnu-4-5.d: Likewise. * gas/mips/attr-gnu-4-5.l: Likewise. * gas/mips/attr-gnu-4-5.s: Likewise. * gas/mips/attr-gnu-4-6-64.l: Likewise. * gas/mips/attr-gnu-4-6-64.s: Likewise. * gas/mips/attr-gnu-4-6.d: Likewise. * gas/mips/attr-gnu-4-6.l: Likewise. * gas/mips/attr-gnu-4-6.s: Likewise. * gas/mips/attr-gnu-4-6-msingle-float.l: Likewise. * gas/mips/attr-gnu-4-6-msingle-float.s: Likewise. * gas/mips/attr-gnu-4-6-msoft-float.l: Likewise. * gas/mips/attr-gnu-4-6-msoft-float.s: Likewise. * gas/mips/attr-gnu-4-6-noodd.l: Likewise. * gas/mips/attr-gnu-4-6-noodd.s: Likewise. * gas/mips/attr-gnu-4-7-64.l: Likewise. * gas/mips/attr-gnu-4-7-64.s: Likewise. * gas/mips/attr-gnu-4-7-msingle-float.l: Likewise. * gas/mips/attr-gnu-4-7-msingle-float.s: Likewise. * gas/mips/attr-gnu-4-7-msoft-float.l: Likewise. * gas/mips/attr-gnu-4-7-msoft-float.s: Likewise. * gas/mips/attr-gnu-4-7-odd.l: Likewise. * gas/mips/attr-gnu-4-7-odd.s: Likewise. * gas/mips/attr-gnu-4-7.d: Likewise. * gas/mips/attr-gnu-4-7.l: Likewise. * gas/mips/attr-gnu-4-7.s: Likewise. * gas/mips/attr-none-double.d: Likewise. * gas/mips/attr-none-o32-fp64.d: Likewise. * gas/mips/attr-none-o32-fp64-nooddspreg.d * gas/mips/attr-none-o32-fpxx.d: Likewise. * gas/mips/attr-none-single-float.d: Likewise. * gas/mips/attr-none-soft-float.d: Likewise. * gas/mips/elf_arch_mips32r3.d: Likewise. * gas/mips/elf_arch_mips32r5.d: Likewise. * gas/mips/elf_arch_mips64r3.d: Likewise. * gas/mips/elf_arch_mips64r5.d: Likewise. * gas/mips/li-d.d: Likewise. * gas/mips/li-d.s: Likewise. * gas/mips/module-check-warn.l: Likewise. * gas/mips/module-check-warn.s: Likewise. * gas/mips/module-check.d: Likewise. * gas/mips/module-check.s: Likewise. * gas/mips/module-mfp32.d: Likewise. * gas/mips/module-mfp32.s: Likewise. * gas/mips/module-mfp64.d: Likewise. * gas/mips/module-mfp64.s: Likewise. * gas/mips/module-mfp64-noodd.d: Likewise. * gas/mips/module-mfp64-noodd.s: Likewise. * gas/mips/module-mfpxx.d: Likewise. * gas/mips/module-mfpxx.s: Likewise. * gas/mips/module-msingle-float.d: Likewise. * gas/mips/module-msingle-float.s: Likewise. * gas/mips/module-msoft-float.d: Likewise. * gas/mips/module-msoft-float.s: Likewise. * gas/mips/module-set-mfpxx.d: Likewise. * gas/mips/module-set-mfpxx.s: Likewise. * gas/mips/fpxx-oddfpreg.d: Likewise. * gas/mips/fpxx-oddfpreg.l: Likewise. * gas/mips/fpxx-oddfpreg.s: Likewise. * gas/mips/no-odd-spreg.d: Likewise. * gas/mips/odd-spreg.d: Likewise. * gas/elf/section2.e-mips: Adjust expected output. * gas/mips/attr-gnu-abi-fp-1.d: Likewise. * gas/mips/attr-gnu-abi-msa-1.d: Likewise. * gas/mips/call-nonpic-1.d: Likewise. * gas/mips/elf_arch_mips1.d: Likewise. * gas/mips/elf_arch_mips2.d: Likewise. * gas/mips/elf_arch_mips3.d: Likewise. * gas/mips/elf_arch_mips32.d: Likewise. * gas/mips/elf_arch_mips32r2.d: Likewise. * gas/mips/elf_arch_mips4.d: Likewise. * gas/mips/elf_arch_mips5.d: Likewise. * gas/mips/elf_arch_mips64.d: Likewise. * gas/mips/elf_arch_mips64r2.d: Likewise. * gas/mips/elf_ase_micromips-2.d: Likewise. * gas/mips/elf_ase_micromips.d: Likewise. * gas/mips/elf_ase_mips16-2.d: Likewise. * gas/mips/elf_ase_mips16.d: Likewise. * gas/mips/module-defer-warn1.d: Likewise. * gas/mips/module-override.d: Likewise. * gas/mips/n32-consec.d: Likewise. * gas/mips/nan-2008-1.d: Likewise. * gas/mips/nan-2008-2.d: Likewise. * gas/mips/nan-2008-3.d: Likewise. * gas/mips/nan-2008-4.d: Likewise. * gas/mips/nan-legacy-1.d: Likewise. * gas/mips/nan-legacy-2.d: Likewise. * gas/mips/nan-legacy-3.d: Likewise. * gas/mips/nan-legacy-4.d: Likewise. * gas/mips/nan-legacy-5.d: Likewise. * gas/mips/tmips16-e.d: Likewise. * gas/mips/tmips16-f.d: Likewise. * gas/mips/tmipsel16-e.d: Likewise. * gas/mips/tmipsel16-f.d: Likewise. * gas/testsuite/gas/mips/mips.exp: Add new tests. ld/testsuite/ * ld-mips-elf/abiflags-strip1-ph.d: New. * ld-mips-elf/abiflags-strip2-ph.d: Likewise. * ld-mips-elf/abiflags-strip3-ph.d: Likewise. * ld-mips-elf/abiflags-strip4-ph.d: Likewise. * ld-mips-elf/abiflags-strip5-ph.d: Likewise. * ld-mips-elf/abiflags-strip6-ph.d: Likewise. * ld-mips-elf/abiflags-strip7-ph.d: Likewise. * ld-mips-elf/abiflags-strip8-ph.d: Likewise. * ld-mips-elf/abiflags-strip9-ph.d: Likewise. * ld-mips-elf/attr-gnu-4-0-n32-ph.d: Likewise. * ld-mips-elf/attr-gnu-4-0-n64-ph.d: Likewise. * ld-mips-elf/attr-gnu-4-0-ph.d: Likewise. * ld-mips-elf/attr-gnu-4-06.d: Likewise. * ld-mips-elf/attr-gnu-4-07.d: Likewise. * ld-mips-elf/attr-gnu-4-08.d: Likewise. * ld-mips-elf/attr-gnu-4-1-n32-ph.d: Likewise. * ld-mips-elf/attr-gnu-4-1-n64-ph.d: Likewise. * ld-mips-elf/attr-gnu-4-1-ph.d: Likewise. * ld-mips-elf/attr-gnu-4-16.d: Likewise. * ld-mips-elf/attr-gnu-4-17.d: Likewise. * ld-mips-elf/attr-gnu-4-18.d: Likewise. * ld-mips-elf/attr-gnu-4-2-n32-ph.d: Likewise. * ld-mips-elf/attr-gnu-4-2-n64-ph.d: Likewise. * ld-mips-elf/attr-gnu-4-2-ph.d: Likewise. * ld-mips-elf/attr-gnu-4-26.d: Likewise. * ld-mips-elf/attr-gnu-4-27.d: Likewise. * ld-mips-elf/attr-gnu-4-28.d: Likewise. * ld-mips-elf/attr-gnu-4-3-n32-ph.d: Likewise. * ld-mips-elf/attr-gnu-4-3-n64-ph.d: Likewise. * ld-mips-elf/attr-gnu-4-3-ph.d: Likewise. * ld-mips-elf/attr-gnu-4-36.d: Likewise. * ld-mips-elf/attr-gnu-4-37.d: Likewise. * ld-mips-elf/attr-gnu-4-38.d: Likewise. * ld-mips-elf/attr-gnu-4-4-ph.d: Likewise. * ld-mips-elf/attr-gnu-4-46.d: Likewise. * ld-mips-elf/attr-gnu-4-47.d: Likewise. * ld-mips-elf/attr-gnu-4-48.d: Likewise. * ld-mips-elf/attr-gnu-4-5-ph.d: Likewise. * ld-mips-elf/attr-gnu-4-50.d: Likewise. * ld-mips-elf/attr-gnu-4-52.d: Likewise. * ld-mips-elf/attr-gnu-4-53.d: Likewise. * ld-mips-elf/attr-gnu-4-54.d: Likewise. * ld-mips-elf/attr-gnu-4-55.d: Likewise. * ld-mips-elf/attr-gnu-4-56.d: Likewise. * ld-mips-elf/attr-gnu-4-57.d: Likewise. * ld-mips-elf/attr-gnu-4-58.d: Likewise. * ld-mips-elf/attr-gnu-4-6-ph.d: Likewise. * ld-mips-elf/attr-gnu-4-6.s: Likewise. * ld-mips-elf/attr-gnu-4-60.d: Likewise. * ld-mips-elf/attr-gnu-4-61.d: Likewise. * ld-mips-elf/attr-gnu-4-62.d: Likewise. * ld-mips-elf/attr-gnu-4-63.d: Likewise. * ld-mips-elf/attr-gnu-4-64.d: Likewise. * ld-mips-elf/attr-gnu-4-65.d: Likewise. * ld-mips-elf/attr-gnu-4-66.d: Likewise. * ld-mips-elf/attr-gnu-4-67.d: Likewise. * ld-mips-elf/attr-gnu-4-68.d: Likewise. * ld-mips-elf/attr-gnu-4-7-ph.d: Likewise. * ld-mips-elf/attr-gnu-4-7.s: Likewise. * ld-mips-elf/attr-gnu-4-70.d: Likewise. * ld-mips-elf/attr-gnu-4-71.d: Likewise. * ld-mips-elf/attr-gnu-4-72.d: Likewise. * ld-mips-elf/attr-gnu-4-73.d: Likewise. * ld-mips-elf/attr-gnu-4-74.d: Likewise. * ld-mips-elf/attr-gnu-4-75.d: Likewise. * ld-mips-elf/attr-gnu-4-76.d: Likewise. * ld-mips-elf/attr-gnu-4-77.d: Likewise. * ld-mips-elf/attr-gnu-4-78.d: Likewise. * ld-mips-elf/attr-gnu-4-8.s: Likewise. * ld-mips-elf/attr-gnu-4-81.d: Likewise. * ld-mips-elf/empty.s: Likewise. * ld-mips-elf/attr-gnu-4-00.d: Adjust expected output. * ld-mips-elf/attr-gnu-4-01.d: Likewise. * ld-mips-elf/attr-gnu-4-02.d: Likewise. * ld-mips-elf/attr-gnu-4-03.d: Likewise. * ld-mips-elf/attr-gnu-4-04.d: Likewise. * ld-mips-elf/attr-gnu-4-05.d: Likewise. * ld-mips-elf/attr-gnu-4-10.d: Likewise. * ld-mips-elf/attr-gnu-4-11.d: Likewise. * ld-mips-elf/attr-gnu-4-14.d: Likewise. * ld-mips-elf/attr-gnu-4-15.d: Likewise. * ld-mips-elf/attr-gnu-4-2.s: Likewise. * ld-mips-elf/attr-gnu-4-20.d: Likewise. * ld-mips-elf/attr-gnu-4-22.d: Likewise. * ld-mips-elf/attr-gnu-4-24.d: Likewise. * ld-mips-elf/attr-gnu-4-25.d: Likewise. * ld-mips-elf/attr-gnu-4-3.s: Likewise. * ld-mips-elf/attr-gnu-4-30.d: Likewise. * ld-mips-elf/attr-gnu-4-33.d: Likewise. * ld-mips-elf/attr-gnu-4-34.d: Likewise. * ld-mips-elf/attr-gnu-4-35.d: Likewise. * ld-mips-elf/attr-gnu-4-40.d: Likewise. * ld-mips-elf/attr-gnu-4-41.d: Likewise. * ld-mips-elf/attr-gnu-4-42.d: Likewise. * ld-mips-elf/attr-gnu-4-43.d: Likewise. * ld-mips-elf/attr-gnu-4-44.d: Likewise. * ld-mips-elf/attr-gnu-4-45.d: Likewise. * ld-mips-elf/attr-gnu-4-5.s: Likewise. * ld-mips-elf/attr-gnu-4-51.d: Likewise. * ld-mips-elf/attr-gnu-8-00.d: Likewise. * ld-mips-elf/attr-gnu-8-01.d: Likewise. * ld-mips-elf/attr-gnu-8-02.d: Likewise. * ld-mips-elf/attr-gnu-8-10.d: Likewise. * ld-mips-elf/attr-gnu-8-11.d: Likewise. * ld-mips-elf/attr-gnu-8-20.d: Likewise. * ld-mips-elf/attr-gnu-8-22.d: Likewise. * ld-mips-elf/jalx-2.dd: Likewise. * ld-mips-elf/mips16-pic-1.gd: Likewise. * ld-mips-elf/mips16-pic-2.gd: Likewise. * ld-mips-elf/mips16-pic-3.gd: Likewise. * ld-mips-elf/mips16-pic-4a.gd: Likewise. * ld-mips-elf/multi-got-no-shared.d: Likewise. * ld-mips-elf/nan-2008.d: Likewise. * ld-mips-elf/nan-legacy.d: Rework test. * ld-mips-elf/pic-and-nonpic-3a.gd: Likewise. * ld-mips-elf/pic-and-nonpic-3b.gd: Likewise. * ld-mips-elf/pic-and-nonpic-5b.gd: Likewise. * ld-mips-elf/pic-and-nonpic-6.ld: Likewise. * ld-mips-elf/rel32-n32.d: Likewise. * ld-mips-elf/rel32-o32.d: Likewise. * ld-mips-elf/rel64.d: Likewise. * ld-mips-elf/tls-multi-got-1.r: Likewise. * ld-elf/group.ld: Discard .MIPS.abiflags and .gnu.attributes. * ld-elf/orphan-region.ld: Likewise. * ld-elf/orphan.ld: Likewise. * ld-mips-elf/compressed-plt-1.ld: Likewise. * ld-mips-elf/dyn-sec64.ld: Likewise. * ld-mips-elf/got-dump-1.ld: Likewise. * ld-mips-elf/got-dump-2.ld: Likewise. * ld-mips-elf/got-page-1.ld: Likewise. * ld-mips-elf/mips-dyn.ld: Likewise. * ld-mips-elf/mips-lib.ld: Likewise. * ld-mips-elf/pic-and-nonpic-3a.ld: Likewise. * ld-mips-elf/pic-and-nonpic-3b.ld: Likewise. * ld-mips-elf/pic-and-nonpic-4b.ld: Likewise. * ld-mips-elf/pic-and-nonpic-5b.ld: Likewise. * ld-mips-elf/region1.t: Likewise. * ld-mips-elf/stub-dynsym-1.ld: Likewise. * ld-mips-elf/tls-hidden3.ld: Likewise. * ld-mips-elf/vxworks1.ld: Likewise. * ld-scripts/overlay-size.t: Likewise. * ld-mips-elf/elf-rel-got-n32-embed.d: Remove .MIPS.abiflags from objects. * ld-mips-elf/elf-rel-got-n32.d: Likewise. * ld-mips-elf/elf-rel-got-n64-embed.d: Likewise. * ld-mips-elf/elf-rel-got-n64-linux.d: Likewise. * ld-mips-elf/elf-rel-got-n64.d: Likewise. * ld-mips-elf/elf-rel-xgot-n32.d: Likewise. * ld-mips-elf/elf-rel-xgot-n32-embed.d: Likewise. * ld-mips-elf/elf-rel-xgot-n64.d: Likewise. * ld-mips-elf/elf-rel-xgot-n64-linux.d: Likewise. * ld-mips-elf/elf-rel-xgot-n64-embed.d: Likewise. * ld-mips-elf/mips-elf.exp: Add new tests.
Diffstat (limited to 'gas')
-rw-r--r--gas/ChangeLog37
-rw-r--r--gas/config/tc-mips.c436
-rw-r--r--gas/doc/as.texinfo21
-rw-r--r--gas/doc/c-mips.texi126
-rw-r--r--gas/testsuite/ChangeLog124
-rw-r--r--gas/testsuite/gas/elf/section2.e-mips8
-rw-r--r--gas/testsuite/gas/mips/attr-gnu-4-0.d17
-rw-r--r--gas/testsuite/gas/mips/attr-gnu-4-0.s1
-rw-r--r--gas/testsuite/gas/mips/attr-gnu-4-1-mfp32.l3
-rw-r--r--gas/testsuite/gas/mips/attr-gnu-4-1-mfp32.s1
-rw-r--r--gas/testsuite/gas/mips/attr-gnu-4-1-mfp64.l2
-rw-r--r--gas/testsuite/gas/mips/attr-gnu-4-1-mfp64.s1
-rw-r--r--gas/testsuite/gas/mips/attr-gnu-4-1-mfpxx.s1
-rw-r--r--gas/testsuite/gas/mips/attr-gnu-4-1-msingle-float.l2
-rw-r--r--gas/testsuite/gas/mips/attr-gnu-4-1-msingle-float.s1
-rw-r--r--gas/testsuite/gas/mips/attr-gnu-4-1-msoft-float.l2
-rw-r--r--gas/testsuite/gas/mips/attr-gnu-4-1-msoft-float.s1
-rw-r--r--gas/testsuite/gas/mips/attr-gnu-4-1.d22
-rw-r--r--gas/testsuite/gas/mips/attr-gnu-4-1.s1
-rw-r--r--gas/testsuite/gas/mips/attr-gnu-4-2-mdouble-float.l2
-rw-r--r--gas/testsuite/gas/mips/attr-gnu-4-2-mdouble-float.s1
-rw-r--r--gas/testsuite/gas/mips/attr-gnu-4-2-msoft-float.l2
-rw-r--r--gas/testsuite/gas/mips/attr-gnu-4-2-msoft-float.s1
-rw-r--r--gas/testsuite/gas/mips/attr-gnu-4-2.d23
-rw-r--r--gas/testsuite/gas/mips/attr-gnu-4-2.s1
-rw-r--r--gas/testsuite/gas/mips/attr-gnu-4-3-mhard-float.l2
-rw-r--r--gas/testsuite/gas/mips/attr-gnu-4-3-mhard-float.s1
-rw-r--r--gas/testsuite/gas/mips/attr-gnu-4-3.d23
-rw-r--r--gas/testsuite/gas/mips/attr-gnu-4-3.s1
-rw-r--r--gas/testsuite/gas/mips/attr-gnu-4-4.l2
-rw-r--r--gas/testsuite/gas/mips/attr-gnu-4-4.s1
-rw-r--r--gas/testsuite/gas/mips/attr-gnu-4-5-64.l2
-rw-r--r--gas/testsuite/gas/mips/attr-gnu-4-5-64.s1
-rw-r--r--gas/testsuite/gas/mips/attr-gnu-4-5.d23
-rw-r--r--gas/testsuite/gas/mips/attr-gnu-4-5.l2
-rw-r--r--gas/testsuite/gas/mips/attr-gnu-4-5.s1
-rw-r--r--gas/testsuite/gas/mips/attr-gnu-4-6-64.l2
-rw-r--r--gas/testsuite/gas/mips/attr-gnu-4-6-64.s1
-rw-r--r--gas/testsuite/gas/mips/attr-gnu-4-6-msingle-float.l2
-rw-r--r--gas/testsuite/gas/mips/attr-gnu-4-6-msingle-float.s1
-rw-r--r--gas/testsuite/gas/mips/attr-gnu-4-6-msoft-float.l2
-rw-r--r--gas/testsuite/gas/mips/attr-gnu-4-6-msoft-float.s1
-rw-r--r--gas/testsuite/gas/mips/attr-gnu-4-6-noodd.l2
-rw-r--r--gas/testsuite/gas/mips/attr-gnu-4-6-noodd.s1
-rw-r--r--gas/testsuite/gas/mips/attr-gnu-4-6.d23
-rw-r--r--gas/testsuite/gas/mips/attr-gnu-4-6.l2
-rw-r--r--gas/testsuite/gas/mips/attr-gnu-4-6.s1
-rw-r--r--gas/testsuite/gas/mips/attr-gnu-4-7-64.l2
-rw-r--r--gas/testsuite/gas/mips/attr-gnu-4-7-64.s1
-rw-r--r--gas/testsuite/gas/mips/attr-gnu-4-7-msingle-float.l2
-rw-r--r--gas/testsuite/gas/mips/attr-gnu-4-7-msingle-float.s1
-rw-r--r--gas/testsuite/gas/mips/attr-gnu-4-7-msoft-float.l2
-rw-r--r--gas/testsuite/gas/mips/attr-gnu-4-7-msoft-float.s1
-rw-r--r--gas/testsuite/gas/mips/attr-gnu-4-7-odd.l2
-rw-r--r--gas/testsuite/gas/mips/attr-gnu-4-7-odd.s1
-rw-r--r--gas/testsuite/gas/mips/attr-gnu-4-7.d23
-rw-r--r--gas/testsuite/gas/mips/attr-gnu-4-7.l2
-rw-r--r--gas/testsuite/gas/mips/attr-gnu-4-7.s1
-rw-r--r--gas/testsuite/gas/mips/attr-gnu-abi-fp-1.d14
-rw-r--r--gas/testsuite/gas/mips/attr-gnu-abi-msa-1.d3
-rw-r--r--gas/testsuite/gas/mips/attr-none-double.d22
-rw-r--r--gas/testsuite/gas/mips/attr-none-o32-fp64-nooddspreg.d23
-rw-r--r--gas/testsuite/gas/mips/attr-none-o32-fp64.d23
-rw-r--r--gas/testsuite/gas/mips/attr-none-o32-fpxx.d23
-rw-r--r--gas/testsuite/gas/mips/attr-none-single-float.d23
-rw-r--r--gas/testsuite/gas/mips/attr-none-soft-float.d23
-rw-r--r--gas/testsuite/gas/mips/call-nonpic-1.d13
-rw-r--r--gas/testsuite/gas/mips/elf_arch_mips1.d13
-rw-r--r--gas/testsuite/gas/mips/elf_arch_mips2.d13
-rw-r--r--gas/testsuite/gas/mips/elf_arch_mips3.d13
-rw-r--r--gas/testsuite/gas/mips/elf_arch_mips32.d13
-rw-r--r--gas/testsuite/gas/mips/elf_arch_mips32r2.d13
-rw-r--r--gas/testsuite/gas/mips/elf_arch_mips32r3.d21
-rw-r--r--gas/testsuite/gas/mips/elf_arch_mips32r5.d21
-rw-r--r--gas/testsuite/gas/mips/elf_arch_mips4.d13
-rw-r--r--gas/testsuite/gas/mips/elf_arch_mips5.d13
-rw-r--r--gas/testsuite/gas/mips/elf_arch_mips64.d13
-rw-r--r--gas/testsuite/gas/mips/elf_arch_mips64r2.d15
-rw-r--r--gas/testsuite/gas/mips/elf_arch_mips64r3.d21
-rw-r--r--gas/testsuite/gas/mips/elf_arch_mips64r5.d21
-rw-r--r--gas/testsuite/gas/mips/elf_ase_micromips-2.d13
-rw-r--r--gas/testsuite/gas/mips/elf_ase_micromips.d13
-rw-r--r--gas/testsuite/gas/mips/elf_ase_mips16-2.d13
-rw-r--r--gas/testsuite/gas/mips/elf_ase_mips16.d13
-rw-r--r--gas/testsuite/gas/mips/fpxx-oddfpreg.d12
-rw-r--r--gas/testsuite/gas/mips/fpxx-oddfpreg.l5
-rw-r--r--gas/testsuite/gas/mips/fpxx-oddfpreg.s4
-rw-r--r--gas/testsuite/gas/mips/li-d.d31
-rw-r--r--gas/testsuite/gas/mips/li-d.s24
-rw-r--r--gas/testsuite/gas/mips/micromips@mips1-fp.d2
-rw-r--r--gas/testsuite/gas/mips/mips.exp204
-rw-r--r--gas/testsuite/gas/mips/mips1-fp.d2
-rw-r--r--gas/testsuite/gas/mips/mips1-fp.l2
-rw-r--r--gas/testsuite/gas/mips/mips1-fp.s2
-rw-r--r--gas/testsuite/gas/mips/module-check-warn.l5
-rw-r--r--gas/testsuite/gas/mips/module-check-warn.s3
-rw-r--r--gas/testsuite/gas/mips/module-check.d21
-rw-r--r--gas/testsuite/gas/mips/module-check.s4
-rw-r--r--gas/testsuite/gas/mips/module-defer-warn1.d13
-rw-r--r--gas/testsuite/gas/mips/module-mfp32.d21
-rw-r--r--gas/testsuite/gas/mips/module-mfp32.s3
-rw-r--r--gas/testsuite/gas/mips/module-mfp64-noodd.d21
-rw-r--r--gas/testsuite/gas/mips/module-mfp64-noodd.s4
-rw-r--r--gas/testsuite/gas/mips/module-mfp64.d21
-rw-r--r--gas/testsuite/gas/mips/module-mfp64.s4
-rw-r--r--gas/testsuite/gas/mips/module-mfpxx.d21
-rw-r--r--gas/testsuite/gas/mips/module-mfpxx.s3
-rw-r--r--gas/testsuite/gas/mips/module-msingle-float.d21
-rw-r--r--gas/testsuite/gas/mips/module-msingle-float.s3
-rw-r--r--gas/testsuite/gas/mips/module-msoft-float.d21
-rw-r--r--gas/testsuite/gas/mips/module-msoft-float.s3
-rw-r--r--gas/testsuite/gas/mips/module-override.d13
-rw-r--r--gas/testsuite/gas/mips/module-set-mfpxx.d21
-rw-r--r--gas/testsuite/gas/mips/module-set-mfpxx.s16
-rw-r--r--gas/testsuite/gas/mips/n32-consec.d13
-rw-r--r--gas/testsuite/gas/mips/nan-2008-1.d1
-rw-r--r--gas/testsuite/gas/mips/nan-2008-2.d1
-rw-r--r--gas/testsuite/gas/mips/nan-2008-3.d1
-rw-r--r--gas/testsuite/gas/mips/nan-2008-4.d1
-rw-r--r--gas/testsuite/gas/mips/nan-legacy-1.d14
-rw-r--r--gas/testsuite/gas/mips/nan-legacy-2.d14
-rw-r--r--gas/testsuite/gas/mips/nan-legacy-3.d14
-rw-r--r--gas/testsuite/gas/mips/nan-legacy-4.d14
-rw-r--r--gas/testsuite/gas/mips/nan-legacy-5.d14
-rw-r--r--gas/testsuite/gas/mips/no-odd-spreg.d22
-rw-r--r--gas/testsuite/gas/mips/odd-spreg.d22
-rw-r--r--gas/testsuite/gas/mips/tmips16-e.d7
-rw-r--r--gas/testsuite/gas/mips/tmips16-f.d7
-rw-r--r--gas/testsuite/gas/mips/tmipsel16-e.d7
-rw-r--r--gas/testsuite/gas/mips/tmipsel16-f.d7
130 files changed, 2011 insertions, 72 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index c44b7cc..487b0c7 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,40 @@
+2014-07-29 Matthew Fortune <matthew.fortune@imgtec.com>
+
+ * config/tc-mips.c (mips_flags_frag): New static global.
+ (struct mips_set_options): Add oddspreg field.
+ (file_mips_opts, mips_opts): Initialize oddspreg.
+ (ISA_HAS_ODD_SINGLE_FPR): Add CPU argument and update for R5900 and
+ Loongson-3a.
+ (enum options, md_longopts, md_parse_option): Add -mfpxx, -modd-spreg
+ and -mno-odd-spreg options.
+ (md_begin): Create .MIPS.abiflags section.
+ (fpabi_incompatible_with, fpabi_requires): New static function.
+ (check_fpabi): Likewise.
+ (mips_check_options): Handle fp=xx and oddspreg restrictions.
+ (file_mips_check_options): Set oddspreg by default for fp=xx.
+ (mips_oddfpreg_ok): Re-write function.
+ (check_regno): Check odd numbered registers regardless of FPR size.
+ For fp != 32 use as_bad instead of as_warn.
+ (match_float_constant): Rewrite check regarding FP register width. Add
+ support for generating constants when MXHC1 is present. Handle fp=xx
+ to comply with the ABI.
+ (macro): Update M_LI_DD similarly to match_float_constant. Generate
+ MTHC1 when available. Check that correct code can be generated for
+ fp=xx and fp=64 ABIs.
+ (parse_code_option, s_mipsset): Add fp=xx, oddspreg and nooddspreg
+ options.
+ (mips_convert_ase_flags): New static function.
+ (mips_elf_final_processing): Use fpabi == Val_GNU_MIPS_ABI_FP_OLD_64
+ to determine when to add the EF_MIPS_FP64 flag. Populate the
+ .MIPS.abiflags section.
+ (md_mips_end): Update .gnu_attribute based on command line and .module
+ as applicable. Use check_fpabi to ensure .gnu.attribute and command
+ line/.module options are consistent.
+ * doc/as.texinfo: Add missing -mgp64/-mfp64 options and document new
+ -mfpxx, -modd-spreg and -mno-odd-spreg options.
+ * doc/c-mips.texi: Document -mfpxx, -modd-spreg, -mno-odd-spreg,
+ gnu_attribute values and FP ABIs.
+
2014-07-27 Joel Sherrill <joel.sherrill@oarcorp.com>
Add RTEMS target support and simplify matching
diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
index 4814a69..2340afc 100644
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -89,6 +89,7 @@ int mips_flag_pdr = TRUE;
#include "ecoff.h"
static char *mips_regmask_frag;
+static char *mips_flags_frag;
#define ZERO 0
#define ATREG 1
@@ -257,6 +258,10 @@ struct mips_set_options
Changed by .set singlefloat or .set doublefloat, command-line options
-msingle-float or -mdouble-float. The default is false. */
bfd_boolean single_float;
+
+ /* 1 if single-precision operations on odd-numbered registers are
+ allowed. */
+ int oddspreg;
};
/* Specifies whether module level options have been checked yet. */
@@ -275,7 +280,7 @@ static struct mips_set_options file_mips_opts =
/* noreorder */ 0, /* at */ ATREG, /* warn_about_macros */ 0,
/* nomove */ 0, /* nobopt */ 0, /* noautoextend */ 0, /* insn32 */ FALSE,
/* gp */ -1, /* fp */ -1, /* arch */ CPU_UNKNOWN, /* sym32 */ FALSE,
- /* soft_float */ FALSE, /* single_float */ FALSE
+ /* soft_float */ FALSE, /* single_float */ FALSE, /* oddspreg */ -1
};
/* This is similar to file_mips_opts, but for the current set of options. */
@@ -286,7 +291,7 @@ static struct mips_set_options mips_opts =
/* noreorder */ 0, /* at */ ATREG, /* warn_about_macros */ 0,
/* nomove */ 0, /* nobopt */ 0, /* noautoextend */ 0, /* insn32 */ FALSE,
/* gp */ -1, /* fp */ -1, /* arch */ CPU_UNKNOWN, /* sym32 */ FALSE,
- /* soft_float */ FALSE, /* single_float */ FALSE
+ /* soft_float */ FALSE, /* single_float */ FALSE, /* oddspreg */ -1
};
/* Which bits of file_ase were explicitly set or cleared by ASE options. */
@@ -392,15 +397,17 @@ static int mips_32bitmode = 0;
)
/* Return true if ISA supports single-precision floats in odd registers. */
-#define ISA_HAS_ODD_SINGLE_FPR(ISA) \
- ((ISA) == ISA_MIPS32 \
- || (ISA) == ISA_MIPS32R2 \
- || (ISA) == ISA_MIPS32R3 \
- || (ISA) == ISA_MIPS32R5 \
- || (ISA) == ISA_MIPS64 \
- || (ISA) == ISA_MIPS64R2 \
- || (ISA) == ISA_MIPS64R3 \
- || (ISA) == ISA_MIPS64R5)
+#define ISA_HAS_ODD_SINGLE_FPR(ISA, CPU)\
+ (((ISA) == ISA_MIPS32 \
+ || (ISA) == ISA_MIPS32R2 \
+ || (ISA) == ISA_MIPS32R3 \
+ || (ISA) == ISA_MIPS32R5 \
+ || (ISA) == ISA_MIPS64 \
+ || (ISA) == ISA_MIPS64R2 \
+ || (ISA) == ISA_MIPS64R3 \
+ || (ISA) == ISA_MIPS64R5 \
+ || (CPU) == CPU_R5900) \
+ && (CPU) != CPU_LOONGSON_3A)
/* Return true if ISA supports move to/from high part of a 64-bit
floating-point register. */
@@ -1407,6 +1414,7 @@ enum options
OPTION_CONSTRUCT_FLOATS,
OPTION_NO_CONSTRUCT_FLOATS,
OPTION_FP64,
+ OPTION_FPXX,
OPTION_GP64,
OPTION_RELAX_BRANCH,
OPTION_NO_RELAX_BRANCH,
@@ -1434,6 +1442,8 @@ enum options
OPTION_NO_PDR,
OPTION_MVXWORKS_PIC,
OPTION_NAN,
+ OPTION_ODD_SPREG,
+ OPTION_NO_ODD_SPREG,
OPTION_END_OF_ENUM
};
@@ -1526,6 +1536,7 @@ struct option md_longopts[] =
{"construct-floats", no_argument, NULL, OPTION_CONSTRUCT_FLOATS},
{"no-construct-floats", no_argument, NULL, OPTION_NO_CONSTRUCT_FLOATS},
{"mfp64", no_argument, NULL, OPTION_FP64},
+ {"mfpxx", no_argument, NULL, OPTION_FPXX},
{"mgp64", no_argument, NULL, OPTION_GP64},
{"relax-branch", no_argument, NULL, OPTION_RELAX_BRANCH},
{"no-relax-branch", no_argument, NULL, OPTION_NO_RELAX_BRANCH},
@@ -1539,6 +1550,8 @@ struct option md_longopts[] =
{"mhard-float", no_argument, NULL, OPTION_HARD_FLOAT},
{"msingle-float", no_argument, NULL, OPTION_SINGLE_FLOAT},
{"mdouble-float", no_argument, NULL, OPTION_DOUBLE_FLOAT},
+ {"modd-spreg", no_argument, NULL, OPTION_ODD_SPREG},
+ {"mno-odd-spreg", no_argument, NULL, OPTION_NO_ODD_SPREG},
/* Strictly speaking this next option is ELF specific,
but we allow it for other ports as well in order to
@@ -3612,6 +3625,12 @@ md_begin (void)
}
}
+ sec = subseg_new (".MIPS.abiflags", (subsegT) 0);
+ bfd_set_section_flags (stdoutput, sec,
+ SEC_READONLY | SEC_DATA | SEC_ALLOC | SEC_LOAD);
+ bfd_set_section_alignment (stdoutput, sec, 3);
+ mips_flags_frag = frag_more (sizeof (Elf_External_ABIFlags_v0));
+
if (ECOFF_DEBUGGING)
{
sec = subseg_new (".mdebug", (subsegT) 0);
@@ -3635,6 +3654,88 @@ md_begin (void)
init_vr4120_conflicts ();
}
+static inline void
+fpabi_incompatible_with (int fpabi, const char *what)
+{
+ as_warn (_(".gnu_attribute %d,%d is incompatible with `%s'"),
+ Tag_GNU_MIPS_ABI_FP, fpabi, what);
+}
+
+static inline void
+fpabi_requires (int fpabi, const char *what)
+{
+ as_warn (_(".gnu_attribute %d,%d requires `%s'"),
+ Tag_GNU_MIPS_ABI_FP, fpabi, what);
+}
+
+/* Check -mabi and register sizes against the specified FP ABI. */
+static void
+check_fpabi (int fpabi)
+{
+ bfd_boolean needs_check = FALSE;
+ switch (fpabi)
+ {
+ case Val_GNU_MIPS_ABI_FP_DOUBLE:
+ if (file_mips_opts.gp == 64 && file_mips_opts.fp == 32)
+ fpabi_incompatible_with (fpabi, "gp=64 fp=32");
+ else if (file_mips_opts.gp == 32 && file_mips_opts.fp == 64)
+ fpabi_incompatible_with (fpabi, "gp=32 fp=64");
+ else
+ needs_check = TRUE;
+ break;
+
+ case Val_GNU_MIPS_ABI_FP_XX:
+ if (mips_abi != O32_ABI)
+ fpabi_requires (fpabi, "-mabi=32");
+ else if (file_mips_opts.fp != 0)
+ fpabi_requires (fpabi, "fp=xx");
+ else
+ needs_check = TRUE;
+ break;
+
+ case Val_GNU_MIPS_ABI_FP_64A:
+ case Val_GNU_MIPS_ABI_FP_64:
+ if (mips_abi != O32_ABI)
+ fpabi_requires (fpabi, "-mabi=32");
+ else if (file_mips_opts.fp != 64)
+ fpabi_requires (fpabi, "fp=64");
+ else if (fpabi == Val_GNU_MIPS_ABI_FP_64 && !file_mips_opts.oddspreg)
+ fpabi_incompatible_with (fpabi, "nooddspreg");
+ else if (fpabi == Val_GNU_MIPS_ABI_FP_64A && file_mips_opts.oddspreg)
+ fpabi_requires (fpabi, "nooddspreg");
+ else
+ needs_check = TRUE;
+ break;
+
+ case Val_GNU_MIPS_ABI_FP_SINGLE:
+ if (file_mips_opts.soft_float)
+ fpabi_incompatible_with (fpabi, "softfloat");
+ else if (!file_mips_opts.single_float)
+ fpabi_requires (fpabi, "singlefloat");
+ break;
+
+ case Val_GNU_MIPS_ABI_FP_SOFT:
+ if (!file_mips_opts.soft_float)
+ fpabi_requires (fpabi, "softfloat");
+ break;
+
+ case Val_GNU_MIPS_ABI_FP_OLD_64:
+ as_warn (_(".gnu_attribute %d,%d is no longer supported"),
+ Tag_GNU_MIPS_ABI_FP, fpabi);
+ break;
+
+ default:
+ as_warn (_(".gnu_attribute %d,%d is not a recognized"
+ " floating-point ABI"), Tag_GNU_MIPS_ABI_FP, fpabi);
+ break;
+ }
+
+ if (needs_check && file_mips_opts.soft_float)
+ fpabi_incompatible_with (fpabi, "softfloat");
+ else if (needs_check && file_mips_opts.single_float)
+ fpabi_incompatible_with (fpabi, "singlefloat");
+}
+
/* Perform consistency checks on the current options. */
static void
@@ -3653,6 +3754,12 @@ mips_check_options (struct mips_set_options *opts, bfd_boolean abi_checks)
/* Check the size of the float registers agrees with the ABI and ISA. */
switch (opts->fp)
{
+ case 0:
+ if (!CPU_HAS_LDC1_SDC1 (opts->arch))
+ as_bad (_("`fp=xx' used with a cpu lacking ldc1/sdc1 instructions"));
+ else if (opts->single_float == 1)
+ as_bad (_("`fp=xx' cannot be used with `singlefloat'"));
+ break;
case 64:
if (!ISA_HAS_64BIT_FPRS (opts->isa))
as_bad (_("`fp=64' used with a 32-bit fpu"));
@@ -3671,6 +3778,9 @@ mips_check_options (struct mips_set_options *opts, bfd_boolean abi_checks)
break;
}
+ if (ABI_NEEDS_64BIT_REGS (mips_abi) && !opts->oddspreg)
+ as_bad (_("`nooddspreg` cannot be used with a 64-bit ABI"));
+
if (opts->micromips == 1 && opts->mips16 == 1)
as_bad (_("`mips16' cannot be used with `micromips'"));
}
@@ -3728,6 +3838,16 @@ file_mips_check_options (void)
arch_info = mips_cpu_info_from_arch (file_mips_opts.arch);
+ /* Disable operations on odd-numbered floating-point registers by default
+ when using the FPXX ABI. */
+ if (file_mips_opts.oddspreg < 0)
+ {
+ if (file_mips_opts.fp == 0)
+ file_mips_opts.oddspreg = 0;
+ else
+ file_mips_opts.oddspreg = 1;
+ }
+
/* End of GCC-shared inference code. */
/* This flag is set when we have a 64-bit capable CPU but use only
@@ -4377,39 +4497,42 @@ static bfd_boolean
mips_oddfpreg_ok (const struct mips_opcode *insn, int opnum)
{
const char *s = insn->name;
+ bfd_boolean oddspreg = (ISA_HAS_ODD_SINGLE_FPR (mips_opts.isa, mips_opts.arch)
+ || FPR_SIZE == 64)
+ && mips_opts.oddspreg;
if (insn->pinfo == INSN_MACRO)
/* Let a macro pass, we'll catch it later when it is expanded. */
return TRUE;
- if (ISA_HAS_ODD_SINGLE_FPR (mips_opts.isa) || mips_opts.arch == CPU_R5900)
- {
- /* Allow odd registers for single-precision ops. */
- switch (insn->pinfo & (FP_S | FP_D))
- {
- case FP_S:
- case 0:
- return TRUE;
- case FP_D:
- return FALSE;
- default:
- break;
- }
+ /* Single-precision coprocessor loads and moves are OK for 32-bit registers,
+ otherwise it depends on oddspreg. */
+ if ((insn->pinfo & FP_S)
+ && (insn->pinfo & (INSN_LOAD_MEMORY | INSN_STORE_MEMORY
+ | INSN_LOAD_COPROC_DELAY | INSN_COPROC_MOVE_DELAY)))
+ return FPR_SIZE == 32 || oddspreg;
- /* Cvt.w.x and cvt.x.w allow an odd register for a 'w' or 's' operand. */
- s = strchr (insn->name, '.');
- if (s != NULL && opnum == 2)
- s = strchr (s + 1, '.');
- return (s != NULL && (s[1] == 'w' || s[1] == 's'));
+ /* Allow odd registers for single-precision ops and double-precision if the
+ floating-point registers are 64-bit wide. */
+ switch (insn->pinfo & (FP_S | FP_D))
+ {
+ case FP_S:
+ case 0:
+ return oddspreg;
+ case FP_D:
+ return FPR_SIZE == 64;
+ default:
+ break;
}
- /* Single-precision coprocessor loads and moves are OK too. */
- if ((insn->pinfo & FP_S)
- && (insn->pinfo & (INSN_COPROC_MEMORY_DELAY | INSN_STORE_MEMORY
- | INSN_LOAD_COPROC_DELAY | INSN_COPROC_MOVE_DELAY)))
- return TRUE;
+ /* Cvt.w.x and cvt.x.w allow an odd register for a 'w' or 's' operand. */
+ s = strchr (insn->name, '.');
+ if (s != NULL && opnum == 2)
+ s = strchr (s + 1, '.');
+ if (s != NULL && (s[1] == 'w' || s[1] == 's'))
+ return oddspreg;
- return FALSE;
+ return FPR_SIZE == 64;
}
/* Information about an instruction argument that we're trying to match. */
@@ -4632,9 +4755,16 @@ check_regno (struct mips_arg_info *arg,
if (type == OP_REG_FP
&& (regno & 1) != 0
- && FPR_SIZE != 64
&& !mips_oddfpreg_ok (arg->insn->insn_mo, arg->opnum))
- as_warn (_("float register should be even, was %d"), regno);
+ {
+ /* This was a warning prior to introducing O32 FPXX and FP64 support
+ so maintain a warning for FP32 but raise an error for the new
+ cases. */
+ if (FPR_SIZE == 32)
+ as_warn (_("float register should be even, was %d"), regno);
+ else
+ as_bad (_("float register should be even, was %d"), regno);
+ }
if (type == OP_REG_CCC)
{
@@ -5488,13 +5618,16 @@ match_float_constant (struct mips_arg_info *arg, expressionS *imm,
/* Handle 64-bit constants for which an immediate value is best. */
if (length == 8
&& !mips_disable_float_construction
- /* Constants can only be constructed in GPRs and copied
- to FPRs if the GPRs are at least as wide as the FPRs.
- Force the constant into memory if we are using 64-bit FPRs
- but the GPRs are only 32 bits wide. */
- /* ??? No longer true with the addition of MTHC1, but this
- is legacy code... */
- && (using_gprs || !(FPR_SIZE == 64 && GPR_SIZE == 32))
+ /* Constants can only be constructed in GPRs and copied to FPRs if the
+ GPRs are at least as wide as the FPRs or MTHC1 is available.
+ Unlike most tests for 32-bit floating-point registers this check
+ specifically looks for GPR_SIZE == 32 as the FPXX ABI does not
+ permit 64-bit moves without MXHC1.
+ Force the constant into memory otherwise. */
+ && (using_gprs
+ || GPR_SIZE == 64
+ || ISA_HAS_MXHC1 (mips_opts.isa)
+ || FPR_SIZE == 32)
&& ((data[0] == 0 && data[1] == 0)
|| (data[2] == 0 && data[3] == 0))
&& ((data[4] == 0 && data[5] == 0)
@@ -5504,7 +5637,7 @@ match_float_constant (struct mips_arg_info *arg, expressionS *imm,
If using 32-bit registers, set IMM to the high order 32 bits and
OFFSET to the low order 32 bits. Otherwise, set IMM to the entire
64 bit constant. */
- if (using_gprs ? GPR_SIZE == 32 : FPR_SIZE != 64)
+ if (GPR_SIZE == 32 || (!using_gprs && FPR_SIZE != 64))
{
imm->X_op = O_constant;
offset->X_op = O_constant;
@@ -11686,14 +11819,18 @@ macro (struct mips_cl_insn *ip, char *str)
{
used_at = 1;
load_register (AT, &imm_expr, FPR_SIZE == 64);
- if (FPR_SIZE == 64)
- {
- gas_assert (GPR_SIZE == 64);
- macro_build (NULL, "dmtc1", "t,S", AT, op[0]);
- }
+ if (FPR_SIZE == 64 && GPR_SIZE == 64)
+ macro_build (NULL, "dmtc1", "t,S", AT, op[0]);
else
{
- macro_build (NULL, "mtc1", "t,G", AT, op[0] + 1);
+ if (ISA_HAS_MXHC1 (mips_opts.isa))
+ macro_build (NULL, "mthc1", "t,G", AT, op[0]);
+ else if (FPR_SIZE != 32)
+ as_bad (_("Unable to generate `%s' compliant code "
+ "without mthc1"),
+ (FPR_SIZE == 64) ? "fp64" : "fpxx");
+ else
+ macro_build (NULL, "mtc1", "t,G", AT, op[0] + 1);
if (offset_expr.X_op == O_absent)
macro_build (NULL, "mtc1", "t,G", 0, op[0]);
else
@@ -13939,10 +14076,22 @@ md_parse_option (int c, char *arg)
file_mips_opts.fp = 32;
break;
+ case OPTION_FPXX:
+ file_mips_opts.fp = 0;
+ break;
+
case OPTION_FP64:
file_mips_opts.fp = 64;
break;
+ case OPTION_ODD_SPREG:
+ file_mips_opts.oddspreg = 1;
+ break;
+
+ case OPTION_NO_ODD_SPREG:
+ file_mips_opts.oddspreg = 0;
+ break;
+
case OPTION_SINGLE_FLOAT:
file_mips_opts.single_float = 1;
break;
@@ -15031,6 +15180,8 @@ parse_code_option (char * name)
mips_opts.gp = 64;
else if (strcmp (name, "fp=32") == 0)
mips_opts.fp = 32;
+ else if (strcmp (name, "fp=xx") == 0)
+ mips_opts.fp = 0;
else if (strcmp (name, "fp=64") == 0)
mips_opts.fp = 64;
else if (strcmp (name, "softfloat") == 0)
@@ -15041,6 +15192,10 @@ parse_code_option (char * name)
mips_opts.single_float = 1;
else if (strcmp (name, "doublefloat") == 0)
mips_opts.single_float = 0;
+ else if (strcmp (name, "nooddspreg") == 0)
+ mips_opts.oddspreg = 0;
+ else if (strcmp (name, "oddspreg") == 0)
+ mips_opts.oddspreg = 1;
else if (strcmp (name, "mips16") == 0
|| strcmp (name, "MIPS-16") == 0)
mips_opts.mips16 = 1;
@@ -15202,13 +15357,17 @@ s_mipsset (int x ATTRIBUTE_UNUSED)
case 0:
break;
case ISA_MIPS1:
+ /* MIPS I cannot support FPXX. */
+ mips_opts.fp = 32;
+ /* fall-through. */
case ISA_MIPS2:
case ISA_MIPS32:
case ISA_MIPS32R2:
case ISA_MIPS32R3:
case ISA_MIPS32R5:
mips_opts.gp = 32;
- mips_opts.fp = 32;
+ if (mips_opts.fp != 0)
+ mips_opts.fp = 32;
break;
case ISA_MIPS3:
case ISA_MIPS4:
@@ -15218,10 +15377,13 @@ s_mipsset (int x ATTRIBUTE_UNUSED)
case ISA_MIPS64R3:
case ISA_MIPS64R5:
mips_opts.gp = 64;
- if (mips_opts.arch == CPU_R5900)
- mips_opts.fp = 32;
- else
- mips_opts.fp = 64;
+ if (mips_opts.fp != 0)
+ {
+ if (mips_opts.arch == CPU_R5900)
+ mips_opts.fp = 32;
+ else
+ mips_opts.fp = 64;
+ }
break;
default:
as_bad (_("unknown ISA level %s"), name + 4);
@@ -17371,11 +17533,123 @@ mips_add_dot_label (symbolS *sym)
mips_compressed_mark_label (sym);
}
+/* Converting ASE flags from internal to .MIPS.abiflags values. */
+static unsigned int
+mips_convert_ase_flags (int ase)
+{
+ unsigned int ext_ases = 0;
+
+ if (ase & ASE_DSP)
+ ext_ases |= AFL_ASE_DSP;
+ if (ase & ASE_DSPR2)
+ ext_ases |= AFL_ASE_DSPR2;
+ if (ase & ASE_EVA)
+ ext_ases |= AFL_ASE_EVA;
+ if (ase & ASE_MCU)
+ ext_ases |= AFL_ASE_MCU;
+ if (ase & ASE_MDMX)
+ ext_ases |= AFL_ASE_MDMX;
+ if (ase & ASE_MIPS3D)
+ ext_ases |= AFL_ASE_MIPS3D;
+ if (ase & ASE_MT)
+ ext_ases |= AFL_ASE_MT;
+ if (ase & ASE_SMARTMIPS)
+ ext_ases |= AFL_ASE_SMARTMIPS;
+ if (ase & ASE_VIRT)
+ ext_ases |= AFL_ASE_VIRT;
+ if (ase & ASE_MSA)
+ ext_ases |= AFL_ASE_MSA;
+ if (ase & ASE_XPA)
+ ext_ases |= AFL_ASE_XPA;
+
+ return ext_ases;
+}
/* Some special processing for a MIPS ELF file. */
void
mips_elf_final_processing (void)
{
+ int fpabi;
+ Elf_Internal_ABIFlags_v0 flags;
+
+ flags.version = 0;
+ flags.isa_rev = 0;
+ switch (file_mips_opts.isa)
+ {
+ case INSN_ISA1:
+ flags.isa_level = 1;
+ break;
+ case INSN_ISA2:
+ flags.isa_level = 2;
+ break;
+ case INSN_ISA3:
+ flags.isa_level = 3;
+ break;
+ case INSN_ISA4:
+ flags.isa_level = 4;
+ break;
+ case INSN_ISA5:
+ flags.isa_level = 5;
+ break;
+ case INSN_ISA32:
+ flags.isa_level = 32;
+ flags.isa_rev = 1;
+ break;
+ case INSN_ISA32R2:
+ flags.isa_level = 32;
+ flags.isa_rev = 2;
+ break;
+ case INSN_ISA32R3:
+ flags.isa_level = 32;
+ flags.isa_rev = 3;
+ break;
+ case INSN_ISA32R5:
+ flags.isa_level = 32;
+ flags.isa_rev = 5;
+ break;
+ case INSN_ISA64:
+ flags.isa_level = 64;
+ flags.isa_rev = 1;
+ break;
+ case INSN_ISA64R2:
+ flags.isa_level = 64;
+ flags.isa_rev = 2;
+ break;
+ case INSN_ISA64R3:
+ flags.isa_level = 64;
+ flags.isa_rev = 3;
+ break;
+ case INSN_ISA64R5:
+ flags.isa_level = 64;
+ flags.isa_rev = 5;
+ break;
+ }
+
+ flags.gpr_size = file_mips_opts.gp == 32 ? AFL_REG_32 : AFL_REG_64;
+ flags.cpr1_size = file_mips_opts.soft_float ? AFL_REG_NONE
+ : (file_mips_opts.ase & ASE_MSA) ? AFL_REG_128
+ : (file_mips_opts.fp == 64) ? AFL_REG_64
+ : AFL_REG_32;
+ flags.cpr2_size = AFL_REG_NONE;
+ flags.fp_abi = bfd_elf_get_obj_attr_int (stdoutput, OBJ_ATTR_GNU,
+ Tag_GNU_MIPS_ABI_FP);
+ flags.isa_ext = bfd_mips_isa_ext (stdoutput);
+ flags.ases = mips_convert_ase_flags (file_mips_opts.ase);
+ if (file_ase_mips16)
+ flags.ases |= AFL_ASE_MIPS16;
+ if (file_ase_micromips)
+ flags.ases |= AFL_ASE_MICROMIPS;
+ flags.flags1 = 0;
+ if ((ISA_HAS_ODD_SINGLE_FPR (file_mips_opts.isa, file_mips_opts.arch)
+ || file_mips_opts.fp == 64)
+ && file_mips_opts.oddspreg)
+ flags.flags1 |= AFL_FLAGS1_ODDSPREG;
+ flags.flags2 = 0;
+
+ bfd_mips_elf_swap_abiflags_v0_out (stdoutput, &flags,
+ ((Elf_External_ABIFlags_v0 *)
+ mips_flags_frag));
+
/* Write out the register information. */
if (mips_abi != N64_ABI)
{
@@ -17454,7 +17728,9 @@ mips_elf_final_processing (void)
elf_elfheader (stdoutput)->e_flags |= EF_MIPS_NAN2008;
/* 32 bit code with 64 bit FP registers. */
- if (file_mips_opts.fp == 64 && ABI_NEEDS_32BIT_REGS (mips_abi))
+ fpabi = bfd_elf_get_obj_attr_int (stdoutput, OBJ_ATTR_GNU,
+ Tag_GNU_MIPS_ABI_FP);
+ if (fpabi == Val_GNU_MIPS_ABI_FP_OLD_64)
elf_elfheader (stdoutput)->e_flags |= EF_MIPS_FP64;
}
@@ -18402,10 +18678,56 @@ mips_convert_symbolic_attribute (const char *name)
void
md_mips_end (void)
{
+ int fpabi = Val_GNU_MIPS_ABI_FP_ANY;
+
mips_emit_delays ();
if (cur_proc_ptr)
as_warn (_("missing .end at end of assembly"));
/* Just in case no code was emitted, do the consistency check. */
file_mips_check_options ();
+
+ /* Set a floating-point ABI if the user did not. */
+ if (obj_elf_seen_attribute (OBJ_ATTR_GNU, Tag_GNU_MIPS_ABI_FP))
+ {
+ /* Perform consistency checks on the floating-point ABI. */
+ fpabi = bfd_elf_get_obj_attr_int (stdoutput, OBJ_ATTR_GNU,
+ Tag_GNU_MIPS_ABI_FP);
+ if (fpabi != Val_GNU_MIPS_ABI_FP_ANY)
+ check_fpabi (fpabi);
+ }
+ else
+ {
+ /* Soft-float gets precedence over single-float, the two options should
+ not be used together so this should not matter. */
+ if (file_mips_opts.soft_float == 1)
+ fpabi = Val_GNU_MIPS_ABI_FP_SOFT;
+ /* Single-float gets precedence over all double_float cases. */
+ else if (file_mips_opts.single_float == 1)
+ fpabi = Val_GNU_MIPS_ABI_FP_SINGLE;
+ else
+ {
+ switch (file_mips_opts.fp)
+ {
+ case 32:
+ if (file_mips_opts.gp == 32)
+ fpabi = Val_GNU_MIPS_ABI_FP_DOUBLE;
+ break;
+ case 0:
+ fpabi = Val_GNU_MIPS_ABI_FP_XX;
+ break;
+ case 64:
+ if (file_mips_opts.gp == 32 && !file_mips_opts.oddspreg)
+ fpabi = Val_GNU_MIPS_ABI_FP_64A;
+ else if (file_mips_opts.gp == 32)
+ fpabi = Val_GNU_MIPS_ABI_FP_64;
+ else
+ fpabi = Val_GNU_MIPS_ABI_FP_DOUBLE;
+ break;
+ }
+ }
+
+ bfd_elf_add_obj_attr_int (stdoutput, OBJ_ATTR_GNU,
+ Tag_GNU_MIPS_ABI_FP, fpabi);
+ }
}
diff --git a/gas/doc/as.texinfo b/gas/doc/as.texinfo
index 0f0956c..251b6d5 100644
--- a/gas/doc/as.texinfo
+++ b/gas/doc/as.texinfo
@@ -399,6 +399,8 @@ gcc(1), ld(1), and the Info entries for @file{binutils} and @file{ld}.
[@b{-g}[@var{debug level}]] [@b{-G} @var{num}] [@b{-KPIC}] [@b{-call_shared}]
[@b{-non_shared}] [@b{-xgot} [@b{-mvxworks-pic}]
[@b{-mabi}=@var{ABI}] [@b{-32}] [@b{-n32}] [@b{-64}] [@b{-mfp32}] [@b{-mgp32}]
+ [@b{-mfp64}] [@b{-mgp64}] [@b{-mfpxx}]
+ [@b{-modd-spreg}] [@b{-mno-odd-spreg}]
[@b{-march}=@var{CPU}] [@b{-mtune}=@var{CPU}] [@b{-mips1}] [@b{-mips2}]
[@b{-mips3}] [@b{-mips4}] [@b{-mips5}] [@b{-mips32}] [@b{-mips32r2}]
[@b{-mips32r3}] [@b{-mips32r5}] [@b{-mips64}] [@b{-mips64r2}]
@@ -1321,6 +1323,25 @@ flags force a certain group of registers to be treated as 32 bits wide at
all times. @samp{-mgp32} controls the size of general-purpose registers
and @samp{-mfp32} controls the size of floating-point registers.
+@item -mgp64
+@itemx -mfp64
+The register sizes are normally inferred from the ISA and ABI, but these
+flags force a certain group of registers to be treated as 64 bits wide at
+all times. @samp{-mgp64} controls the size of general-purpose registers
+and @samp{-mfp64} controls the size of floating-point registers.
+
+@item -mfpxx
+The register sizes are normally inferred from the ISA and ABI, but using
+this flag in combination with @samp{-mabi=32} enables an ABI variant
+which will operate correctly with floating-point registers which are
+32 or 64 bits wide.
+
+@item -modd-spreg
+@itemx -mno-odd-spreg
+Enable use of floating-point operations on odd-numbered single-precision
+registers when supported by the ISA. @samp{-mfpxx} implies
+@samp{-mno-odd-spreg}, otherwise the default is @samp{-modd-spreg}.
+
@item -mips16
@itemx -no-mips16
Generate code for the MIPS 16 processor. This is equivalent to putting
diff --git a/gas/doc/c-mips.texi b/gas/doc/c-mips.texi
index d2795e7..1e52e09 100644
--- a/gas/doc/c-mips.texi
+++ b/gas/doc/c-mips.texi
@@ -28,6 +28,7 @@ Assembly Language Programming'' in the same work.
* MIPS assembly options:: Directives to control code generation
* MIPS autoextend:: Directives for extending MIPS 16 bit instructions
* MIPS insn:: Directive to mark data as an instruction
+* MIPS FP ABIs:: Marking which FP ABI is in use
* MIPS NaN Encodings:: Directives to record which NaN encoding is being used
* MIPS Option Stack:: Directives to save and restore options
* MIPS ASE Instruction Generation Overrides:: Directives to control
@@ -125,6 +126,22 @@ The @code{.set gp=64} and @code{.set fp=64} directives allow the size
of registers to be changed for parts of an object. The default value is
restored by @code{.set gp=default} and @code{.set fp=default}.
+@item -mfpxx
+Make no assumptions about whether 32-bit or 64-bit floating-point
+registers are available. This is provided to support having modules
+compatible with either @samp{-mfp32} or @samp{-mfp64}. This option can
+only be used with MIPS II and above.
+
+The @code{.set fp=xx} directive allows a part of an object to be marked
+as not making assumptions about 32-bit or 64-bit FP registers. The
+default value is restored by @code{.set fp=default}.
+
+@item -modd-spreg
+@itemx -mno-odd-spreg
+Enable use of floating-point operations on odd-numbered single-precision
+registers when supported by the ISA. @samp{-mfpxx} implies
+@samp{-mno-odd-spreg}, otherwise the default is @samp{-modd-spreg}
+
@item -mips16
@itemx -no-mips16
Generate code for the MIPS 16 processor. This is equivalent to putting
@@ -769,6 +786,115 @@ baz:
@end example
+@node MIPS FP ABIs
+@section Directives to control the FP ABI
+@menu
+* MIPS FP ABI History:: History of FP ABIs
+* MIPS FP ABI Variants:: Supported FP ABIs
+* MIPS FP ABI Selection:: Automatic selection of FP ABI
+* MIPS FP ABI Compatibility:: Linking different FP ABI variants
+@end menu
+
+@node MIPS FP ABI History
+@subsection History of FP ABIs
+@cindex @code{.gnu_attribute 4, @var{n}} directive, MIPS
+@cindex @code{.gnu_attribute Tag_GNU_MIPS_ABI_FP, @var{n}} directive, MIPS
+The MIPS ABIs support a variety of different floating-point extensions
+where calling-convention and register sizes vary for floating-point data.
+The extensions exist to support a wide variety of optional architecture
+features. The resulting ABI variants are generally incompatible with each
+other and must be tracked carefully.
+
+Traditionally the use of an explicit @code{.gnu_attribute 4, @var{n}}
+directive is used to indicate which ABI is in use by a specific module.
+It was then left to the user to ensure that command line options and the
+selected ABI were compatible with some potential for inconsistencies.
+
+@node MIPS FP ABI Variants
+@subsection Supported FP ABIs
+The supported floating-point ABI variants are:
+
+@table @code
+@item 0 - No floating-point
+This variant is used to indicate that floating-point is not used within
+the module at all and therefore has no impact on the ABI. This is the
+default.
+
+@item 1 - Double-precision
+This variant indicates that double-precision support is used. For 64-bit
+ABIs this means that 64-bit wide floating-point registers are required.
+For 32-bit ABIs this means that 32-bit wide floating-point registers are
+required and double-precision operations use pairs of registers.
+
+@item 2 - Single-precision
+This variant indicates that single-precision support is used. Double
+precision operations will be supported via soft-float routines.
+
+@item 3 - Soft-float
+This variant indicates that although floating-point support is used all
+operations are emulated in software. This means the ABI is modified to
+pass all floating-point data in general-purpose registers.
+
+@item 4 - Deprecated
+This variant existed as an initial attempt at supporting 64-bit wide
+floating-point registers for O32 ABI on a MIPS32r2 cpu. This has been
+superceded by @value{5}, @value{6} and @value{7}.
+
+@item 5 - Double-precision 32-bit CPU, 32-bit or 64-bit FPU
+This variant is used by 32-bit ABIs to indicate that the floating-point
+code in the module has been designed to operate correctly with either
+32-bit wide or 64-bit wide floating-point registers. Double-precision
+support is used. Only O32 currently supports this variant and requires
+a minimum architecture of MIPS II.
+
+@item 6 - Double-precision 32-bit FPU, 64-bit FPU
+This variant is used by 32-bit ABIs to indicate that the floating-point
+code in the module requires 64-bit wide floating-point registers.
+Double-precision support is used. Only O32 currently supports this
+variant and requires a minimum architecture of MIPS32r2.
+
+@item 7 - Double-precision compat 32-bit FPU, 64-bit FPU
+This variant is used by 32-bit ABIs to indicate that the floating-point
+code in the module requires 64-bit wide floating-point registers.
+Double-precision support is used. This differs from the previous ABI
+as it restricts use of odd-numbered single-precision registers. Only
+O32 currently supports this variant and requires a minimum architecture
+of MIPS32r2.
+@end table
+
+@node MIPS FP ABI Selection
+@subsection Automatic selection of FP ABI
+@cindex @code{.module fp=@var{nn}} directive, MIPS
+In order to simplify and add safety to the process of selecting the
+correct floating-point ABI, the assembler will automatically infer the
+correct @code{.gnu_attribute 4, @var{n}} directive based on command line
+options and @code{.module} overrides. Where an explicit
+@code{.gnu_attribute 4, @var{n}} directive has been seen then a warning
+will be raised if it does not match an inferred setting.
+
+The floating-point ABI is inferred as follows. If @samp{-msoft-float}
+has been used the module will be marked as soft-float. If
+@samp{-msingle-float} has been used then the module will be marked as
+single-precision. The remaining ABIs are then selected based
+on the FP register width. Double-precision is selected if the width
+of GP and FP registers match and the special double-precision variants
+for 32-bit ABIs are then selected depending on @samp{-mfpxx},
+@samp{-mfp64} and @samp{-mno-odd-spreg}.
+
+@node MIPS FP ABI Compatibility
+@subsection Linking different FP ABI variants
+Modules using the default FP ABI (no floating-point) can be linked with
+any other (singular) FP ABI variant.
+
+Special compatibility support exists for O32 with the four
+double-precision FP ABI variants. The @samp{-mfpxx} FP ABI is specifically
+designed to be compatible with the standard double-precision ABI and the
+@samp{-mfp64} FP ABIs. This makes it desirable for O32 modules to be
+built as @samp{-mfpxx} to ensure the maximum compatibility with other
+modules produced for more specific needs. The only FP ABIs which cannot
+be linked together are the standard double-precision ABI and the full
+@samp{-mfp64} ABI with @samp{-modd-spreg}.
+
@node MIPS NaN Encodings
@section Directives to record which NaN encoding is being used
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 93ee465..9d93224 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,127 @@
+2014-07-29 Matthew Fortune <matthew.fortune@imgtec.com>
+
+ * gas/mips/attr-gnu-4-0.d: New.
+ * gas/mips/attr-gnu-4-0.s: Likewise.
+ * gas/mips/attr-gnu-4-1-mfp32.l: Likewise.
+ * gas/mips/attr-gnu-4-1-mfp32.s: Likewise.
+ * gas/mips/attr-gnu-4-1-mfp64.l: Likewise.
+ * gas/mips/attr-gnu-4-1-mfp64.s: Likewise.
+ * gas/mips/attr-gnu-4-1-mfpxx.s: Likewise.
+ * gas/mips/attr-gnu-4-1-msingle-float.l: Likewise.
+ * gas/mips/attr-gnu-4-1-msingle-float.s: Likewise.
+ * gas/mips/attr-gnu-4-1-msoft-float.l: Likewise.
+ * gas/mips/attr-gnu-4-1-msoft-float.s: Likewise.
+ * gas/mips/attr-gnu-4-1.d: Likewise.
+ * gas/mips/attr-gnu-4-1.s: Likewise.
+ * gas/mips/attr-gnu-4-2-mdouble-float.l: Likewise.
+ * gas/mips/attr-gnu-4-2-mdouble-float.s: Likewise.
+ * gas/mips/attr-gnu-4-2-msoft-float.l: Likewise.
+ * gas/mips/attr-gnu-4-2-msoft-float.s: Likewise.
+ * gas/mips/attr-gnu-4-2.d: Likewise.
+ * gas/mips/attr-gnu-4-2.s: Likewise.
+ * gas/mips/attr-gnu-4-3-mhard-float.l: Likewise.
+ * gas/mips/attr-gnu-4-3-mhard-float.s: Likewise.
+ * gas/mips/attr-gnu-4-3.d: Likewise.
+ * gas/mips/attr-gnu-4-3.s: Likewise.
+ * gas/mips/attr-gnu-4-4.l: Likewise.
+ * gas/mips/attr-gnu-4-4.s: Likewise.
+ * gas/mips/attr-gnu-4-5-64.l: Likewise.
+ * gas/mips/attr-gnu-4-5-64.s: Likewise.
+ * gas/mips/attr-gnu-4-5.d: Likewise.
+ * gas/mips/attr-gnu-4-5.l: Likewise.
+ * gas/mips/attr-gnu-4-5.s: Likewise.
+ * gas/mips/attr-gnu-4-6-64.l: Likewise.
+ * gas/mips/attr-gnu-4-6-64.s: Likewise.
+ * gas/mips/attr-gnu-4-6.d: Likewise.
+ * gas/mips/attr-gnu-4-6.l: Likewise.
+ * gas/mips/attr-gnu-4-6.s: Likewise.
+ * gas/mips/attr-gnu-4-6-msingle-float.l: Likewise.
+ * gas/mips/attr-gnu-4-6-msingle-float.s: Likewise.
+ * gas/mips/attr-gnu-4-6-msoft-float.l: Likewise.
+ * gas/mips/attr-gnu-4-6-msoft-float.s: Likewise.
+ * gas/mips/attr-gnu-4-6-noodd.l: Likewise.
+ * gas/mips/attr-gnu-4-6-noodd.s: Likewise.
+ * gas/mips/attr-gnu-4-7-64.l: Likewise.
+ * gas/mips/attr-gnu-4-7-64.s: Likewise.
+ * gas/mips/attr-gnu-4-7-msingle-float.l: Likewise.
+ * gas/mips/attr-gnu-4-7-msingle-float.s: Likewise.
+ * gas/mips/attr-gnu-4-7-msoft-float.l: Likewise.
+ * gas/mips/attr-gnu-4-7-msoft-float.s: Likewise.
+ * gas/mips/attr-gnu-4-7-odd.l: Likewise.
+ * gas/mips/attr-gnu-4-7-odd.s: Likewise.
+ * gas/mips/attr-gnu-4-7.d: Likewise.
+ * gas/mips/attr-gnu-4-7.l: Likewise.
+ * gas/mips/attr-gnu-4-7.s: Likewise.
+ * gas/mips/attr-none-double.d: Likewise.
+ * gas/mips/attr-none-o32-fp64.d: Likewise.
+ * gas/mips/attr-none-o32-fp64-nooddspreg.d
+ * gas/mips/attr-none-o32-fpxx.d: Likewise.
+ * gas/mips/attr-none-single-float.d: Likewise.
+ * gas/mips/attr-none-soft-float.d: Likewise.
+ * gas/mips/elf_arch_mips32r3.d: Likewise.
+ * gas/mips/elf_arch_mips32r5.d: Likewise.
+ * gas/mips/elf_arch_mips64r3.d: Likewise.
+ * gas/mips/elf_arch_mips64r5.d: Likewise.
+ * gas/mips/li-d.d: Likewise.
+ * gas/mips/li-d.s: Likewise.
+ * gas/mips/module-check-warn.l: Likewise.
+ * gas/mips/module-check-warn.s: Likewise.
+ * gas/mips/module-check.d: Likewise.
+ * gas/mips/module-check.s: Likewise.
+ * gas/mips/module-mfp32.d: Likewise.
+ * gas/mips/module-mfp32.s: Likewise.
+ * gas/mips/module-mfp64.d: Likewise.
+ * gas/mips/module-mfp64.s: Likewise.
+ * gas/mips/module-mfp64-noodd.d: Likewise.
+ * gas/mips/module-mfp64-noodd.s: Likewise.
+ * gas/mips/module-mfpxx.d: Likewise.
+ * gas/mips/module-mfpxx.s: Likewise.
+ * gas/mips/module-msingle-float.d: Likewise.
+ * gas/mips/module-msingle-float.s: Likewise.
+ * gas/mips/module-msoft-float.d: Likewise.
+ * gas/mips/module-msoft-float.s: Likewise.
+ * gas/mips/module-set-mfpxx.d: Likewise.
+ * gas/mips/module-set-mfpxx.s: Likewise.
+ * gas/mips/fpxx-oddfpreg.d: Likewise.
+ * gas/mips/fpxx-oddfpreg.l: Likewise.
+ * gas/mips/fpxx-oddfpreg.s: Likewise.
+ * gas/mips/no-odd-spreg.d: Likewise.
+ * gas/mips/odd-spreg.d: Likewise.
+ * gas/elf/section2.e-mips: Adjust expected output.
+ * gas/mips/attr-gnu-abi-fp-1.d: Likewise.
+ * gas/mips/attr-gnu-abi-msa-1.d: Likewise.
+ * gas/mips/call-nonpic-1.d: Likewise.
+ * gas/mips/elf_arch_mips1.d: Likewise.
+ * gas/mips/elf_arch_mips2.d: Likewise.
+ * gas/mips/elf_arch_mips3.d: Likewise.
+ * gas/mips/elf_arch_mips32.d: Likewise.
+ * gas/mips/elf_arch_mips32r2.d: Likewise.
+ * gas/mips/elf_arch_mips4.d: Likewise.
+ * gas/mips/elf_arch_mips5.d: Likewise.
+ * gas/mips/elf_arch_mips64.d: Likewise.
+ * gas/mips/elf_arch_mips64r2.d: Likewise.
+ * gas/mips/elf_ase_micromips-2.d: Likewise.
+ * gas/mips/elf_ase_micromips.d: Likewise.
+ * gas/mips/elf_ase_mips16-2.d: Likewise.
+ * gas/mips/elf_ase_mips16.d: Likewise.
+ * gas/mips/module-defer-warn1.d: Likewise.
+ * gas/mips/module-override.d: Likewise.
+ * gas/mips/n32-consec.d: Likewise.
+ * gas/mips/nan-2008-1.d: Likewise.
+ * gas/mips/nan-2008-2.d: Likewise.
+ * gas/mips/nan-2008-3.d: Likewise.
+ * gas/mips/nan-2008-4.d: Likewise.
+ * gas/mips/nan-legacy-1.d: Likewise.
+ * gas/mips/nan-legacy-2.d: Likewise.
+ * gas/mips/nan-legacy-3.d: Likewise.
+ * gas/mips/nan-legacy-4.d: Likewise.
+ * gas/mips/nan-legacy-5.d: Likewise.
+ * gas/mips/tmips16-e.d: Likewise.
+ * gas/mips/tmips16-f.d: Likewise.
+ * gas/mips/tmipsel16-e.d: Likewise.
+ * gas/mips/tmipsel16-f.d: Likewise.
+ * gas/testsuite/gas/mips/mips.exp: Add new tests.
+
2014-07-22 Sergey Guriev <sergey.s.guriev@intel.com>
Alexander Ivchenko <alexander.ivchenko@intel.com>
Maxim Kuznetsov <maxim.kuznetsov@intel.com>
diff --git a/gas/testsuite/gas/elf/section2.e-mips b/gas/testsuite/gas/elf/section2.e-mips
index 9e70f5c..e7588cf 100644
--- a/gas/testsuite/gas/elf/section2.e-mips
+++ b/gas/testsuite/gas/elf/section2.e-mips
@@ -1,10 +1,12 @@
-Symbol table '.symtab' contains 7 entries:
+Symbol table '.symtab' contains 9 entries:
+Num: +Value +Size +Type +Bind +Vis +Ndx +Name
+0: 0+0 +0 +NOTYPE +LOCAL +DEFAULT +UND
+1: 0+0 +0 +SECTION +LOCAL +DEFAULT +1 (|\.text)
+2: 0+0 +0 +SECTION +LOCAL +DEFAULT +2 (|\.data)
+3: 0+0 +0 +SECTION +LOCAL +DEFAULT +3 (|\.bss)
- +4: 0+0 +0 +SECTION +LOCAL +DEFAULT +6 (|A)
+ +4: 0+0 +0 +SECTION +LOCAL +DEFAULT +7 (|A)
+5: 0+0 +0 +SECTION +LOCAL +DEFAULT +4 (|\.reginfo)
- +6: 0+0 +0 +SECTION +LOCAL +DEFAULT +5 (|\.pdr)
+ +6: 0+0 +0 +SECTION +LOCAL +DEFAULT +5 (|\.MIPS\.abiflags)
+ +7: 0+0 +0 +SECTION +LOCAL +DEFAULT +6 (|\.pdr)
+ +8: 0+0 +0 +SECTION +LOCAL +DEFAULT +8 (|\.gnu\.attributes)
diff --git a/gas/testsuite/gas/mips/attr-gnu-4-0.d b/gas/testsuite/gas/mips/attr-gnu-4-0.d
new file mode 100644
index 0000000..7728079
--- /dev/null
+++ b/gas/testsuite/gas/mips/attr-gnu-4-0.d
@@ -0,0 +1,17 @@
+#PROG: readelf
+#readelf: -A
+#name: MIPS gnu_attribute 4,0
+
+MIPS ABI Flags Version: 0
+
+ISA: MIPS.*
+GPR size: .*
+CPR1 size: .*
+CPR2 size: 0
+FP ABI: Hard or soft float
+ISA Extension: .*
+ASEs:
+#...
+FLAGS 1: 0000000.
+FLAGS 2: 00000000
+
diff --git a/gas/testsuite/gas/mips/attr-gnu-4-0.s b/gas/testsuite/gas/mips/attr-gnu-4-0.s
new file mode 100644
index 0000000..a143746
--- /dev/null
+++ b/gas/testsuite/gas/mips/attr-gnu-4-0.s
@@ -0,0 +1 @@
+.gnu_attribute 4,0
diff --git a/gas/testsuite/gas/mips/attr-gnu-4-1-mfp32.l b/gas/testsuite/gas/mips/attr-gnu-4-1-mfp32.l
new file mode 100644
index 0000000..96db3ce
--- /dev/null
+++ b/gas/testsuite/gas/mips/attr-gnu-4-1-mfp32.l
@@ -0,0 +1,3 @@
+.*: Assembler messages:
+.*: Warning: `fp=32' used with a 64-bit ABI
+.*: Warning: .gnu_attribute 4,1 is incompatible with `gp=64 fp=32'
diff --git a/gas/testsuite/gas/mips/attr-gnu-4-1-mfp32.s b/gas/testsuite/gas/mips/attr-gnu-4-1-mfp32.s
new file mode 100644
index 0000000..e985a56
--- /dev/null
+++ b/gas/testsuite/gas/mips/attr-gnu-4-1-mfp32.s
@@ -0,0 +1 @@
+.gnu_attribute 4,1
diff --git a/gas/testsuite/gas/mips/attr-gnu-4-1-mfp64.l b/gas/testsuite/gas/mips/attr-gnu-4-1-mfp64.l
new file mode 100644
index 0000000..78b5fc4
--- /dev/null
+++ b/gas/testsuite/gas/mips/attr-gnu-4-1-mfp64.l
@@ -0,0 +1,2 @@
+.*: Assembler messages:
+.*: Warning: .gnu_attribute 4,1 is incompatible with `gp=32 fp=64'
diff --git a/gas/testsuite/gas/mips/attr-gnu-4-1-mfp64.s b/gas/testsuite/gas/mips/attr-gnu-4-1-mfp64.s
new file mode 100644
index 0000000..e985a56
--- /dev/null
+++ b/gas/testsuite/gas/mips/attr-gnu-4-1-mfp64.s
@@ -0,0 +1 @@
+.gnu_attribute 4,1
diff --git a/gas/testsuite/gas/mips/attr-gnu-4-1-mfpxx.s b/gas/testsuite/gas/mips/attr-gnu-4-1-mfpxx.s
new file mode 100644
index 0000000..e985a56
--- /dev/null
+++ b/gas/testsuite/gas/mips/attr-gnu-4-1-mfpxx.s
@@ -0,0 +1 @@
+.gnu_attribute 4,1
diff --git a/gas/testsuite/gas/mips/attr-gnu-4-1-msingle-float.l b/gas/testsuite/gas/mips/attr-gnu-4-1-msingle-float.l
new file mode 100644
index 0000000..c37c520
--- /dev/null
+++ b/gas/testsuite/gas/mips/attr-gnu-4-1-msingle-float.l
@@ -0,0 +1,2 @@
+.*: Assembler messages:
+.*: Warning: .gnu_attribute 4,1 is incompatible with `singlefloat'
diff --git a/gas/testsuite/gas/mips/attr-gnu-4-1-msingle-float.s b/gas/testsuite/gas/mips/attr-gnu-4-1-msingle-float.s
new file mode 100644
index 0000000..e985a56
--- /dev/null
+++ b/gas/testsuite/gas/mips/attr-gnu-4-1-msingle-float.s
@@ -0,0 +1 @@
+.gnu_attribute 4,1
diff --git a/gas/testsuite/gas/mips/attr-gnu-4-1-msoft-float.l b/gas/testsuite/gas/mips/attr-gnu-4-1-msoft-float.l
new file mode 100644
index 0000000..819abfa
--- /dev/null
+++ b/gas/testsuite/gas/mips/attr-gnu-4-1-msoft-float.l
@@ -0,0 +1,2 @@
+.*: Assembler messages:
+.*: Warning: .gnu_attribute 4,1 is incompatible with `softfloat'
diff --git a/gas/testsuite/gas/mips/attr-gnu-4-1-msoft-float.s b/gas/testsuite/gas/mips/attr-gnu-4-1-msoft-float.s
new file mode 100644
index 0000000..e985a56
--- /dev/null
+++ b/gas/testsuite/gas/mips/attr-gnu-4-1-msoft-float.s
@@ -0,0 +1 @@
+.gnu_attribute 4,1
diff --git a/gas/testsuite/gas/mips/attr-gnu-4-1.d b/gas/testsuite/gas/mips/attr-gnu-4-1.d
new file mode 100644
index 0000000..ee1bc49
--- /dev/null
+++ b/gas/testsuite/gas/mips/attr-gnu-4-1.d
@@ -0,0 +1,22 @@
+#source: attr-gnu-4-1.s
+#PROG: readelf
+#readelf: -A
+#name: MIPS gnu_attribute 4,1 (double precision)
+
+Attribute Section: gnu
+File Attributes
+ Tag_GNU_MIPS_ABI_FP: Hard float \(double precision\)
+
+MIPS ABI Flags Version: 0
+
+ISA: MIPS.*
+GPR size: .*
+CPR1 size: .*
+CPR2 size: 0
+FP ABI: Hard float \(double precision\)
+ISA Extension: .*
+ASEs:
+#...
+FLAGS 1: 0000000.
+FLAGS 2: 00000000
+
diff --git a/gas/testsuite/gas/mips/attr-gnu-4-1.s b/gas/testsuite/gas/mips/attr-gnu-4-1.s
new file mode 100644
index 0000000..e985a56
--- /dev/null
+++ b/gas/testsuite/gas/mips/attr-gnu-4-1.s
@@ -0,0 +1 @@
+.gnu_attribute 4,1
diff --git a/gas/testsuite/gas/mips/attr-gnu-4-2-mdouble-float.l b/gas/testsuite/gas/mips/attr-gnu-4-2-mdouble-float.l
new file mode 100644
index 0000000..b138323
--- /dev/null
+++ b/gas/testsuite/gas/mips/attr-gnu-4-2-mdouble-float.l
@@ -0,0 +1,2 @@
+.*: Assembler messages:
+.*: Warning: .gnu_attribute 4,2 requires `singlefloat'
diff --git a/gas/testsuite/gas/mips/attr-gnu-4-2-mdouble-float.s b/gas/testsuite/gas/mips/attr-gnu-4-2-mdouble-float.s
new file mode 100644
index 0000000..54ebf4e
--- /dev/null
+++ b/gas/testsuite/gas/mips/attr-gnu-4-2-mdouble-float.s
@@ -0,0 +1 @@
+.gnu_attribute 4,2
diff --git a/gas/testsuite/gas/mips/attr-gnu-4-2-msoft-float.l b/gas/testsuite/gas/mips/attr-gnu-4-2-msoft-float.l
new file mode 100644
index 0000000..9d421bd
--- /dev/null
+++ b/gas/testsuite/gas/mips/attr-gnu-4-2-msoft-float.l
@@ -0,0 +1,2 @@
+.*: Assembler messages:
+.*: Warning: .gnu_attribute 4,2 is incompatible with `softfloat'
diff --git a/gas/testsuite/gas/mips/attr-gnu-4-2-msoft-float.s b/gas/testsuite/gas/mips/attr-gnu-4-2-msoft-float.s
new file mode 100644
index 0000000..54ebf4e
--- /dev/null
+++ b/gas/testsuite/gas/mips/attr-gnu-4-2-msoft-float.s
@@ -0,0 +1 @@
+.gnu_attribute 4,2
diff --git a/gas/testsuite/gas/mips/attr-gnu-4-2.d b/gas/testsuite/gas/mips/attr-gnu-4-2.d
new file mode 100644
index 0000000..eb06a1f
--- /dev/null
+++ b/gas/testsuite/gas/mips/attr-gnu-4-2.d
@@ -0,0 +1,23 @@
+#source: attr-gnu-4-2.s
+#as: -msingle-float
+#PROG: readelf
+#readelf: -A
+#name: MIPS gnu_attribute 4,2 (single precision)
+
+Attribute Section: gnu
+File Attributes
+ Tag_GNU_MIPS_ABI_FP: Hard float \(single precision\)
+
+MIPS ABI Flags Version: 0
+
+ISA: MIPS.*
+GPR size: .*
+CPR1 size: .*
+CPR2 size: 0
+FP ABI: Hard float \(single precision\)
+ISA Extension: .*
+ASEs:
+#...
+FLAGS 1: 0000000.
+FLAGS 2: 00000000
+
diff --git a/gas/testsuite/gas/mips/attr-gnu-4-2.s b/gas/testsuite/gas/mips/attr-gnu-4-2.s
new file mode 100644
index 0000000..54ebf4e
--- /dev/null
+++ b/gas/testsuite/gas/mips/attr-gnu-4-2.s
@@ -0,0 +1 @@
+.gnu_attribute 4,2
diff --git a/gas/testsuite/gas/mips/attr-gnu-4-3-mhard-float.l b/gas/testsuite/gas/mips/attr-gnu-4-3-mhard-float.l
new file mode 100644
index 0000000..21b1039
--- /dev/null
+++ b/gas/testsuite/gas/mips/attr-gnu-4-3-mhard-float.l
@@ -0,0 +1,2 @@
+.*: Assembler messages:
+.*: Warning: .gnu_attribute 4,3 requires `softfloat'
diff --git a/gas/testsuite/gas/mips/attr-gnu-4-3-mhard-float.s b/gas/testsuite/gas/mips/attr-gnu-4-3-mhard-float.s
new file mode 100644
index 0000000..32e5f5d
--- /dev/null
+++ b/gas/testsuite/gas/mips/attr-gnu-4-3-mhard-float.s
@@ -0,0 +1 @@
+.gnu_attribute 4,3
diff --git a/gas/testsuite/gas/mips/attr-gnu-4-3.d b/gas/testsuite/gas/mips/attr-gnu-4-3.d
new file mode 100644
index 0000000..ed0be23
--- /dev/null
+++ b/gas/testsuite/gas/mips/attr-gnu-4-3.d
@@ -0,0 +1,23 @@
+#as: -msoft-float
+#source: attr-gnu-4-3.s
+#PROG: readelf
+#readelf: -A
+#name: MIPS gnu_attribute 4,3 (-msoft-float)
+
+Attribute Section: gnu
+File Attributes
+ Tag_GNU_MIPS_ABI_FP: Soft float
+
+MIPS ABI Flags Version: 0
+
+ISA: MIPS.*
+GPR size: .*
+CPR1 size: .*
+CPR2 size: 0
+FP ABI: Soft float
+ISA Extension: .*
+ASEs:
+#...
+FLAGS 1: 0000000.
+FLAGS 2: 00000000
+
diff --git a/gas/testsuite/gas/mips/attr-gnu-4-3.s b/gas/testsuite/gas/mips/attr-gnu-4-3.s
new file mode 100644
index 0000000..32e5f5d
--- /dev/null
+++ b/gas/testsuite/gas/mips/attr-gnu-4-3.s
@@ -0,0 +1 @@
+.gnu_attribute 4,3
diff --git a/gas/testsuite/gas/mips/attr-gnu-4-4.l b/gas/testsuite/gas/mips/attr-gnu-4-4.l
new file mode 100644
index 0000000..c7d611d
--- /dev/null
+++ b/gas/testsuite/gas/mips/attr-gnu-4-4.l
@@ -0,0 +1,2 @@
+.*: Assembler messages:
+.*: Warning: .gnu_attribute 4,4 is no longer supported
diff --git a/gas/testsuite/gas/mips/attr-gnu-4-4.s b/gas/testsuite/gas/mips/attr-gnu-4-4.s
new file mode 100644
index 0000000..3ff129a
--- /dev/null
+++ b/gas/testsuite/gas/mips/attr-gnu-4-4.s
@@ -0,0 +1 @@
+.gnu_attribute 4,4
diff --git a/gas/testsuite/gas/mips/attr-gnu-4-5-64.l b/gas/testsuite/gas/mips/attr-gnu-4-5-64.l
new file mode 100644
index 0000000..26c187b
--- /dev/null
+++ b/gas/testsuite/gas/mips/attr-gnu-4-5-64.l
@@ -0,0 +1,2 @@
+.*: Assembler messages:
+.*: Warning: .gnu_attribute 4,5 requires `-mabi=32'
diff --git a/gas/testsuite/gas/mips/attr-gnu-4-5-64.s b/gas/testsuite/gas/mips/attr-gnu-4-5-64.s
new file mode 100644
index 0000000..b21ec3b
--- /dev/null
+++ b/gas/testsuite/gas/mips/attr-gnu-4-5-64.s
@@ -0,0 +1 @@
+.gnu_attribute 4,5
diff --git a/gas/testsuite/gas/mips/attr-gnu-4-5.d b/gas/testsuite/gas/mips/attr-gnu-4-5.d
new file mode 100644
index 0000000..e6eb677
--- /dev/null
+++ b/gas/testsuite/gas/mips/attr-gnu-4-5.d
@@ -0,0 +1,23 @@
+#as: -32 -mfpxx
+#source: attr-gnu-4-5.s
+#PROG: readelf
+#readelf: -A
+#name: MIPS gnu_attribute 4,5 (-mfpxx)
+
+Attribute Section: gnu
+File Attributes
+ Tag_GNU_MIPS_ABI_FP: Hard float \(32-bit CPU, Any FPU\)
+
+MIPS ABI Flags Version: 0
+
+ISA: MIPS.*
+GPR size: 32
+CPR1 size: 32
+CPR2 size: 0
+FP ABI: Hard float \(32-bit CPU, Any FPU\)
+ISA Extension: .*
+ASEs:
+ None
+FLAGS 1: 0000000.
+FLAGS 2: 00000000
+
diff --git a/gas/testsuite/gas/mips/attr-gnu-4-5.l b/gas/testsuite/gas/mips/attr-gnu-4-5.l
new file mode 100644
index 0000000..018d692
--- /dev/null
+++ b/gas/testsuite/gas/mips/attr-gnu-4-5.l
@@ -0,0 +1,2 @@
+.*: Assembler messages:
+.*: Warning: .gnu_attribute 4,5 requires `fp=xx'
diff --git a/gas/testsuite/gas/mips/attr-gnu-4-5.s b/gas/testsuite/gas/mips/attr-gnu-4-5.s
new file mode 100644
index 0000000..b21ec3b
--- /dev/null
+++ b/gas/testsuite/gas/mips/attr-gnu-4-5.s
@@ -0,0 +1 @@
+.gnu_attribute 4,5
diff --git a/gas/testsuite/gas/mips/attr-gnu-4-6-64.l b/gas/testsuite/gas/mips/attr-gnu-4-6-64.l
new file mode 100644
index 0000000..fa1764e
--- /dev/null
+++ b/gas/testsuite/gas/mips/attr-gnu-4-6-64.l
@@ -0,0 +1,2 @@
+.*: Assembler messages:
+.*: Warning: .gnu_attribute 4,6 requires `-mabi=32'
diff --git a/gas/testsuite/gas/mips/attr-gnu-4-6-64.s b/gas/testsuite/gas/mips/attr-gnu-4-6-64.s
new file mode 100644
index 0000000..96ace49
--- /dev/null
+++ b/gas/testsuite/gas/mips/attr-gnu-4-6-64.s
@@ -0,0 +1 @@
+.gnu_attribute 4,6
diff --git a/gas/testsuite/gas/mips/attr-gnu-4-6-msingle-float.l b/gas/testsuite/gas/mips/attr-gnu-4-6-msingle-float.l
new file mode 100644
index 0000000..999b5e2
--- /dev/null
+++ b/gas/testsuite/gas/mips/attr-gnu-4-6-msingle-float.l
@@ -0,0 +1,2 @@
+.*: Assembler messages:
+.*: Warning: .gnu_attribute 4,6 is incompatible with `fp=32'
diff --git a/gas/testsuite/gas/mips/attr-gnu-4-6-msingle-float.s b/gas/testsuite/gas/mips/attr-gnu-4-6-msingle-float.s
new file mode 100644
index 0000000..96ace49
--- /dev/null
+++ b/gas/testsuite/gas/mips/attr-gnu-4-6-msingle-float.s
@@ -0,0 +1 @@
+.gnu_attribute 4,6
diff --git a/gas/testsuite/gas/mips/attr-gnu-4-6-msoft-float.l b/gas/testsuite/gas/mips/attr-gnu-4-6-msoft-float.l
new file mode 100644
index 0000000..999b5e2
--- /dev/null
+++ b/gas/testsuite/gas/mips/attr-gnu-4-6-msoft-float.l
@@ -0,0 +1,2 @@
+.*: Assembler messages:
+.*: Warning: .gnu_attribute 4,6 is incompatible with `fp=32'
diff --git a/gas/testsuite/gas/mips/attr-gnu-4-6-msoft-float.s b/gas/testsuite/gas/mips/attr-gnu-4-6-msoft-float.s
new file mode 100644
index 0000000..96ace49
--- /dev/null
+++ b/gas/testsuite/gas/mips/attr-gnu-4-6-msoft-float.s
@@ -0,0 +1 @@
+.gnu_attribute 4,6
diff --git a/gas/testsuite/gas/mips/attr-gnu-4-6-noodd.l b/gas/testsuite/gas/mips/attr-gnu-4-6-noodd.l
new file mode 100644
index 0000000..e885317
--- /dev/null
+++ b/gas/testsuite/gas/mips/attr-gnu-4-6-noodd.l
@@ -0,0 +1,2 @@
+.*: Assembler messages:
+.*: Warning: .gnu_attribute 4,6 is incompatible with `nooddspreg'
diff --git a/gas/testsuite/gas/mips/attr-gnu-4-6-noodd.s b/gas/testsuite/gas/mips/attr-gnu-4-6-noodd.s
new file mode 100644
index 0000000..96ace49
--- /dev/null
+++ b/gas/testsuite/gas/mips/attr-gnu-4-6-noodd.s
@@ -0,0 +1 @@
+.gnu_attribute 4,6
diff --git a/gas/testsuite/gas/mips/attr-gnu-4-6.d b/gas/testsuite/gas/mips/attr-gnu-4-6.d
new file mode 100644
index 0000000..5df111f
--- /dev/null
+++ b/gas/testsuite/gas/mips/attr-gnu-4-6.d
@@ -0,0 +1,23 @@
+#as: -32
+#source: attr-gnu-4-6.s
+#PROG: readelf
+#readelf: -A
+#name: MIPS gnu_attribute 4,6 (-mfp64)
+
+Attribute Section: gnu
+File Attributes
+ Tag_GNU_MIPS_ABI_FP: Hard float \(32-bit CPU, 64-bit FPU\)
+
+MIPS ABI Flags Version: 0
+
+ISA: MIPS.*
+GPR size: 32
+CPR1 size: .*
+CPR2 size: 0
+FP ABI: Hard float \(32-bit CPU, 64-bit FPU\)
+ISA Extension: .*
+ASEs:
+ None
+FLAGS 1: 00000001
+FLAGS 2: 00000000
+
diff --git a/gas/testsuite/gas/mips/attr-gnu-4-6.l b/gas/testsuite/gas/mips/attr-gnu-4-6.l
new file mode 100644
index 0000000..f8f1733
--- /dev/null
+++ b/gas/testsuite/gas/mips/attr-gnu-4-6.l
@@ -0,0 +1,2 @@
+.*: Assembler messages:
+.*: Warning: .gnu_attribute 4,6 requires `fp=64'
diff --git a/gas/testsuite/gas/mips/attr-gnu-4-6.s b/gas/testsuite/gas/mips/attr-gnu-4-6.s
new file mode 100644
index 0000000..96ace49
--- /dev/null
+++ b/gas/testsuite/gas/mips/attr-gnu-4-6.s
@@ -0,0 +1 @@
+.gnu_attribute 4,6
diff --git a/gas/testsuite/gas/mips/attr-gnu-4-7-64.l b/gas/testsuite/gas/mips/attr-gnu-4-7-64.l
new file mode 100644
index 0000000..53b914e
--- /dev/null
+++ b/gas/testsuite/gas/mips/attr-gnu-4-7-64.l
@@ -0,0 +1,2 @@
+.*: Assembler messages:
+.*: Warning: .gnu_attribute 4,7 requires `-mabi=32'
diff --git a/gas/testsuite/gas/mips/attr-gnu-4-7-64.s b/gas/testsuite/gas/mips/attr-gnu-4-7-64.s
new file mode 100644
index 0000000..0ab9aea
--- /dev/null
+++ b/gas/testsuite/gas/mips/attr-gnu-4-7-64.s
@@ -0,0 +1 @@
+.gnu_attribute 4,7
diff --git a/gas/testsuite/gas/mips/attr-gnu-4-7-msingle-float.l b/gas/testsuite/gas/mips/attr-gnu-4-7-msingle-float.l
new file mode 100644
index 0000000..999b5e2
--- /dev/null
+++ b/gas/testsuite/gas/mips/attr-gnu-4-7-msingle-float.l
@@ -0,0 +1,2 @@
+.*: Assembler messages:
+.*: Warning: .gnu_attribute 4,6 is incompatible with `fp=32'
diff --git a/gas/testsuite/gas/mips/attr-gnu-4-7-msingle-float.s b/gas/testsuite/gas/mips/attr-gnu-4-7-msingle-float.s
new file mode 100644
index 0000000..96ace49
--- /dev/null
+++ b/gas/testsuite/gas/mips/attr-gnu-4-7-msingle-float.s
@@ -0,0 +1 @@
+.gnu_attribute 4,6
diff --git a/gas/testsuite/gas/mips/attr-gnu-4-7-msoft-float.l b/gas/testsuite/gas/mips/attr-gnu-4-7-msoft-float.l
new file mode 100644
index 0000000..999b5e2
--- /dev/null
+++ b/gas/testsuite/gas/mips/attr-gnu-4-7-msoft-float.l
@@ -0,0 +1,2 @@
+.*: Assembler messages:
+.*: Warning: .gnu_attribute 4,6 is incompatible with `fp=32'
diff --git a/gas/testsuite/gas/mips/attr-gnu-4-7-msoft-float.s b/gas/testsuite/gas/mips/attr-gnu-4-7-msoft-float.s
new file mode 100644
index 0000000..96ace49
--- /dev/null
+++ b/gas/testsuite/gas/mips/attr-gnu-4-7-msoft-float.s
@@ -0,0 +1 @@
+.gnu_attribute 4,6
diff --git a/gas/testsuite/gas/mips/attr-gnu-4-7-odd.l b/gas/testsuite/gas/mips/attr-gnu-4-7-odd.l
new file mode 100644
index 0000000..cb4f739
--- /dev/null
+++ b/gas/testsuite/gas/mips/attr-gnu-4-7-odd.l
@@ -0,0 +1,2 @@
+.*: Assembler messages:
+.*: Warning: .gnu_attribute 4,7 requires `nooddspreg'
diff --git a/gas/testsuite/gas/mips/attr-gnu-4-7-odd.s b/gas/testsuite/gas/mips/attr-gnu-4-7-odd.s
new file mode 100644
index 0000000..0ab9aea
--- /dev/null
+++ b/gas/testsuite/gas/mips/attr-gnu-4-7-odd.s
@@ -0,0 +1 @@
+.gnu_attribute 4,7
diff --git a/gas/testsuite/gas/mips/attr-gnu-4-7.d b/gas/testsuite/gas/mips/attr-gnu-4-7.d
new file mode 100644
index 0000000..b453218
--- /dev/null
+++ b/gas/testsuite/gas/mips/attr-gnu-4-7.d
@@ -0,0 +1,23 @@
+#as: -32
+#source: attr-gnu-4-7.s
+#PROG: readelf
+#readelf: -A
+#name: MIPS gnu_attribute 4,7 (-mfp64 -mno-odd-spreg)
+
+Attribute Section: gnu
+File Attributes
+ Tag_GNU_MIPS_ABI_FP: Hard float compat \(32-bit CPU, 64-bit FPU\)
+
+MIPS ABI Flags Version: 0
+
+ISA: MIPS.*
+GPR size: 32
+CPR1 size: .*
+CPR2 size: 0
+FP ABI: Hard float compat \(32-bit CPU, 64-bit FPU\)
+ISA Extension: .*
+ASEs:
+ None
+FLAGS 1: 00000000
+FLAGS 2: 00000000
+
diff --git a/gas/testsuite/gas/mips/attr-gnu-4-7.l b/gas/testsuite/gas/mips/attr-gnu-4-7.l
new file mode 100644
index 0000000..e3abfb5
--- /dev/null
+++ b/gas/testsuite/gas/mips/attr-gnu-4-7.l
@@ -0,0 +1,2 @@
+.*: Assembler messages:
+.*: Warning: .gnu_attribute 4,7 requires `fp=64'
diff --git a/gas/testsuite/gas/mips/attr-gnu-4-7.s b/gas/testsuite/gas/mips/attr-gnu-4-7.s
new file mode 100644
index 0000000..0ab9aea
--- /dev/null
+++ b/gas/testsuite/gas/mips/attr-gnu-4-7.s
@@ -0,0 +1 @@
+.gnu_attribute 4,7
diff --git a/gas/testsuite/gas/mips/attr-gnu-abi-fp-1.d b/gas/testsuite/gas/mips/attr-gnu-abi-fp-1.d
index 63eaf8d..ce5bbc2 100644
--- a/gas/testsuite/gas/mips/attr-gnu-abi-fp-1.d
+++ b/gas/testsuite/gas/mips/attr-gnu-abi-fp-1.d
@@ -6,3 +6,17 @@
Attribute Section: gnu
File Attributes
Tag_GNU_MIPS_ABI_FP: Hard float \(double precision\)
+
+MIPS ABI Flags Version: 0
+
+ISA: MIPS1
+GPR size: 32
+CPR1 size: 32
+CPR2 size: 0
+FP ABI: Hard float \(double precision\)
+ISA Extension: None
+ASEs:
+ None
+FLAGS 1: 00000000
+FLAGS 2: 00000000
+
diff --git a/gas/testsuite/gas/mips/attr-gnu-abi-msa-1.d b/gas/testsuite/gas/mips/attr-gnu-abi-msa-1.d
index 4720029..97fc8bf 100644
--- a/gas/testsuite/gas/mips/attr-gnu-abi-msa-1.d
+++ b/gas/testsuite/gas/mips/attr-gnu-abi-msa-1.d
@@ -4,4 +4,7 @@
Attribute Section: gnu
File Attributes
+ Tag_GNU_MIPS_ABI_FP: Hard float \(double precision\)
Tag_GNU_MIPS_ABI_MSA: 128-bit MSA
+
+#...
diff --git a/gas/testsuite/gas/mips/attr-none-double.d b/gas/testsuite/gas/mips/attr-none-double.d
new file mode 100644
index 0000000..639bb53
--- /dev/null
+++ b/gas/testsuite/gas/mips/attr-none-double.d
@@ -0,0 +1,22 @@
+#PROG: readelf
+#source: empty.s
+#readelf: -A
+#name: MIPS infer fpabi (double-precision)
+
+Attribute Section: gnu
+File Attributes
+ Tag_GNU_MIPS_ABI_FP: Hard float \(double precision\)
+
+MIPS ABI Flags Version: 0
+
+ISA: MIPS.*
+GPR size: .*
+CPR1 size: .*
+CPR2 size: 0
+FP ABI: Hard float \(double precision\)
+ISA Extension: .*
+ASEs:
+#...
+FLAGS 1: 0000000.
+FLAGS 2: 00000000
+
diff --git a/gas/testsuite/gas/mips/attr-none-o32-fp64-nooddspreg.d b/gas/testsuite/gas/mips/attr-none-o32-fp64-nooddspreg.d
new file mode 100644
index 0000000..d122268
--- /dev/null
+++ b/gas/testsuite/gas/mips/attr-none-o32-fp64-nooddspreg.d
@@ -0,0 +1,23 @@
+#as: -mfp64 -mno-odd-spreg -32
+#source: empty.s
+#PROG: readelf
+#readelf: -A
+#name: MIPS infer fpabi (O32 fp64 nooddspreg)
+
+Attribute Section: gnu
+File Attributes
+ Tag_GNU_MIPS_ABI_FP: Hard float compat \(32-bit CPU, 64-bit FPU\)
+
+MIPS ABI Flags Version: 0
+
+ISA: MIPS.*
+GPR size: 32
+CPR1 size: 64
+CPR2 size: 0
+FP ABI: Hard float compat \(32-bit CPU, 64-bit FPU\)
+ISA Extension: .*
+ASEs:
+ None
+FLAGS 1: 00000000
+FLAGS 2: 00000000
+
diff --git a/gas/testsuite/gas/mips/attr-none-o32-fp64.d b/gas/testsuite/gas/mips/attr-none-o32-fp64.d
new file mode 100644
index 0000000..1f5abd2
--- /dev/null
+++ b/gas/testsuite/gas/mips/attr-none-o32-fp64.d
@@ -0,0 +1,23 @@
+#as: -mfp64 -32
+#source: empty.s
+#PROG: readelf
+#readelf: -A
+#name: MIPS infer fpabi (O32 fp64)
+
+Attribute Section: gnu
+File Attributes
+ Tag_GNU_MIPS_ABI_FP: Hard float \(32-bit CPU, 64-bit FPU\)
+
+MIPS ABI Flags Version: 0
+
+ISA: MIPS.*
+GPR size: 32
+CPR1 size: 64
+CPR2 size: 0
+FP ABI: Hard float \(32-bit CPU, 64-bit FPU\)
+ISA Extension: .*
+ASEs:
+ None
+FLAGS 1: 00000001
+FLAGS 2: 00000000
+
diff --git a/gas/testsuite/gas/mips/attr-none-o32-fpxx.d b/gas/testsuite/gas/mips/attr-none-o32-fpxx.d
new file mode 100644
index 0000000..1e440bd
--- /dev/null
+++ b/gas/testsuite/gas/mips/attr-none-o32-fpxx.d
@@ -0,0 +1,23 @@
+#as: -mfpxx -32
+#source: empty.s
+#PROG: readelf
+#readelf: -A
+#name: MIPS infer fpabi (O32 fpxx)
+
+Attribute Section: gnu
+File Attributes
+ Tag_GNU_MIPS_ABI_FP: Hard float \(32-bit CPU, Any FPU\)
+
+MIPS ABI Flags Version: 0
+
+ISA: MIPS.*
+GPR size: 32
+CPR1 size: 32
+CPR2 size: 0
+FP ABI: Hard float \(32-bit CPU, Any FPU\)
+ISA Extension: .*
+ASEs:
+ None
+FLAGS 1: 0000000.
+FLAGS 2: 00000000
+
diff --git a/gas/testsuite/gas/mips/attr-none-single-float.d b/gas/testsuite/gas/mips/attr-none-single-float.d
new file mode 100644
index 0000000..9c03a51
--- /dev/null
+++ b/gas/testsuite/gas/mips/attr-none-single-float.d
@@ -0,0 +1,23 @@
+#as: -msingle-float
+#PROG: readelf
+#source: empty.s
+#readelf: -A
+#name: MIPS infer fpabi (single-precision)
+
+Attribute Section: gnu
+File Attributes
+ Tag_GNU_MIPS_ABI_FP: Hard float \(single precision\)
+
+MIPS ABI Flags Version: 0
+
+ISA: MIPS.*
+GPR size: .*
+CPR1 size: .*
+CPR2 size: 0
+FP ABI: Hard float \(single precision\)
+ISA Extension: .*
+ASEs:
+#...
+FLAGS 1: 0000000.
+FLAGS 2: 00000000
+
diff --git a/gas/testsuite/gas/mips/attr-none-soft-float.d b/gas/testsuite/gas/mips/attr-none-soft-float.d
new file mode 100644
index 0000000..0b4cf7a
--- /dev/null
+++ b/gas/testsuite/gas/mips/attr-none-soft-float.d
@@ -0,0 +1,23 @@
+#as: -msoft-float
+#PROG: readelf
+#source: empty.s
+#readelf: -A
+#name: MIPS infer fpabi (soft-precision)
+
+Attribute Section: gnu
+File Attributes
+ Tag_GNU_MIPS_ABI_FP: Soft float
+
+MIPS ABI Flags Version: 0
+
+ISA: MIPS.*
+GPR size: .*
+CPR1 size: 0
+CPR2 size: 0
+FP ABI: Soft float
+ISA Extension: .*
+ASEs:
+#...
+FLAGS 1: 0000000.
+FLAGS 2: 00000000
+
diff --git a/gas/testsuite/gas/mips/call-nonpic-1.d b/gas/testsuite/gas/mips/call-nonpic-1.d
index 61d2b09..cd1b442 100644
--- a/gas/testsuite/gas/mips/call-nonpic-1.d
+++ b/gas/testsuite/gas/mips/call-nonpic-1.d
@@ -4,6 +4,19 @@
.*
private flags = 10001004: .*
+MIPS ABI Flags Version: 0
+
+ISA: MIPS2
+GPR size: 32
+CPR1 size: 32
+CPR2 size: 0
+FP ABI: Hard float \(double precision\)
+ISA Extension: None
+ASEs:
+ None
+FLAGS 1: 00000000
+FLAGS 2: 00000000
+
Disassembly of section \.text:
diff --git a/gas/testsuite/gas/mips/elf_arch_mips1.d b/gas/testsuite/gas/mips/elf_arch_mips1.d
index a7af692..3a3da16 100644
--- a/gas/testsuite/gas/mips/elf_arch_mips1.d
+++ b/gas/testsuite/gas/mips/elf_arch_mips1.d
@@ -8,3 +8,16 @@
# flags are _not_ 8 chars long.
private flags = (.......|......|.....|....|...|..|.): .*\[mips1\].*
+MIPS ABI Flags Version: 0
+
+ISA: MIPS1
+GPR size: 32
+CPR1 size: 32
+CPR2 size: 0
+FP ABI: Hard float \(double precision\)
+ISA Extension: None
+ASEs:
+ None
+FLAGS 1: 00000000
+FLAGS 2: 00000000
+
diff --git a/gas/testsuite/gas/mips/elf_arch_mips2.d b/gas/testsuite/gas/mips/elf_arch_mips2.d
index c2c0c54..db8baf5 100644
--- a/gas/testsuite/gas/mips/elf_arch_mips2.d
+++ b/gas/testsuite/gas/mips/elf_arch_mips2.d
@@ -6,3 +6,16 @@
.*:.*file format.*elf.*mips.*
private flags = 1.......: .*\[mips2\].*
+MIPS ABI Flags Version: 0
+
+ISA: MIPS2
+GPR size: 32
+CPR1 size: 32
+CPR2 size: 0
+FP ABI: Hard float \(double precision\)
+ISA Extension: None
+ASEs:
+ None
+FLAGS 1: 00000000
+FLAGS 2: 00000000
+
diff --git a/gas/testsuite/gas/mips/elf_arch_mips3.d b/gas/testsuite/gas/mips/elf_arch_mips3.d
index cf42635..1ff003c 100644
--- a/gas/testsuite/gas/mips/elf_arch_mips3.d
+++ b/gas/testsuite/gas/mips/elf_arch_mips3.d
@@ -6,3 +6,16 @@
.*:.*file format.*elf.*mips.*
private flags = 2.......: .*\[mips3\].*
+MIPS ABI Flags Version: 0
+
+ISA: MIPS3
+GPR size: 32
+CPR1 size: 32
+CPR2 size: 0
+FP ABI: Hard float \(double precision\)
+ISA Extension: None
+ASEs:
+ None
+FLAGS 1: 00000000
+FLAGS 2: 00000000
+
diff --git a/gas/testsuite/gas/mips/elf_arch_mips32.d b/gas/testsuite/gas/mips/elf_arch_mips32.d
index 0c4bc93..922e803 100644
--- a/gas/testsuite/gas/mips/elf_arch_mips32.d
+++ b/gas/testsuite/gas/mips/elf_arch_mips32.d
@@ -6,3 +6,16 @@
.*:.*file format.*elf.*mips.*
private flags = 5.......: .*\[mips32\].*
+MIPS ABI Flags Version: 0
+
+ISA: MIPS32
+GPR size: 32
+CPR1 size: 32
+CPR2 size: 0
+FP ABI: Hard float \(double precision\)
+ISA Extension: None
+ASEs:
+ None
+FLAGS 1: 0000000.
+FLAGS 2: 00000000
+
diff --git a/gas/testsuite/gas/mips/elf_arch_mips32r2.d b/gas/testsuite/gas/mips/elf_arch_mips32r2.d
index b0044ba..aa30299 100644
--- a/gas/testsuite/gas/mips/elf_arch_mips32r2.d
+++ b/gas/testsuite/gas/mips/elf_arch_mips32r2.d
@@ -6,3 +6,16 @@
.*:.*file format.*elf.*mips.*
private flags = 7.......: .*\[mips32r2\].*
+MIPS ABI Flags Version: 0
+
+ISA: MIPS32r2
+GPR size: 32
+CPR1 size: 32
+CPR2 size: 0
+FP ABI: Hard float \(double precision\)
+ISA Extension: None
+ASEs:
+ None
+FLAGS 1: 0000000.
+FLAGS 2: 00000000
+
diff --git a/gas/testsuite/gas/mips/elf_arch_mips32r3.d b/gas/testsuite/gas/mips/elf_arch_mips32r3.d
new file mode 100644
index 0000000..0b43353
--- /dev/null
+++ b/gas/testsuite/gas/mips/elf_arch_mips32r3.d
@@ -0,0 +1,21 @@
+# name: ELF MIPS32r3 markings
+# source: empty.s
+# objdump: -p
+# as: -32 -march=mips32r3
+
+.*:.*file format.*elf.*mips.*
+private flags = 7.......: .*\[mips32r2\].*
+
+MIPS ABI Flags Version: 0
+
+ISA: MIPS32r3
+GPR size: 32
+CPR1 size: 32
+CPR2 size: 0
+FP ABI: Hard float \(double precision\)
+ISA Extension: None
+ASEs:
+ None
+FLAGS 1: 0000000.
+FLAGS 2: 00000000
+
diff --git a/gas/testsuite/gas/mips/elf_arch_mips32r5.d b/gas/testsuite/gas/mips/elf_arch_mips32r5.d
new file mode 100644
index 0000000..1da7b13
--- /dev/null
+++ b/gas/testsuite/gas/mips/elf_arch_mips32r5.d
@@ -0,0 +1,21 @@
+# name: ELF MIPS32r5 markings
+# source: empty.s
+# objdump: -p
+# as: -32 -march=mips32r5
+
+.*:.*file format.*elf.*mips.*
+private flags = 7.......: .*\[mips32r2\].*
+
+MIPS ABI Flags Version: 0
+
+ISA: MIPS32r5
+GPR size: 32
+CPR1 size: 32
+CPR2 size: 0
+FP ABI: Hard float \(double precision\)
+ISA Extension: None
+ASEs:
+ None
+FLAGS 1: 0000000.
+FLAGS 2: 00000000
+
diff --git a/gas/testsuite/gas/mips/elf_arch_mips4.d b/gas/testsuite/gas/mips/elf_arch_mips4.d
index d465582..d550e14 100644
--- a/gas/testsuite/gas/mips/elf_arch_mips4.d
+++ b/gas/testsuite/gas/mips/elf_arch_mips4.d
@@ -6,3 +6,16 @@
.*:.*file format.*elf.*mips.*
private flags = 3.......: .*\[mips4\].*
+MIPS ABI Flags Version: 0
+
+ISA: MIPS4
+GPR size: 32
+CPR1 size: 32
+CPR2 size: 0
+FP ABI: Hard float \(double precision\)
+ISA Extension: None
+ASEs:
+ None
+FLAGS 1: 00000000
+FLAGS 2: 00000000
+
diff --git a/gas/testsuite/gas/mips/elf_arch_mips5.d b/gas/testsuite/gas/mips/elf_arch_mips5.d
index 39327ae..31a0f18 100644
--- a/gas/testsuite/gas/mips/elf_arch_mips5.d
+++ b/gas/testsuite/gas/mips/elf_arch_mips5.d
@@ -6,3 +6,16 @@
.*:.*file format.*elf.*mips.*
private flags = 4.......: .*\[mips5\].*
+MIPS ABI Flags Version: 0
+
+ISA: MIPS5
+GPR size: 32
+CPR1 size: 32
+CPR2 size: 0
+FP ABI: Hard float \(double precision\)
+ISA Extension: None
+ASEs:
+ None
+FLAGS 1: 00000000
+FLAGS 2: 00000000
+
diff --git a/gas/testsuite/gas/mips/elf_arch_mips64.d b/gas/testsuite/gas/mips/elf_arch_mips64.d
index c3aea0f..25277b3 100644
--- a/gas/testsuite/gas/mips/elf_arch_mips64.d
+++ b/gas/testsuite/gas/mips/elf_arch_mips64.d
@@ -6,3 +6,16 @@
.*:.*file format.*elf.*mips.*
private flags = 6.......: .*\[mips64\].*
+MIPS ABI Flags Version: 0
+
+ISA: MIPS64
+GPR size: 32
+CPR1 size: 32
+CPR2 size: 0
+FP ABI: Hard float \(double precision\)
+ISA Extension: None
+ASEs:
+ None
+FLAGS 1: 0000000.
+FLAGS 2: 00000000
+
diff --git a/gas/testsuite/gas/mips/elf_arch_mips64r2.d b/gas/testsuite/gas/mips/elf_arch_mips64r2.d
index aa318ce..2f5063b 100644
--- a/gas/testsuite/gas/mips/elf_arch_mips64r2.d
+++ b/gas/testsuite/gas/mips/elf_arch_mips64r2.d
@@ -1,8 +1,21 @@
# name: ELF MIPS64r2 markings
# source: empty.s
# objdump: -p
-# as: -march=mips64r2
+# as: -32 -march=mips64r2
.*:.*file format.*elf.*mips.*
private flags = 8.......: .*\[mips64r2\].*
+MIPS ABI Flags Version: 0
+
+ISA: MIPS64r2
+GPR size: 32
+CPR1 size: 32
+CPR2 size: 0
+FP ABI: Hard float \(double precision\)
+ISA Extension: None
+ASEs:
+ None
+FLAGS 1: 0000000.
+FLAGS 2: 00000000
+
diff --git a/gas/testsuite/gas/mips/elf_arch_mips64r3.d b/gas/testsuite/gas/mips/elf_arch_mips64r3.d
new file mode 100644
index 0000000..5b74f2d
--- /dev/null
+++ b/gas/testsuite/gas/mips/elf_arch_mips64r3.d
@@ -0,0 +1,21 @@
+# name: ELF MIPS64r3 markings
+# source: empty.s
+# objdump: -p
+# as: -32 -march=mips64r3
+
+.*:.*file format.*elf.*mips.*
+private flags = 8.......: .*\[mips64r2\].*
+
+MIPS ABI Flags Version: 0
+
+ISA: MIPS64r3
+GPR size: 32
+CPR1 size: 32
+CPR2 size: 0
+FP ABI: Hard float \(double precision\)
+ISA Extension: None
+ASEs:
+ None
+FLAGS 1: 0000000.
+FLAGS 2: 00000000
+
diff --git a/gas/testsuite/gas/mips/elf_arch_mips64r5.d b/gas/testsuite/gas/mips/elf_arch_mips64r5.d
new file mode 100644
index 0000000..da4ee31
--- /dev/null
+++ b/gas/testsuite/gas/mips/elf_arch_mips64r5.d
@@ -0,0 +1,21 @@
+# name: ELF MIPS64r5 markings
+# source: empty.s
+# objdump: -p
+# as: -32 -march=mips64r5
+
+.*:.*file format.*elf.*mips.*
+private flags = 8.......: .*\[mips64r2\].*
+
+MIPS ABI Flags Version: 0
+
+ISA: MIPS64r5
+GPR size: 32
+CPR1 size: 32
+CPR2 size: 0
+FP ABI: Hard float \(double precision\)
+ISA Extension: None
+ASEs:
+ None
+FLAGS 1: 0000000.
+FLAGS 2: 00000000
+
diff --git a/gas/testsuite/gas/mips/elf_ase_micromips-2.d b/gas/testsuite/gas/mips/elf_ase_micromips-2.d
index 28b7f81..e600880 100644
--- a/gas/testsuite/gas/mips/elf_ase_micromips-2.d
+++ b/gas/testsuite/gas/mips/elf_ase_micromips-2.d
@@ -6,3 +6,16 @@
.*:.*file format.*mips.*
private flags = [0-9a-f]*[2367abef]......: .*[[,]micromips[],].*
+MIPS ABI Flags Version: 0
+
+ISA: MIPS.*
+GPR size: 32
+CPR1 size: 32
+CPR2 size: 0
+FP ABI: Hard float \(double precision\)
+ISA Extension: None
+ASEs:
+ MICROMIPS ASE
+FLAGS 1: 00000000
+FLAGS 2: 00000000
+
diff --git a/gas/testsuite/gas/mips/elf_ase_micromips.d b/gas/testsuite/gas/mips/elf_ase_micromips.d
index c748dfb..13bb65a 100644
--- a/gas/testsuite/gas/mips/elf_ase_micromips.d
+++ b/gas/testsuite/gas/mips/elf_ase_micromips.d
@@ -6,3 +6,16 @@
.*:.*file format.*mips.*
!private flags = .*micromips.*
+MIPS ABI Flags Version: 0
+
+ISA: MIPS.*
+GPR size: 32
+CPR1 size: 32
+CPR2 size: 0
+FP ABI: Hard float \(double precision\)
+ISA Extension: None
+ASEs:
+ None
+FLAGS 1: 00000000
+FLAGS 2: 00000000
+
diff --git a/gas/testsuite/gas/mips/elf_ase_mips16-2.d b/gas/testsuite/gas/mips/elf_ase_mips16-2.d
index 89b28b0..afd923c 100644
--- a/gas/testsuite/gas/mips/elf_ase_mips16-2.d
+++ b/gas/testsuite/gas/mips/elf_ase_mips16-2.d
@@ -6,3 +6,16 @@
.*:.*file format.*mips.*
private flags = [0-9a-f]*[4-7c-f]......: .*[[,]mips16[],].*
+MIPS ABI Flags Version: 0
+
+ISA: MIPS.*
+GPR size: 32
+CPR1 size: 32
+CPR2 size: 0
+FP ABI: Hard float \(double precision\)
+ISA Extension: None
+ASEs:
+ MIPS16 ASE
+FLAGS 1: 00000000
+FLAGS 2: 00000000
+
diff --git a/gas/testsuite/gas/mips/elf_ase_mips16.d b/gas/testsuite/gas/mips/elf_ase_mips16.d
index 89fbc5b..27135f1 100644
--- a/gas/testsuite/gas/mips/elf_ase_mips16.d
+++ b/gas/testsuite/gas/mips/elf_ase_mips16.d
@@ -6,3 +6,16 @@
.*:.*file format.*mips.*
!private flags = .*mips16.*
+MIPS ABI Flags Version: 0
+
+ISA: MIPS.*
+GPR size: 32
+CPR1 size: 32
+CPR2 size: 0
+FP ABI: Hard float \(double precision\)
+ISA Extension: None
+ASEs:
+ None
+FLAGS 1: 00000000
+FLAGS 2: 00000000
+
diff --git a/gas/testsuite/gas/mips/fpxx-oddfpreg.d b/gas/testsuite/gas/mips/fpxx-oddfpreg.d
new file mode 100644
index 0000000..b1fdc06
--- /dev/null
+++ b/gas/testsuite/gas/mips/fpxx-oddfpreg.d
@@ -0,0 +1,12 @@
+#as: -32 -mfpxx -modd-spreg
+#objdump: -d
+#name: FPXX with odd-singles test
+.*: file format .*
+
+Disassembly of section .text:
+
+[ 0-9a-f]+ <.text>:
+[ 0-9a-f]+: 44840800 mtc1 a0,\$f1
+[ 0-9a-f]+: 44040800 mfc1 a0,\$f1
+[ 0-9a-f]+: c4610000 lwc1 \$f1,0\(v1\)
+[ 0-9a-f]+: e4610000 swc1 \$f1,0\(v1\)
diff --git a/gas/testsuite/gas/mips/fpxx-oddfpreg.l b/gas/testsuite/gas/mips/fpxx-oddfpreg.l
new file mode 100644
index 0000000..f441b6f
--- /dev/null
+++ b/gas/testsuite/gas/mips/fpxx-oddfpreg.l
@@ -0,0 +1,5 @@
+.*: Assembler messages:
+.*:1: Error: float register should be even, was 1
+.*:2: Error: float register should be even, was 1
+.*:3: Error: float register should be even, was 1
+.*:4: Error: float register should be even, was 1
diff --git a/gas/testsuite/gas/mips/fpxx-oddfpreg.s b/gas/testsuite/gas/mips/fpxx-oddfpreg.s
new file mode 100644
index 0000000..2136619
--- /dev/null
+++ b/gas/testsuite/gas/mips/fpxx-oddfpreg.s
@@ -0,0 +1,4 @@
+mtc1 $4, $f1
+mfc1 $4, $f1
+lwc1 $f1, 0($3)
+swc1 $f1, 0($3)
diff --git a/gas/testsuite/gas/mips/li-d.d b/gas/testsuite/gas/mips/li-d.d
new file mode 100644
index 0000000..ca24570
--- /dev/null
+++ b/gas/testsuite/gas/mips/li-d.d
@@ -0,0 +1,31 @@
+#objdump: -d --prefix-addresses
+#as: -mips64r2
+#name: MIPS li.d
+#source: li-d.s
+
+# Test the li.d macro.
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> li v(0|1),0
+[0-9a-f]+ <[^>]*> move v(1|0),zero
+[0-9a-f]+ <[^>]*> li at,0
+[0-9a-f]+ <[^>]*> mtc1 at,\$f1
+[0-9a-f]+ <[^>]*> mtc1 zero,\$f0
+[0-9a-f]+ <[^>]*> li at,0
+[0-9a-f]+ <[^>]*> mtc1 at,\$f1
+[0-9a-f]+ <[^>]*> mtc1 zero,\$f0
+[0-9a-f]+ <[^>]*> ldc1 \$f0,0\(gp\)
+[0-9a-f]+ <[^>]*> li at,0
+[0-9a-f]+ <[^>]*> mthc1 at,\$f0
+[0-9a-f]+ <[^>]*> mtc1 zero,\$f0
+[0-9a-f]+ <[^>]*> li at,0
+[0-9a-f]+ <[^>]*> mthc1 at,\$f0
+[0-9a-f]+ <[^>]*> mtc1 zero,\$f0
+[0-9a-f]+ <[^>]*> li at,0
+[0-9a-f]+ <[^>]*> mthc1 at,\$f0
+[0-9a-f]+ <[^>]*> mtc1 zero,\$f0
+[0-9a-f]+ <[^>]*> li at,0
+[0-9a-f]+ <[^>]*> dmtc1 at,\$f0
+ \.\.\.
diff --git a/gas/testsuite/gas/mips/li-d.s b/gas/testsuite/gas/mips/li-d.s
new file mode 100644
index 0000000..8578097
--- /dev/null
+++ b/gas/testsuite/gas/mips/li-d.s
@@ -0,0 +1,24 @@
+# Source file used to test the li macro.
+
+foo:
+ .set mips1
+ .set fp=32
+ li.d $2, 0
+ li.d $f0, 0
+ .set mips2
+ li.d $f0, 0
+ .set fp=xx
+ li.d $f0, 0
+ .set mips32r2
+ .set fp=32
+ li.d $f0, 0
+ .set fp=xx
+ li.d $f0, 0
+ .set fp=64
+ li.d $f0, 0
+ .set mips3
+ li.d $f0, 0
+
+# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ...
+ .align 2
+ .space 8
diff --git a/gas/testsuite/gas/mips/micromips@mips1-fp.d b/gas/testsuite/gas/mips/micromips@mips1-fp.d
index 60e605f..7cfb2d8 100644
--- a/gas/testsuite/gas/mips/micromips@mips1-fp.d
+++ b/gas/testsuite/gas/mips/micromips@mips1-fp.d
@@ -8,5 +8,5 @@
Disassembly of section \.text:
[0-9a-f]+ <foo>:
[0-9a-f ]+: 5482 0030 add\.s \$f0,\$f2,\$f4
-[0-9a-f ]+: 5440 103b cfc1 \$2,\$0
+[0-9a-f ]+: 5440 203b mfc1 \$2,\$f0
#pass
diff --git a/gas/testsuite/gas/mips/mips.exp b/gas/testsuite/gas/mips/mips.exp
index c3135ca..ed63cdc 100644
--- a/gas/testsuite/gas/mips/mips.exp
+++ b/gas/testsuite/gas/mips/mips.exp
@@ -86,6 +86,10 @@
# nollsc
# The CPU doesn't support ll, sc, lld and scd instructions.
#
+# oddspreg
+# The CPU has odd-numbered single-precision registers
+# available and GAS enables use of them by default.
+#
# as_flags: The assembler flags used when assembling tests for this
# architecture.
#
@@ -452,19 +456,19 @@ mips_arch_create r4000 64 mips3 {} \
{ -march=r4000 -mtune=r4000 } { -mmips:4000 }
mips_arch_create vr5400 64 mips4 { ror } \
{ -march=vr5400 -mtune=vr5400 } { -mmips:5400 }
-mips_arch_create sb1 64 mips64 { mips3d } \
+mips_arch_create sb1 64 mips64 { mips3d oddspreg } \
{ -march=sb1 -mtune=sb1 } { -mmips:sb1 } \
{ mipsisa64sb1-*-* mipsisa64sb1el-*-* }
-mips_arch_create octeon 64 mips64r2 {} \
+mips_arch_create octeon 64 mips64r2 { oddspreg } \
{ -march=octeon -mtune=octeon } { -mmips:octeon } \
{ mips64octeon*-*-* }
-mips_arch_create octeonp 64 octeon {} \
+mips_arch_create octeonp 64 octeon { oddspreg } \
{ -march=octeon+ -mtune=octeon+ } { -mmips:octeon+ } \
{ }
-mips_arch_create octeon2 64 octeonp {} \
+mips_arch_create octeon2 64 octeonp { oddspreg } \
{ -march=octeon2 -mtune=octeon2 } { -mmips:octeon2 } \
{ }
-mips_arch_create xlr 64 mips64 {} \
+mips_arch_create xlr 64 mips64 { oddspreg } \
{ -march=xlr -mtune=xlr } { -mmips:xlr }
mips_arch_create r5900 64 mips3 { gpr_ilocks singlefloat nollsc } \
{ -march=r5900 -mtune=r5900 } { -mmips:5900 } \
@@ -824,8 +828,12 @@ if { [istarget mips*-*-vxworks*] } {
run_dump_test "elf_arch_mips5"
run_dump_test "elf_arch_mips32"
run_dump_test "elf_arch_mips32r2"
+ run_dump_test "elf_arch_mips32r3"
+ run_dump_test "elf_arch_mips32r5"
run_dump_test "elf_arch_mips64"
run_dump_test "elf_arch_mips64r2"
+ run_dump_test "elf_arch_mips64r3"
+ run_dump_test "elf_arch_mips64r5"
# Verify that ASE markings are handled properly.
run_dump_test "elf_ase_mips16"
@@ -1187,7 +1195,7 @@ if { [istarget mips*-*-vxworks*] } {
run_dump_test_arches "msa-branch" [mips_arch_list_matching mips32r2]
run_dump_test_arches "xpa" [mips_arch_list_matching mips32r2 !micromips]
- run_dump_test_arches "r5" [mips_arch_list_matching mips32r5 !micromips]
+ run_dump_test_arches "r5" "-32" [mips_arch_list_matching mips32r5 !micromips]
run_dump_test "pcrel-1"
run_dump_test "pcrel-2"
@@ -1198,10 +1206,192 @@ if { [istarget mips*-*-vxworks*] } {
run_dump_test "pcrel-4-64"
}
+ run_dump_test_arches "attr-gnu-4-0" "-32" \
+ [mips_arch_list_matching mips1]
+ run_dump_test_arches "attr-gnu-4-0" "-64" \
+ [mips_arch_list_matching mips3]
+ run_dump_test_arches "attr-gnu-4-0" "-mfp32 -32" \
+ [mips_arch_list_matching mips1]
+ run_dump_test_arches "attr-gnu-4-0" "-mfpxx -32" \
+ [mips_arch_list_matching mips2 !r5900]
+ run_dump_test_arches "attr-gnu-4-0" "-mfp64 -32" \
+ [mips_arch_list_matching mips32r2]
+ run_dump_test_arches "attr-gnu-4-0" "-mfp64 -mno-odd-spreg -32" \
+ [mips_arch_list_matching mips32r2]
+ run_dump_test_arches "attr-gnu-4-0" "-mfp64 -64" \
+ [mips_arch_list_matching mips3]
+ run_dump_test_arches "attr-gnu-4-0" "-msingle-float -32" \
+ [mips_arch_list_matching mips1]
+ run_dump_test_arches "attr-gnu-4-0" "-msingle-float -64" \
+ [mips_arch_list_matching mips3]
+ run_dump_test_arches "attr-gnu-4-0" "-msoft-float -32" \
+ [mips_arch_list_matching mips1]
+ run_dump_test_arches "attr-gnu-4-0" "-msoft-float -64" \
+ [mips_arch_list_matching mips3]
+ run_dump_test_arches "attr-none-double" "-32" \
+ [mips_arch_list_matching mips1]
+ run_dump_test_arches "attr-none-double" "-64" \
+ [mips_arch_list_matching mips3]
+ run_dump_test_arches "attr-none-o32-fpxx" \
+ [mips_arch_list_matching mips2 !r5900]
+ run_dump_test_arches "attr-none-o32-fp64" \
+ [mips_arch_list_matching mips32r2]
+ run_dump_test_arches "attr-none-o32-fp64-nooddspreg" \
+ [mips_arch_list_matching mips32r2]
+ run_dump_test_arches "attr-none-single-float" "-32" \
+ [mips_arch_list_matching mips1]
+ run_dump_test_arches "attr-none-single-float" "-64" \
+ [mips_arch_list_matching mips3]
+ run_dump_test_arches "attr-none-soft-float" "-32 -msoft-float" \
+ [mips_arch_list_matching mips1]
+ run_dump_test_arches "attr-none-soft-float" "-64 -msoft-float" \
+ [mips_arch_list_matching mips3]
+
+ run_list_test_arches "attr-gnu-4-1-mfp64" \
+ "-32 -mfp64 -mno-odd-spreg" \
+ [mips_arch_list_matching mips32r2]
+ run_list_test_arches "attr-gnu-4-1-mfp64" "-32 -mfp64" \
+ [mips_arch_list_matching mips32r2]
+ run_list_test_arches "attr-gnu-4-1-mfp32" "-64 -mfp32" \
+ [mips_arch_list_matching mips3]
+ run_list_test_arches "attr-gnu-4-1-msingle-float" "-32 -msingle-float" \
+ [mips_arch_list_matching mips1]
+ run_list_test_arches "attr-gnu-4-1-msoft-float" "-32 -msoft-float" \
+ [mips_arch_list_matching mips1]
+ run_dump_test_arches "attr-gnu-4-1" "-32 -mfpxx" \
+ [mips_arch_list_matching mips2 !r5900]
+ run_dump_test_arches "attr-gnu-4-1" "-32 -mfp32" \
+ [mips_arch_list_matching mips1]
+ run_dump_test_arches "attr-gnu-4-1" "-64 -mfp64" \
+ [mips_arch_list_matching mips3]
+
+ run_list_test_arches "attr-gnu-4-2-mdouble-float" "-32 -mfp32" \
+ [mips_arch_list_matching mips1]
+ run_list_test_arches "attr-gnu-4-2-mdouble-float" "-32 -mfpxx" \
+ [mips_arch_list_matching mips2 !r5900]
+ run_list_test_arches "attr-gnu-4-2-mdouble-float" "-32 -mfp64" \
+ [mips_arch_list_matching mips32r2]
+ run_list_test_arches "attr-gnu-4-2-mdouble-float" \
+ "-32 -mfp64 -mno-odd-spreg" \
+ [mips_arch_list_matching mips32r2]
+ run_list_test_arches "attr-gnu-4-2-mdouble-float" "-64 -mfp64" \
+ [mips_arch_list_matching mips3]
+ run_list_test_arches "attr-gnu-4-2-msoft-float" "-32 -msoft-float" \
+ [mips_arch_list_matching mips1]
+ run_dump_test_arches "attr-gnu-4-2" "-32" \
+ [mips_arch_list_matching mips1]
+ run_dump_test_arches "attr-gnu-4-2" "-64" \
+ [mips_arch_list_matching mips3]
+
+ run_list_test_arches "attr-gnu-4-3-mhard-float" "-32 -mfp32" \
+ [mips_arch_list_matching mips1]
+ run_list_test_arches "attr-gnu-4-3-mhard-float" "-32 -mfpxx" \
+ [mips_arch_list_matching mips2 !r5900]
+ run_list_test_arches "attr-gnu-4-3-mhard-float" "-32 -mfp64" \
+ [mips_arch_list_matching mips32r2]
+ run_list_test_arches "attr-gnu-4-3-mhard-float" \
+ "-32 -mfp64 -mno-odd-spreg" \
+ [mips_arch_list_matching mips32r2]
+ run_list_test_arches "attr-gnu-4-3-mhard-float" "-64 -mfp64" \
+ [mips_arch_list_matching mips3]
+ run_list_test_arches "attr-gnu-4-3-mhard-float" "-32 -msingle-float" \
+ [mips_arch_list_matching mips1]
+ run_dump_test_arches "attr-gnu-4-3" "-32" \
+ [mips_arch_list_matching mips1]
+ run_dump_test_arches "attr-gnu-4-3" "-64" \
+ [mips_arch_list_matching mips3]
+
+ run_list_test_arches "attr-gnu-4-4" "-32 -mfp32" \
+ [mips_arch_list_matching mips1]
+ run_list_test_arches "attr-gnu-4-4" "-32 -mfpxx" \
+ [mips_arch_list_matching mips2 !r5900]
+ run_list_test_arches "attr-gnu-4-4" "-32 -mfp64" \
+ [mips_arch_list_matching mips32r2]
+ run_list_test_arches "attr-gnu-4-4" "-32 -mfp64 -mno-odd-spreg" \
+ [mips_arch_list_matching mips32r2]
+ run_list_test_arches "attr-gnu-4-4" "-64 -mfp64" \
+ [mips_arch_list_matching mips3]
+ run_list_test_arches "attr-gnu-4-4" "-32 -msingle-float" \
+ [mips_arch_list_matching mips1]
+ run_list_test_arches "attr-gnu-4-4" "-32 -msoft-float" \
+ [mips_arch_list_matching mips1]
+
+ run_list_test_arches "attr-gnu-4-5" "-32 -mfp32" \
+ [mips_arch_list_matching mips1]
+ run_list_test_arches "attr-gnu-4-5" "-32 -mfp64" \
+ [mips_arch_list_matching mips32r2]
+ run_list_test_arches "attr-gnu-4-5" "-32 -mfp64 -mno-odd-spreg" \
+ [mips_arch_list_matching mips32r2]
+ run_list_test_arches "attr-gnu-4-5-64" "-64 -mfp64" \
+ [mips_arch_list_matching mips3]
+ run_list_test_arches "attr-gnu-4-5" "-32 -msingle-float" \
+ [mips_arch_list_matching mips1]
+ run_list_test_arches "attr-gnu-4-5" "-32 -msoft-float" \
+ [mips_arch_list_matching mips1]
+ run_dump_test_arches "attr-gnu-4-5" \
+ [mips_arch_list_matching mips2 !r5900]
+
+ run_list_test_arches "attr-gnu-4-6" "-32 -mfp32" \
+ [mips_arch_list_matching mips1]
+ run_list_test_arches "attr-gnu-4-6-noodd" "-32 -mfp64 -mno-odd-spreg" \
+ [mips_arch_list_matching mips32r2]
+ run_list_test_arches "attr-gnu-4-6-64" "-64 -mfp64" \
+ [mips_arch_list_matching mips3]
+ run_list_test_arches "attr-gnu-4-6" "-32 -msingle-float" \
+ [mips_arch_list_matching mips1]
+ run_list_test_arches "attr-gnu-4-6" "-32 -msoft-float" \
+ [mips_arch_list_matching mips1]
+ run_list_test_arches "attr-gnu-4-6" "-32 -mfpxx" \
+ [mips_arch_list_matching mips2 !r5900]
+ run_dump_test_arches "attr-gnu-4-6" "-32 -mfp64" \
+ [mips_arch_list_matching mips32r2]
+
+ run_list_test_arches "attr-gnu-4-7" "-32 -mfp32" \
+ [mips_arch_list_matching mips1]
+ run_list_test_arches "attr-gnu-4-7-odd" "-32 -mfp64" \
+ [mips_arch_list_matching mips32r2]
+ run_list_test_arches "attr-gnu-4-7-64" "-64 -mfp64" \
+ [mips_arch_list_matching mips3]
+ run_list_test_arches "attr-gnu-4-7" "-32 -msingle-float" \
+ [mips_arch_list_matching mips1]
+ run_list_test_arches "attr-gnu-4-7" "-32 -msoft-float" \
+ [mips_arch_list_matching mips1]
+ run_list_test_arches "attr-gnu-4-7" "-32 -mfpxx" \
+ [mips_arch_list_matching mips2 !r5900]
+ run_dump_test_arches "attr-gnu-4-7" "-32 -mfp64 -mno-odd-spreg" \
+ [mips_arch_list_matching mips32r2]
+
run_dump_test "attr-gnu-abi-fp-1"
run_dump_test "attr-gnu-abi-msa-1"
run_dump_test "module-override"
run_dump_test "module-defer-warn1"
- run_list_test "module-defer-warn2" -32
+ run_list_test "module-defer-warn2" "-32"
+
+ foreach testopt [list -mfp32 -mfpxx -mfp64 "-mfp64-noodd" \
+ -msingle-float -msoft-float] {
+ foreach cmdopt [list -mfp32 -mfpxx -mfp64 "-mfp64 -mno-odd-spreg" \
+ -msingle-float -msoft-float] {
+ run_dump_test "module${testopt}" \
+ [list [list as $cmdopt] [list name ($cmdopt)]]
+ }
+ }
+
+ run_dump_test "module-set-mfpxx"
+ run_list_test_arches "fpxx-oddfpreg" "-32 -mfpxx" \
+ [mips_arch_list_matching mips2 !singlefloat]
+ run_list_test_arches "fpxx-oddfpreg" "-32 -mfpxx -mno-odd-spreg" \
+ [mips_arch_list_matching mips2 !singlefloat]
+ run_dump_test_arches "fpxx-oddfpreg" \
+ [mips_arch_list_matching oddspreg]
+ run_dump_test_arches "odd-spreg" "-mfp32" [mips_arch_list_matching oddspreg]
+ run_dump_test_arches "odd-spreg" "-mfpxx" [mips_arch_list_matching oddspreg]
+ run_dump_test_arches "odd-spreg" "-mfp64" [mips_arch_list_matching mips32r2]
+ run_dump_test_arches "no-odd-spreg" "-mfp32" [mips_arch_list_matching mips1]
+ run_dump_test_arches "no-odd-spreg" "-mfpxx" [mips_arch_list_matching mips2 !r5900]
+ run_dump_test_arches "no-odd-spreg" "-mfp64" [mips_arch_list_matching mips32r2]
+ run_dump_test "module-check"
+ run_list_test "module-check-warn" "-32"
+
+ run_dump_test "li-d"
}
diff --git a/gas/testsuite/gas/mips/mips1-fp.d b/gas/testsuite/gas/mips/mips1-fp.d
index 1ab89ca..2aa229b 100644
--- a/gas/testsuite/gas/mips/mips1-fp.d
+++ b/gas/testsuite/gas/mips/mips1-fp.d
@@ -8,5 +8,5 @@ Disassembly of section .text:
[0-9a-f]+ <.*>:
.*: 46041000 add.s \$f0,\$f2,\$f4
-.*: 44420000 cfc1 \$2,\$0
+.*: 44020000 mfc1 \$2,\$f0
#pass
diff --git a/gas/testsuite/gas/mips/mips1-fp.l b/gas/testsuite/gas/mips/mips1-fp.l
index 72ed043..7526e2f 100644
--- a/gas/testsuite/gas/mips/mips1-fp.l
+++ b/gas/testsuite/gas/mips/mips1-fp.l
@@ -1,3 +1,3 @@
.*: Assembler messages:
.*:6: Error: opcode not supported on this processor: .* \(.*\) `add.s \$f0,\$f2,\$f4'
-.*:7: Error: opcode not supported on this processor: .* \(.*\) `cfc1 \$2,\$0'
+.*:7: Error: opcode not supported on this processor: .* \(.*\) `mfc1 \$2,\$f0'
diff --git a/gas/testsuite/gas/mips/mips1-fp.s b/gas/testsuite/gas/mips/mips1-fp.s
index 0c71761..5509ddb 100644
--- a/gas/testsuite/gas/mips/mips1-fp.s
+++ b/gas/testsuite/gas/mips/mips1-fp.s
@@ -4,4 +4,4 @@
foo:
add.s $f0,$f2,$f4
- cfc1 $2,$0
+ mfc1 $2,$f0
diff --git a/gas/testsuite/gas/mips/module-check-warn.l b/gas/testsuite/gas/mips/module-check-warn.l
new file mode 100644
index 0000000..2670b91
--- /dev/null
+++ b/gas/testsuite/gas/mips/module-check-warn.l
@@ -0,0 +1,5 @@
+.*: Assembler messages:
+.*:3: Error: `fp=64' used with a 32-bit fpu
+.*:3: Warning: float register should be even, was 1
+.*:3: Warning: float register should be even, was 1
+.*:3: Warning: float register should be even, was 1
diff --git a/gas/testsuite/gas/mips/module-check-warn.s b/gas/testsuite/gas/mips/module-check-warn.s
new file mode 100644
index 0000000..ee5c3f0
--- /dev/null
+++ b/gas/testsuite/gas/mips/module-check-warn.s
@@ -0,0 +1,3 @@
+.module mips1
+.module fp=64
+add.s $f1,$f1,$f1
diff --git a/gas/testsuite/gas/mips/module-check.d b/gas/testsuite/gas/mips/module-check.d
new file mode 100644
index 0000000..5542e74
--- /dev/null
+++ b/gas/testsuite/gas/mips/module-check.d
@@ -0,0 +1,21 @@
+#as: -32
+#readelf: -A
+#name: MIPS module check
+
+Attribute Section: gnu
+File Attributes
+ Tag_GNU_MIPS_ABI_FP: Hard float \(32-bit CPU, 64-bit FPU\)
+
+MIPS ABI Flags Version: 0
+
+ISA: MIPS32r2
+GPR size: 32
+CPR1 size: 64
+CPR2 size: 0
+FP ABI: Hard float \(32-bit CPU, 64-bit FPU\)
+ISA Extension: None
+ASEs:
+ None
+FLAGS 1: 0000000.
+FLAGS 2: 00000000
+
diff --git a/gas/testsuite/gas/mips/module-check.s b/gas/testsuite/gas/mips/module-check.s
new file mode 100644
index 0000000..09dec20
--- /dev/null
+++ b/gas/testsuite/gas/mips/module-check.s
@@ -0,0 +1,4 @@
+.module mips1
+.module fp=64
+.module mips32r2
+add.s $f1,$f1,$f1
diff --git a/gas/testsuite/gas/mips/module-defer-warn1.d b/gas/testsuite/gas/mips/module-defer-warn1.d
index d5ee70e..c20f367 100644
--- a/gas/testsuite/gas/mips/module-defer-warn1.d
+++ b/gas/testsuite/gas/mips/module-defer-warn1.d
@@ -5,3 +5,16 @@
.*:.*file format.*elf.*mips.*
private flags = 1.......: .*\[mips2\].*
+
+MIPS ABI Flags Version: 0
+
+ISA: MIPS2
+GPR size: 32
+CPR1 size: 32
+CPR2 size: 0
+FP ABI: Hard float \(double precision\)
+ISA Extension: None
+ASEs:
+ None
+FLAGS 1: 00000000
+FLAGS 2: 00000000
diff --git a/gas/testsuite/gas/mips/module-mfp32.d b/gas/testsuite/gas/mips/module-mfp32.d
new file mode 100644
index 0000000..f5c66f6
--- /dev/null
+++ b/gas/testsuite/gas/mips/module-mfp32.d
@@ -0,0 +1,21 @@
+#as: -32
+#readelf: -A
+#name: MIPS module fp=32
+
+Attribute Section: gnu
+File Attributes
+ Tag_GNU_MIPS_ABI_FP: Hard float \(double precision\)
+
+MIPS ABI Flags Version: 0
+
+ISA: MIPS1
+GPR size: 32
+CPR1 size: 32
+CPR2 size: 0
+FP ABI: Hard float \(double precision\)
+ISA Extension: None
+ASEs:
+ None
+FLAGS 1: 00000000
+FLAGS 2: 00000000
+
diff --git a/gas/testsuite/gas/mips/module-mfp32.s b/gas/testsuite/gas/mips/module-mfp32.s
new file mode 100644
index 0000000..8f247b4
--- /dev/null
+++ b/gas/testsuite/gas/mips/module-mfp32.s
@@ -0,0 +1,3 @@
+.module fp=32
+.module doublefloat
+.module hardfloat
diff --git a/gas/testsuite/gas/mips/module-mfp64-noodd.d b/gas/testsuite/gas/mips/module-mfp64-noodd.d
new file mode 100644
index 0000000..3a9b459
--- /dev/null
+++ b/gas/testsuite/gas/mips/module-mfp64-noodd.d
@@ -0,0 +1,21 @@
+#as: -mips32r2 -32
+#readelf: -A
+#name: MIPS module fp=64 nooddspreg
+
+Attribute Section: gnu
+File Attributes
+ Tag_GNU_MIPS_ABI_FP: Hard float compat \(32-bit CPU, 64-bit FPU\)
+
+MIPS ABI Flags Version: 0
+
+ISA: MIPS32r2
+GPR size: 32
+CPR1 size: 64
+CPR2 size: 0
+FP ABI: Hard float compat \(32-bit CPU, 64-bit FPU\)
+ISA Extension: None
+ASEs:
+ None
+FLAGS 1: 0000000.
+FLAGS 2: 00000000
+
diff --git a/gas/testsuite/gas/mips/module-mfp64-noodd.s b/gas/testsuite/gas/mips/module-mfp64-noodd.s
new file mode 100644
index 0000000..6eff127
--- /dev/null
+++ b/gas/testsuite/gas/mips/module-mfp64-noodd.s
@@ -0,0 +1,4 @@
+.module fp=64
+.module doublefloat
+.module hardfloat
+.module nooddspreg
diff --git a/gas/testsuite/gas/mips/module-mfp64.d b/gas/testsuite/gas/mips/module-mfp64.d
new file mode 100644
index 0000000..8060b3e
--- /dev/null
+++ b/gas/testsuite/gas/mips/module-mfp64.d
@@ -0,0 +1,21 @@
+#as: -mips32r2 -32
+#readelf: -A
+#name: MIPS module fp=64
+
+Attribute Section: gnu
+File Attributes
+ Tag_GNU_MIPS_ABI_FP: Hard float \(32-bit CPU, 64-bit FPU\)
+
+MIPS ABI Flags Version: 0
+
+ISA: MIPS32r2
+GPR size: 32
+CPR1 size: 64
+CPR2 size: 0
+FP ABI: Hard float \(32-bit CPU, 64-bit FPU\)
+ISA Extension: None
+ASEs:
+ None
+FLAGS 1: 0000000.
+FLAGS 2: 00000000
+
diff --git a/gas/testsuite/gas/mips/module-mfp64.s b/gas/testsuite/gas/mips/module-mfp64.s
new file mode 100644
index 0000000..6847eed
--- /dev/null
+++ b/gas/testsuite/gas/mips/module-mfp64.s
@@ -0,0 +1,4 @@
+.module fp=64
+.module doublefloat
+.module hardfloat
+.module oddspreg
diff --git a/gas/testsuite/gas/mips/module-mfpxx.d b/gas/testsuite/gas/mips/module-mfpxx.d
new file mode 100644
index 0000000..2387eb1
--- /dev/null
+++ b/gas/testsuite/gas/mips/module-mfpxx.d
@@ -0,0 +1,21 @@
+#as: -mips32r2 -32
+#readelf: -A
+#name: MIPS module fp=xx
+
+Attribute Section: gnu
+File Attributes
+ Tag_GNU_MIPS_ABI_FP: Hard float \(32-bit CPU, Any FPU\)
+
+MIPS ABI Flags Version: 0
+
+ISA: MIPS32r2
+GPR size: 32
+CPR1 size: 32
+CPR2 size: 0
+FP ABI: Hard float \(32-bit CPU, Any FPU\)
+ISA Extension: None
+ASEs:
+ None
+FLAGS 1: 00000000
+FLAGS 2: 00000000
+
diff --git a/gas/testsuite/gas/mips/module-mfpxx.s b/gas/testsuite/gas/mips/module-mfpxx.s
new file mode 100644
index 0000000..8dd2a4c
--- /dev/null
+++ b/gas/testsuite/gas/mips/module-mfpxx.s
@@ -0,0 +1,3 @@
+.module fp=xx
+.module doublefloat
+.module hardfloat
diff --git a/gas/testsuite/gas/mips/module-msingle-float.d b/gas/testsuite/gas/mips/module-msingle-float.d
new file mode 100644
index 0000000..588003f
--- /dev/null
+++ b/gas/testsuite/gas/mips/module-msingle-float.d
@@ -0,0 +1,21 @@
+#as: -32
+#readelf: -A
+#name: MIPS module singlefloat
+
+Attribute Section: gnu
+File Attributes
+ Tag_GNU_MIPS_ABI_FP: Hard float \(single precision\)
+
+MIPS ABI Flags Version: 0
+
+ISA: MIPS1
+GPR size: 32
+CPR1 size: 32
+CPR2 size: 0
+FP ABI: Hard float \(single precision\)
+ISA Extension: None
+ASEs:
+ None
+FLAGS 1: 00000000
+FLAGS 2: 00000000
+
diff --git a/gas/testsuite/gas/mips/module-msingle-float.s b/gas/testsuite/gas/mips/module-msingle-float.s
new file mode 100644
index 0000000..082cccf
--- /dev/null
+++ b/gas/testsuite/gas/mips/module-msingle-float.s
@@ -0,0 +1,3 @@
+.module fp=32
+.module singlefloat
+.module hardfloat
diff --git a/gas/testsuite/gas/mips/module-msoft-float.d b/gas/testsuite/gas/mips/module-msoft-float.d
new file mode 100644
index 0000000..98a9ea1
--- /dev/null
+++ b/gas/testsuite/gas/mips/module-msoft-float.d
@@ -0,0 +1,21 @@
+#as: -32
+#readelf: -A
+#name: MIPS module softfloat
+
+Attribute Section: gnu
+File Attributes
+ Tag_GNU_MIPS_ABI_FP: Soft float
+
+MIPS ABI Flags Version: 0
+
+ISA: MIPS1
+GPR size: 32
+CPR1 size: 0
+CPR2 size: 0
+FP ABI: Soft float
+ISA Extension: None
+ASEs:
+ None
+FLAGS 1: 00000000
+FLAGS 2: 00000000
+
diff --git a/gas/testsuite/gas/mips/module-msoft-float.s b/gas/testsuite/gas/mips/module-msoft-float.s
new file mode 100644
index 0000000..4de4be7
--- /dev/null
+++ b/gas/testsuite/gas/mips/module-msoft-float.s
@@ -0,0 +1,3 @@
+.module fp=32
+.module doublefloat
+.module softfloat
diff --git a/gas/testsuite/gas/mips/module-override.d b/gas/testsuite/gas/mips/module-override.d
index 0305b02..464eb06 100644
--- a/gas/testsuite/gas/mips/module-override.d
+++ b/gas/testsuite/gas/mips/module-override.d
@@ -5,3 +5,16 @@
.*:.*file format.*elf.*mips.*
private flags = 1.......: .*\[mips2\].*
+
+MIPS ABI Flags Version: 0
+
+ISA: MIPS2
+GPR size: 32
+CPR1 size: 32
+CPR2 size: 0
+FP ABI: Hard float \(double precision\)
+ISA Extension: None
+ASEs:
+ None
+FLAGS 1: 00000000
+FLAGS 2: 00000000
diff --git a/gas/testsuite/gas/mips/module-set-mfpxx.d b/gas/testsuite/gas/mips/module-set-mfpxx.d
new file mode 100644
index 0000000..d2e4ffe
--- /dev/null
+++ b/gas/testsuite/gas/mips/module-set-mfpxx.d
@@ -0,0 +1,21 @@
+#as: -32
+#readelf: -A
+#name: MIPS module fp=xx set
+
+Attribute Section: gnu
+File Attributes
+ Tag_GNU_MIPS_ABI_FP: Hard float \(32-bit CPU, Any FPU\)
+
+MIPS ABI Flags Version: 0
+
+ISA: MIPS32r2
+GPR size: 32
+CPR1 size: 32
+CPR2 size: 0
+FP ABI: Hard float \(32-bit CPU, Any FPU\)
+ISA Extension: None
+ASEs:
+ None
+FLAGS 1: 0000000.
+FLAGS 2: 00000000
+
diff --git a/gas/testsuite/gas/mips/module-set-mfpxx.s b/gas/testsuite/gas/mips/module-set-mfpxx.s
new file mode 100644
index 0000000..313d768
--- /dev/null
+++ b/gas/testsuite/gas/mips/module-set-mfpxx.s
@@ -0,0 +1,16 @@
+.module mips32r2
+.module fp=xx
+.module doublefloat
+.module hardfloat
+.module oddspreg
+
+add.s $f1,$f1,$f1
+.set push
+.set fp=32
+add.s $f1,$f1,$f1
+.set pop
+
+.set push
+.set fp=64
+add.d $f1,$f1,$f1
+.set pop
diff --git a/gas/testsuite/gas/mips/n32-consec.d b/gas/testsuite/gas/mips/n32-consec.d
index 806857e..03b4970 100644
--- a/gas/testsuite/gas/mips/n32-consec.d
+++ b/gas/testsuite/gas/mips/n32-consec.d
@@ -12,3 +12,16 @@ Disassembly of section .data:
0: R_MIPS_32 .data\+0x4
Disassembly of section .reginfo:
...
+
+Disassembly of section .MIPS.abiflags:
+.*
+.*
+ ...
+.*
+.*
+
+Disassembly of section .gnu.attributes:
+.*
+.*
+.*
+.*
diff --git a/gas/testsuite/gas/mips/nan-2008-1.d b/gas/testsuite/gas/mips/nan-2008-1.d
index 3649fd2..78556f5 100644
--- a/gas/testsuite/gas/mips/nan-2008-1.d
+++ b/gas/testsuite/gas/mips/nan-2008-1.d
@@ -4,3 +4,4 @@
.*:.*file format.*mips.*
private flags = [0-9a-f]*[4-7c-f]..: .*[[,]nan2008[],].*
+#pass
diff --git a/gas/testsuite/gas/mips/nan-2008-2.d b/gas/testsuite/gas/mips/nan-2008-2.d
index e8a07ce..c98455b 100644
--- a/gas/testsuite/gas/mips/nan-2008-2.d
+++ b/gas/testsuite/gas/mips/nan-2008-2.d
@@ -5,3 +5,4 @@
.*:.*file format.*mips.*
private flags = [0-9a-f]*[4-7c-f]..: .*[[,]nan2008[],].*
+#pass
diff --git a/gas/testsuite/gas/mips/nan-2008-3.d b/gas/testsuite/gas/mips/nan-2008-3.d
index 7c3c4a3..8f179fb 100644
--- a/gas/testsuite/gas/mips/nan-2008-3.d
+++ b/gas/testsuite/gas/mips/nan-2008-3.d
@@ -4,3 +4,4 @@
.*:.*file format.*mips.*
private flags = [0-9a-f]*[4-7c-f]..: .*[[,]nan2008[],].*
+#pass
diff --git a/gas/testsuite/gas/mips/nan-2008-4.d b/gas/testsuite/gas/mips/nan-2008-4.d
index 22ba87f..44d5d22 100644
--- a/gas/testsuite/gas/mips/nan-2008-4.d
+++ b/gas/testsuite/gas/mips/nan-2008-4.d
@@ -5,3 +5,4 @@
.*:.*file format.*mips.*
private flags = [0-9a-f]*[4-7c-f]..: .*[[,]nan2008[],].*
+#pass
diff --git a/gas/testsuite/gas/mips/nan-legacy-1.d b/gas/testsuite/gas/mips/nan-legacy-1.d
index 4dcb93c..a2f6d0c 100644
--- a/gas/testsuite/gas/mips/nan-legacy-1.d
+++ b/gas/testsuite/gas/mips/nan-legacy-1.d
@@ -5,3 +5,17 @@
.*:.*file format.*mips.*
#failif
private flags = [0-9a-f]*[4-7c-f]..: .*[[]nan2008[]].*
+
+MIPS ABI Flags Version: 0
+
+ISA: MIPS.*
+GPR size: .*
+CPR1 size: .*
+CPR2 size: 0
+FP ABI: Hard float \(double precision\)
+ISA Extension: None
+ASEs:
+ None
+FLAGS 1: 00000000
+FLAGS 2: 00000000
+
diff --git a/gas/testsuite/gas/mips/nan-legacy-2.d b/gas/testsuite/gas/mips/nan-legacy-2.d
index 6ad4dce..83c559f 100644
--- a/gas/testsuite/gas/mips/nan-legacy-2.d
+++ b/gas/testsuite/gas/mips/nan-legacy-2.d
@@ -6,3 +6,17 @@
.*:.*file format.*mips.*
#failif
private flags = [0-9a-f]*[4-7c-f]..: .*[[]nan2008[]].*
+
+MIPS ABI Flags Version: 0
+
+ISA: MIPS.*
+GPR size: .*
+CPR1 size: .*
+CPR2 size: 0
+FP ABI: Hard float \(double precision\)
+ISA Extension: None
+ASEs:
+ None
+FLAGS 1: 00000000
+FLAGS 2: 00000000
+
diff --git a/gas/testsuite/gas/mips/nan-legacy-3.d b/gas/testsuite/gas/mips/nan-legacy-3.d
index 649f0ee..f19d1aa 100644
--- a/gas/testsuite/gas/mips/nan-legacy-3.d
+++ b/gas/testsuite/gas/mips/nan-legacy-3.d
@@ -5,3 +5,17 @@
.*:.*file format.*mips.*
#failif
private flags = [0-9a-f]*[4-7c-f]..: .*[[]nan2008[]].*
+
+MIPS ABI Flags Version: 0
+
+ISA: MIPS.*
+GPR size: .*
+CPR1 size: .*
+CPR2 size: 0
+FP ABI: Hard float \(double precision\)
+ISA Extension: None
+ASEs:
+ None
+FLAGS 1: 00000000
+FLAGS 2: 00000000
+
diff --git a/gas/testsuite/gas/mips/nan-legacy-4.d b/gas/testsuite/gas/mips/nan-legacy-4.d
index 3dc00cb..c70d1d1 100644
--- a/gas/testsuite/gas/mips/nan-legacy-4.d
+++ b/gas/testsuite/gas/mips/nan-legacy-4.d
@@ -6,3 +6,17 @@
.*:.*file format.*mips.*
#failif
private flags = [0-9a-f]*[4-7c-f]..: .*[[]nan2008[]].*
+
+MIPS ABI Flags Version: 0
+
+ISA: MIPS.*
+GPR size: .*
+CPR1 size: .*
+CPR2 size: 0
+FP ABI: Hard float \(double precision\)
+ISA Extension: None
+ASEs:
+ None
+FLAGS 1: 00000000
+FLAGS 2: 00000000
+
diff --git a/gas/testsuite/gas/mips/nan-legacy-5.d b/gas/testsuite/gas/mips/nan-legacy-5.d
index db3a954..d3b2480 100644
--- a/gas/testsuite/gas/mips/nan-legacy-5.d
+++ b/gas/testsuite/gas/mips/nan-legacy-5.d
@@ -5,3 +5,17 @@
.*:.*file format.*mips.*
#failif
private flags = [0-9a-f]*[4-7c-f]..: .*[[]nan2008[]].*
+
+MIPS ABI Flags Version: 0
+
+ISA: MIPS.*
+GPR size: .*
+CPR1 size: .*
+CPR2 size: 0
+FP ABI: Hard float \(double precision\)
+ISA Extension: None
+ASEs:
+ None
+FLAGS 1: 00000000
+FLAGS 2: 00000000
+
diff --git a/gas/testsuite/gas/mips/no-odd-spreg.d b/gas/testsuite/gas/mips/no-odd-spreg.d
new file mode 100644
index 0000000..f33e3a6
--- /dev/null
+++ b/gas/testsuite/gas/mips/no-odd-spreg.d
@@ -0,0 +1,22 @@
+#PROG: readelf
+#source: empty.s
+#as: -32 -mno-odd-spreg
+#readelf: -A
+#name: -mno-odd-spreg test
+
+Attribute Section: gnu
+File Attributes
+ Tag_GNU_MIPS_ABI_FP: .*
+
+MIPS ABI Flags Version: 0
+
+ISA: MIPS.*
+GPR size: .*
+CPR1 size: .*
+CPR2 size: 0
+FP ABI: .*
+ISA Extension: .*
+ASEs:
+#...
+FLAGS 1: 00000000
+FLAGS 2: 00000000
diff --git a/gas/testsuite/gas/mips/odd-spreg.d b/gas/testsuite/gas/mips/odd-spreg.d
new file mode 100644
index 0000000..7f80c2c
--- /dev/null
+++ b/gas/testsuite/gas/mips/odd-spreg.d
@@ -0,0 +1,22 @@
+#PROG: readelf
+#source: empty.s
+#as: -32 -modd-spreg
+#readelf: -A
+#name: -modd-spreg test
+
+Attribute Section: gnu
+File Attributes
+ Tag_GNU_MIPS_ABI_FP: .*
+
+MIPS ABI Flags Version: 0
+
+ISA: MIPS.*
+GPR size: .*
+CPR1 size: .*
+CPR2 size: 0
+FP ABI: .*
+ISA Extension: .*
+ASEs:
+#...
+FLAGS 1: 00000001
+FLAGS 2: 00000000
diff --git a/gas/testsuite/gas/mips/tmips16-e.d b/gas/testsuite/gas/mips/tmips16-e.d
index ddd6aaa..708ff11 100644
--- a/gas/testsuite/gas/mips/tmips16-e.d
+++ b/gas/testsuite/gas/mips/tmips16-e.d
@@ -15,7 +15,9 @@ SYMBOL TABLE:
0+0000004 l \.text 0+0000000 0xf0 \.L1.1
0+0000000 l d foo 0+0000000 (|foo)
0+0000000 l d \.reginfo 0+0000000 (|\.reginfo)
+0+0000000 l d \.MIPS\.abiflags 0+0000000 (|\.MIPS\.abiflags)
0+0000000 l d \.(mdebug|pdr) 0+0000000 (|\.mdebug|\.pdr)
+0+0000000 l d \.gnu\.attributes 0+0000000 (|\.gnu\.attributes)
0+0000000 \*UND\* 0+0000000 g1
@@ -34,6 +36,11 @@ Contents of section \.text:
Contents of section \.reginfo:
0000 00010000 00000000 00000000 00000000 .*
0010 00000000 00000000 .*
+Contents of section .MIPS.abiflags:
+ .*
+ .*
Contents of section foo:
0000 00000000 00000008 00000000 00000003 .*
0010 00000000 00000008 00000000 00000000 .*
+Contents of section .gnu.attributes:
+ .*
diff --git a/gas/testsuite/gas/mips/tmips16-f.d b/gas/testsuite/gas/mips/tmips16-f.d
index f865d1d..057122c 100644
--- a/gas/testsuite/gas/mips/tmips16-f.d
+++ b/gas/testsuite/gas/mips/tmips16-f.d
@@ -14,7 +14,9 @@ SYMBOL TABLE:
0+0000002 l \.text 0+0000000 0xf0 l1
0+0000000 l d foo 0+0000000 (|foo)
0+0000000 l d \.reginfo 0+0000000 (|\.reginfo)
+0+0000000 l d \.MIPS\.abiflags 0+0000000 (|\.MIPS\.abiflags)
0+0000000 l d \.(mdebug|pdr) 0+0000000 (|\.mdebug|\.pdr)
+0+0000000 l d \.gnu\.attributes 0+0000000 (|\.gnu\.attributes)
RELOCATION RECORDS FOR \[foo\]:
@@ -27,5 +29,10 @@ Contents of section \.text:
Contents of section \.reginfo:
0000 00010000 00000000 00000000 00000000 .*
0010 00000000 00000000 .*
+Contents of section .MIPS.abiflags:
+ .*
+ .*
Contents of section foo:
0000 00000003 00000000 00000000 00000000 .*
+Contents of section .gnu.attributes:
+ .*
diff --git a/gas/testsuite/gas/mips/tmipsel16-e.d b/gas/testsuite/gas/mips/tmipsel16-e.d
index 0af3793..839446b 100644
--- a/gas/testsuite/gas/mips/tmipsel16-e.d
+++ b/gas/testsuite/gas/mips/tmipsel16-e.d
@@ -15,7 +15,9 @@ SYMBOL TABLE:
0+0000004 l \.text 0+0000000 0xf0 \.L1.1
0+0000000 l d foo 0+0000000 (|foo)
0+0000000 l d \.reginfo 0+0000000 (|\.reginfo)
+0+0000000 l d \.MIPS\.abiflags 0+0000000 (|\.MIPS\.abiflags)
0+0000000 l d \.(mdebug|pdr) 0+0000000 (|\.mdebug|\.pdr)
+0+0000000 l d \.gnu\.attributes 0+0000000 (|\.gnu\.attributes)
0+0000000 \*UND\* 0+0000000 g1
@@ -34,6 +36,11 @@ Contents of section \.text:
Contents of section \.reginfo:
0000 00000100 00000000 00000000 00000000 .*
0010 00000000 00000000 .*
+Contents of section .MIPS.abiflags:
+ .*
+ .*
Contents of section foo:
0000 00000000 08000000 00000000 03000000 .*
0010 00000000 08000000 00000000 00000000 .*
+Contents of section .gnu.attributes:
+ .*
diff --git a/gas/testsuite/gas/mips/tmipsel16-f.d b/gas/testsuite/gas/mips/tmipsel16-f.d
index 5daa593..edc6068 100644
--- a/gas/testsuite/gas/mips/tmipsel16-f.d
+++ b/gas/testsuite/gas/mips/tmipsel16-f.d
@@ -14,7 +14,9 @@ SYMBOL TABLE:
0+0000002 l \.text 0+0000000 0xf0 l1
0+0000000 l d foo 0+0000000 (|foo)
0+0000000 l d \.reginfo 0+0000000 (\.reginfo)
+0+0000000 l d \.MIPS\.abiflags 0+0000000 (\.MIPS\.abiflags)
0+0000000 l d \.(mdebug|pdr) 0+0000000 (\.mdebug|\.pdr)
+0+0000000 l d \.gnu\.attributes 0+0000000 (\.gnu\.attributes)
RELOCATION RECORDS FOR \[foo\]:
@@ -27,5 +29,10 @@ Contents of section \.text:
Contents of section \.reginfo:
0000 00000100 00000000 00000000 00000000 .*
0010 00000000 00000000 .*
+Contents of section .MIPS.abiflags:
+ .*
+ .*
Contents of section foo:
0000 03000000 00000000 00000000 00000000 .*
+Contents of section .gnu.attributes:
+ .*