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author | Jan Beulich <jbeulich@suse.com> | 2020-01-21 08:30:05 +0100 |
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committer | Jan Beulich <jbeulich@suse.com> | 2020-01-21 08:30:05 +0100 |
commit | 1a0351246a5cfd4a425e0a32b6a1a94f3ce21f3f (patch) | |
tree | 6f8c3cea4b7b05131f8845364be3eb1c9ca51e74 /gas | |
parent | c006a730e9a35489cc8d081f422a7ea1b62ada56 (diff) | |
download | gdb-1a0351246a5cfd4a425e0a32b6a1a94f3ce21f3f.zip gdb-1a0351246a5cfd4a425e0a32b6a1a94f3ce21f3f.tar.gz gdb-1a0351246a5cfd4a425e0a32b6a1a94f3ce21f3f.tar.bz2 |
x86: replace adhoc ambiguous operand checking for CRC32
There's no need (anymore?) to heavily special case this - just make
generic logic consider only its first operand, and deal with the case
of an 'l' suffix not being allowed in a pattern.
Diffstat (limited to 'gas')
-rw-r--r-- | gas/ChangeLog | 14 | ||||
-rw-r--r-- | gas/config/tc-i386.c | 66 | ||||
-rw-r--r-- | gas/testsuite/gas/i386/inval-crc32.l | 6 | ||||
-rw-r--r-- | gas/testsuite/gas/i386/noreg16.d | 1 | ||||
-rw-r--r-- | gas/testsuite/gas/i386/noreg16.l | 1 | ||||
-rw-r--r-- | gas/testsuite/gas/i386/noreg16.s | 1 | ||||
-rw-r--r-- | gas/testsuite/gas/i386/noreg32.d | 1 | ||||
-rw-r--r-- | gas/testsuite/gas/i386/noreg32.l | 1 | ||||
-rw-r--r-- | gas/testsuite/gas/i386/noreg32.s | 1 | ||||
-rw-r--r-- | gas/testsuite/gas/i386/noreg64.d | 2 | ||||
-rw-r--r-- | gas/testsuite/gas/i386/noreg64.l | 2 | ||||
-rw-r--r-- | gas/testsuite/gas/i386/noreg64.s | 2 | ||||
-rw-r--r-- | gas/testsuite/gas/i386/x86-64-inval-crc32.l | 12 |
13 files changed, 60 insertions, 50 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index c5528ed..37d73fa 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,5 +1,19 @@ 2020-01-21 Jan Beulich <jbeulich@suse.com> + * config/tc-i386.c (process_suffix): Merge CRC32 handling into + generic code path. Deal with No_lSuf being set in a template. + * testsuite/gas/i386/inval-crc32.l, + testsuite/gas/i386/x86-64-inval-crc32.l: Expect warning(s) + instead of error(s) when operand size is ambiguous. + * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s, + testsuite/gas/i386/noreg64.s: Add CRC32 tests. + * testsuite/gas/i386/noreg16.d, testsuite/gas/i386/noreg16.l, + testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg32.l, + testsuite/gas/i386/noreg64.d, testsuite/gas/i386/noreg64.l: + Adjust expectations. + +2020-01-21 Jan Beulich <jbeulich@suse.com> + * config/tc-i386.c (process_suffix): Drop SYSRET special case and an intel_syntax check. Re-write lack-of-suffix processing logic. diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index 0b7542f..3a2a1b7 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -6301,50 +6301,26 @@ process_suffix (void) Destination register type is more significant than source register type. crc32 in SSE4.2 prefers source register type. */ - if (i.tm.base_opcode == 0xf20f38f0 - && i.types[0].bitfield.class == Reg) - { - if (i.types[0].bitfield.byte) - i.suffix = BYTE_MNEM_SUFFIX; - else if (i.types[0].bitfield.word) - i.suffix = WORD_MNEM_SUFFIX; - else if (i.types[0].bitfield.dword) - i.suffix = LONG_MNEM_SUFFIX; - else if (i.types[0].bitfield.qword) - i.suffix = QWORD_MNEM_SUFFIX; - } - - if (!i.suffix) - { - int op; + unsigned int op = i.tm.base_opcode != 0xf20f38f0 ? i.operands : 1; - if (i.tm.base_opcode == 0xf20f38f0) - { - /* We have to know the operand size for crc32. */ - as_bad (_("ambiguous memory operand size for `%s`"), - i.tm.name); - return 0; - } - - for (op = i.operands; --op >= 0;) - if (i.tm.operand_types[op].bitfield.instance == InstanceNone - || i.tm.operand_types[op].bitfield.instance == Accum) - { - if (i.types[op].bitfield.class != Reg) - continue; - if (i.types[op].bitfield.byte) - i.suffix = BYTE_MNEM_SUFFIX; - else if (i.types[op].bitfield.word) - i.suffix = WORD_MNEM_SUFFIX; - else if (i.types[op].bitfield.dword) - i.suffix = LONG_MNEM_SUFFIX; - else if (i.types[op].bitfield.qword) - i.suffix = QWORD_MNEM_SUFFIX; - else - continue; - break; - } - } + while (op--) + if (i.tm.operand_types[op].bitfield.instance == InstanceNone + || i.tm.operand_types[op].bitfield.instance == Accum) + { + if (i.types[op].bitfield.class != Reg) + continue; + if (i.types[op].bitfield.byte) + i.suffix = BYTE_MNEM_SUFFIX; + else if (i.types[op].bitfield.word) + i.suffix = WORD_MNEM_SUFFIX; + else if (i.types[op].bitfield.dword) + i.suffix = LONG_MNEM_SUFFIX; + else if (i.types[op].bitfield.qword) + i.suffix = QWORD_MNEM_SUFFIX; + else + continue; + break; + } } else if (i.suffix == BYTE_MNEM_SUFFIX) { @@ -6484,8 +6460,10 @@ process_suffix (void) i.suffix = SHORT_MNEM_SUFFIX; else if (flag_code == CODE_16BIT) i.suffix = WORD_MNEM_SUFFIX; - else + else if (!i.tm.opcode_modifier.no_lsuf) i.suffix = LONG_MNEM_SUFFIX; + else + i.suffix = QWORD_MNEM_SUFFIX; } } diff --git a/gas/testsuite/gas/i386/inval-crc32.l b/gas/testsuite/gas/i386/inval-crc32.l index 14f908d..5afc35c 100644 --- a/gas/testsuite/gas/i386/inval-crc32.l +++ b/gas/testsuite/gas/i386/inval-crc32.l @@ -3,7 +3,7 @@ .*:7: Error: .* .*:8: Error: .* .*:9: Error: .* -.*:10: Error: .* +.*:10: Warning: .* .*:11: Error: .* .*:12: Error: .* .*:13: Error: .* @@ -27,7 +27,9 @@ GAS LISTING .* [ ]*7[ ]+crc32w \(%esi\), %ax [ ]*8[ ]+crc32 \(%esi\), %al [ ]*9[ ]+crc32 \(%esi\), %ax -[ ]*10[ ]+crc32 \(%esi\), %eax +[ ]*10[ ]+\?\?\?\? F20F38F1[ ]+crc32 \(%esi\), %eax +\*\*\*\* Warning: .* `crc32' +[ ]*10[ ]+06 [ ]*11[ ]+crc32 %al, %al [ ]*12[ ]+crc32b %al, %al [ ]*13[ ]+crc32 %ax, %ax diff --git a/gas/testsuite/gas/i386/noreg16.d b/gas/testsuite/gas/i386/noreg16.d index fd7336f..8a6252e 100644 --- a/gas/testsuite/gas/i386/noreg16.d +++ b/gas/testsuite/gas/i386/noreg16.d @@ -26,6 +26,7 @@ Disassembly of section .text: *[a-f0-9]+: 81 3f 34 12 cmpw \$0x1234,\(%bx\) *[a-f0-9]+: a7 cmpsw %es:\(%di\),%ds:\(%si\) *[a-f0-9]+: 67 a7 cmpsw %es:\(%edi\),%ds:\(%esi\) + *[a-f0-9]+: f2 0f 38 f1 07 crc32w \(%bx\),%eax *[a-f0-9]+: f2 0f 2a 07 cvtsi2sdl \(%bx\),%xmm0 *[a-f0-9]+: f3 0f 2a 07 cvtsi2ssl \(%bx\),%xmm0 *[a-f0-9]+: ff 0f decw \(%bx\) diff --git a/gas/testsuite/gas/i386/noreg16.l b/gas/testsuite/gas/i386/noreg16.l index 2861431..1b3f9bc 100644 --- a/gas/testsuite/gas/i386/noreg16.l +++ b/gas/testsuite/gas/i386/noreg16.l @@ -17,6 +17,7 @@ .*:[1-9][0-9]*: Warning: .* `cmp' .*:[1-9][0-9]*: Warning: .* `cmps' .*:[1-9][0-9]*: Warning: .* `cmps' +.*:[1-9][0-9]*: Warning: .* `crc32' .*:[1-9][0-9]*: Warning: .* `dec' .*:[1-9][0-9]*: Warning: .* `div' .*:[1-9][0-9]*: Warning: .* `fadd' diff --git a/gas/testsuite/gas/i386/noreg16.s b/gas/testsuite/gas/i386/noreg16.s index 0d64e32..743e5fa 100644 --- a/gas/testsuite/gas/i386/noreg16.s +++ b/gas/testsuite/gas/i386/noreg16.s @@ -20,6 +20,7 @@ noreg: cmp $0x1234, (%bx) cmps cmps %es:(%edi), (%esi) + crc32 (%bx), %eax cvtsi2sd (%bx), %xmm0 cvtsi2ss (%bx), %xmm0 dec (%bx) diff --git a/gas/testsuite/gas/i386/noreg32.d b/gas/testsuite/gas/i386/noreg32.d index b0f8c24..1e03f98 100644 --- a/gas/testsuite/gas/i386/noreg32.d +++ b/gas/testsuite/gas/i386/noreg32.d @@ -30,6 +30,7 @@ Disassembly of section .text: *[a-f0-9]+: 81 38 78 56 34 12 cmpl \$0x12345678,\(%eax\) *[a-f0-9]+: a7 cmpsl %es:\(%edi\),%ds:\(%esi\) *[a-f0-9]+: a7 cmpsl %es:\(%edi\),%ds:\(%esi\) + *[a-f0-9]+: f2 0f 38 f1 00 crc32l \(%eax\),%eax *[a-f0-9]+: f2 0f 2a 00 cvtsi2sdl \(%eax\),%xmm0 *[a-f0-9]+: f3 0f 2a 00 cvtsi2ssl \(%eax\),%xmm0 *[a-f0-9]+: ff 08 decl \(%eax\) diff --git a/gas/testsuite/gas/i386/noreg32.l b/gas/testsuite/gas/i386/noreg32.l index 842774e..1fab0f4 100644 --- a/gas/testsuite/gas/i386/noreg32.l +++ b/gas/testsuite/gas/i386/noreg32.l @@ -21,6 +21,7 @@ .*:[1-9][0-9]*: Warning: .* `cmp' .*:[1-9][0-9]*: Warning: .* `cmps' .*:[1-9][0-9]*: Warning: .* `cmps' +.*:[1-9][0-9]*: Warning: .* `crc32' .*:[1-9][0-9]*: Warning: .* `dec' .*:[1-9][0-9]*: Warning: .* `div' .*:[1-9][0-9]*: Warning: .* `fadd' diff --git a/gas/testsuite/gas/i386/noreg32.s b/gas/testsuite/gas/i386/noreg32.s index 7876e96..1d1cf6d 100644 --- a/gas/testsuite/gas/i386/noreg32.s +++ b/gas/testsuite/gas/i386/noreg32.s @@ -23,6 +23,7 @@ noreg: cmp $0x12345678, (%eax) cmps cmps %es:(%edi), (%esi) + crc32 (%eax), %eax cvtsi2sd (%eax), %xmm0 cvtsi2ss (%eax), %xmm0 dec (%eax) diff --git a/gas/testsuite/gas/i386/noreg64.d b/gas/testsuite/gas/i386/noreg64.d index d058da4..8b56ddc 100644 --- a/gas/testsuite/gas/i386/noreg64.d +++ b/gas/testsuite/gas/i386/noreg64.d @@ -30,6 +30,8 @@ Disassembly of section .text: *[a-f0-9]+: 81 38 78 56 34 12 cmpl \$0x12345678,\(%rax\) *[a-f0-9]+: a7 cmpsl %es:\(%rdi\),%ds:\(%rsi\) *[a-f0-9]+: a7 cmpsl %es:\(%rdi\),%ds:\(%rsi\) + *[a-f0-9]+: f2 0f 38 f1 00 crc32l \(%rax\),%eax + *[a-f0-9]+: f2 48 0f 38 f1 00 crc32q \(%rax\),%rax *[a-f0-9]+: f2 0f 2a 00 cvtsi2sdl \(%rax\),%xmm0 *[a-f0-9]+: f3 0f 2a 00 cvtsi2ssl \(%rax\),%xmm0 *[a-f0-9]+: ff 08 decl \(%rax\) diff --git a/gas/testsuite/gas/i386/noreg64.l b/gas/testsuite/gas/i386/noreg64.l index 9ec8093..a4d3179 100644 --- a/gas/testsuite/gas/i386/noreg64.l +++ b/gas/testsuite/gas/i386/noreg64.l @@ -21,6 +21,8 @@ .*:[1-9][0-9]*: Warning: .* `cmp' .*:[1-9][0-9]*: Warning: .* `cmps' .*:[1-9][0-9]*: Warning: .* `cmps' +.*:[1-9][0-9]*: Warning: .* `crc32' +.*:[1-9][0-9]*: Warning: .* `crc32' .*:[1-9][0-9]*: Warning: .* `cvtsi2sd' .*:[1-9][0-9]*: Warning: .* `cvtsi2ss' .*:[1-9][0-9]*: Warning: .* `dec' diff --git a/gas/testsuite/gas/i386/noreg64.s b/gas/testsuite/gas/i386/noreg64.s index 7418ccb..119b44e 100644 --- a/gas/testsuite/gas/i386/noreg64.s +++ b/gas/testsuite/gas/i386/noreg64.s @@ -23,6 +23,8 @@ noreg: cmp $0x12345678, (%rax) cmps cmps %es:(%rdi), (%rsi) + crc32 (%rax), %eax + crc32 (%rax), %rax cvtsi2sd (%rax), %xmm0 cvtsi2ss (%rax), %xmm0 dec (%rax) diff --git a/gas/testsuite/gas/i386/x86-64-inval-crc32.l b/gas/testsuite/gas/i386/x86-64-inval-crc32.l index b4a8eaa..e30e82f 100644 --- a/gas/testsuite/gas/i386/x86-64-inval-crc32.l +++ b/gas/testsuite/gas/i386/x86-64-inval-crc32.l @@ -3,8 +3,8 @@ .*:7: Error: .* .*:8: Error: .* .*:9: Error: .* -.*:10: Error: .* -.*:11: Error: .* +.*:10: Warning: .* +.*:11: Warning: .* .*:12: Error: .* .*:13: Error: .* .*:14: Error: .* @@ -38,8 +38,12 @@ GAS LISTING .* [ ]*7[ ]+crc32w \(%rsi\), %ax [ ]*8[ ]+crc32 \(%rsi\), %al [ ]*9[ ]+crc32 \(%rsi\), %ax -[ ]*10[ ]+crc32 \(%rsi\), %eax -[ ]*11[ ]+crc32 \(%rsi\), %rax +[ ]*10[ ]+\?\?\?\? F20F38F1[ ]+crc32 \(%rsi\), %eax +\*\*\*\* Warning: .* `crc32' +[ ]*10[ ]+06 +[ ]*11[ ]+\?\?\?\? F2480F38[ ]+crc32 \(%rsi\), %rax +\*\*\*\* Warning: .* `crc32' +[ ]*11[ ]+F106 [ ]*12[ ]+crc32 %al, %al [ ]*13[ ]+crc32b %al, %al [ ]*14[ ]+crc32 %ax, %ax |