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authorH.J. Lu <hjl.tools@gmail.com>2007-04-26 18:15:47 +0000
committerH.J. Lu <hjl.tools@gmail.com>2007-04-26 18:15:47 +0000
commit185b11630d33f088749f6cce0daa9f19f03957e2 (patch)
treeb8c10a695325a5806e034689b572fe4424249de0 /gas
parent8eb2af8ecda64d720abcd2f55a39e85827dfcfe9 (diff)
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gas/testsuite/
2007-04-26 H.J. Lu <hongjiu.lu@intel.com> PR binutils/4429 * gas/i386/i386.exp: Run "x86-64-addr32-intel" and "x86-64-rip-intel". * gas/i386/intelok.d: Updated. * gas/i386/x86-64-addr32-intel.d: New file. * gas/i386/x86-64-rip-intel.d: Likewise. opcodes/ 2007-04-26 H.J. Lu <hongjiu.lu@intel.com> PR binutils/4429 * i386-dis.c (print_insn): Also swap the order of op_riprel when swapping op_index. Break when the RIP relative address is printed. (OP_E): Properly handle RIP relative addressing and print the explicit zero displacement for Intel mode.
Diffstat (limited to 'gas')
-rw-r--r--gas/testsuite/ChangeLog11
-rw-r--r--gas/testsuite/gas/i386/i386.exp2
-rw-r--r--gas/testsuite/gas/i386/intelok.d14
-rw-r--r--gas/testsuite/gas/i386/x86-64-addr32-intel.d23
-rw-r--r--gas/testsuite/gas/i386/x86-64-rip-intel.d15
5 files changed, 58 insertions, 7 deletions
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 4253c44..4c6ff29 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,14 @@
+2007-04-26 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR binutils/4429
+ * gas/i386/i386.exp: Run "x86-64-addr32-intel" and
+ "x86-64-rip-intel".
+
+ * gas/i386/intelok.d: Updated.
+
+ * gas/i386/x86-64-addr32-intel.d: New file.
+ * gas/i386/x86-64-rip-intel.d: Likewise.
+
2007-04-24 Andreas Krebbel <krebbel1@de.ibm.com>
* gas/s390/zarch-z9-ec.d: Add pfpo, ectg and csst.
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index e701a8d..bda75bd 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -138,9 +138,11 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
run_dump_test "x86_64"
run_dump_test "x86-64-addr32"
+ run_dump_test "x86-64-addr32-intel"
run_dump_test "x86-64-opcode"
run_dump_test "x86-64-pcrel"
run_dump_test "x86-64-rip"
+ run_dump_test "x86-64-rip-intel"
run_dump_test "x86-64-stack"
run_dump_test "x86-64-stack-intel"
run_dump_test "x86-64-stack-suffix"
diff --git a/gas/testsuite/gas/i386/intelok.d b/gas/testsuite/gas/i386/intelok.d
index 8e7fdbf..4231171 100644
--- a/gas/testsuite/gas/i386/intelok.d
+++ b/gas/testsuite/gas/i386/intelok.d
@@ -106,10 +106,10 @@ Disassembly of section .text:
[ ]*[0-9a-f]+: 8b 40 12[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\+18\]
[ ]*[0-9a-f]+: 8b 04 85 02 00 00 00[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\*4\+(0x)?2\]
[ ]*[0-9a-f]+: 8b 04 85 02 00 00 00[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\*4\+(0x)?2\]
-[ ]*[0-9a-f]+: 8b 04 45 00 00 00 00[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\*2\]
-[ ]*[0-9a-f]+: 8b 04 45 00 00 00 00[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\*2\]
-[ ]*[0-9a-f]+: 8b 04 8d 00 00 00 00[ ]+mov[ ]+eax,(DWORD PTR )?\[ecx\*4\]
-[ ]*[0-9a-f]+: 8b 04 8d 00 00 00 00[ ]+mov[ ]+eax,(DWORD PTR )?\[ecx\*4\]
+[ ]*[0-9a-f]+: 8b 04 45 00 00 00 00[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\*2\+(0x)?0]
+[ ]*[0-9a-f]+: 8b 04 45 00 00 00 00[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\*2\+(0x)?0]
+[ ]*[0-9a-f]+: 8b 04 8d 00 00 00 00[ ]+mov[ ]+eax,(DWORD PTR )?\[ecx\*4\+(0x)?0]
+[ ]*[0-9a-f]+: 8b 04 8d 00 00 00 00[ ]+mov[ ]+eax,(DWORD PTR )?\[ecx\*4\+(0x)?0]
[ ]*[0-9a-f]+: 8b 40 01[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\+1\]
[ ]*[0-9a-f]+: 8b 40 01[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\+1\]
[ ]*[0-9a-f]+: 8b 44 08 fb[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\+ecx\-5\]
@@ -153,11 +153,11 @@ Disassembly of section .text:
[ ]*[0-9a-f]+: b8 00 00 00 00[ ]+mov[ ]+eax,0x0
[ ]*[0-9a-f]+: b8 00 00 00 00[ ]+mov[ ]+eax,0x0
[ ]*[0-9a-f]+: b8 00 00 00 00[ ]+mov[ ]+eax,0x0
-[ ]*[0-9a-f]+: 8b 80 00 00 00 00[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\]
+[ ]*[0-9a-f]+: 8b 80 00 00 00 00[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\+(0x)?0\]
[ ]*[0-9a-f]+: 8b 40 01[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\+1]
-[ ]*[0-9a-f]+: 8b 80 00 00 00 00[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\]
+[ ]*[0-9a-f]+: 8b 80 00 00 00 00[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\+(0x)?0\]
[ ]*[0-9a-f]+: 8b 80 01 00 00 00[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\+(0x)?1\]
-[ ]*[0-9a-f]+: 8b 80 00 00 00 00[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\]
+[ ]*[0-9a-f]+: 8b 80 00 00 00 00[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\+(0x)?0\]
[ ]*[0-9a-f]+: 8b 40 01[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\+1\]
[ ]*[0-9a-f]+: a1 01 00 00 00[ ]+mov[ ]+eax,ds:0x1
[ ]*[0-9a-f]+: a1 ff ff ff ff[ ]+mov[ ]+eax,ds:0xffffffff
diff --git a/gas/testsuite/gas/i386/x86-64-addr32-intel.d b/gas/testsuite/gas/i386/x86-64-addr32-intel.d
new file mode 100644
index 0000000..90858dc
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-addr32-intel.d
@@ -0,0 +1,23 @@
+#as: -J
+#objdump: -drwMintel
+#name: x86-64 32-bit addressing (Intel mode)
+#source: x86-64-addr32.s
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+000 <.text>:
+[ ]*0:[ ]+67 48 8d 80 00 00 00 00[ ]+addr32[ ]+lea[ ]+rax,\[[re]ax\+(0x)?0\].*
+[ ]*8:[ ]+67 49 8d 80 00 00 00 00[ ]+addr32[ ]+lea[ ]+rax,\[r8d?\+(0x)?0\].*
+[ ]*10:[ ]+67 48 8d 05 00 00 00 00[ ]+addr32[ ]+lea[ ]+rax,\[[re]ip\+(0x)?0\].*
+[ ]*18:[ ]+67 48 8d 04 25 00 00 00 00[ ]+addr32[ ]+lea[ ]+rax,ds:0x0.*
+[ ]*21:[ ]+67 a0 98 08 60 00[ ]+addr32[ ]+mov[ ]+al,ds:0x600898
+[ ]*27:[ ]+67 66 a1 98 08 60 00[ ]+addr32[ ]+mov[ ]+ax,ds:0x600898
+[ ]*2e:[ ]+67 a1 98 08 60 00[ ]+addr32[ ]+mov[ ]+eax,ds:0x600898
+[ ]*34:[ ]+67 48 a1 98 08 60 00[ ]+addr32[ ]+mov[ ]+rax,ds:0x600898
+[ ]*3b:[ ]+67 a2 98 08 60 00[ ]+addr32[ ]+mov[ ]+ds:0x600898,al
+[ ]*41:[ ]+67 66 a3 98 08 60 00[ ]+addr32[ ]+mov[ ]+ds:0x600898,ax
+[ ]*48:[ ]+67 a3 98 08 60 00[ ]+addr32[ ]+mov[ ]+ds:0x600898,eax
+[ ]*4e:[ ]+67 48 a3 98 08 60 00[ ]+addr32[ ]+mov[ ]+ds:0x600898,rax
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-rip-intel.d b/gas/testsuite/gas/i386/x86-64-rip-intel.d
new file mode 100644
index 0000000..162f654
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-rip-intel.d
@@ -0,0 +1,15 @@
+#as: -J
+#objdump: -drwMintel
+#name: x86-64 rip addressing (Intel mode)
+#source: x86-64-rip.s
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+000 <.text>:
+[ ]*0:[ ]+8d 05 00 00 00 00[ ]+lea[ ]+eax,\[rip\+0x0\][ ]*(#.*)?
+[ ]*6:[ ]+8d 05 11 11 11 11[ ]+lea[ ]+eax,\[rip\+0x11111111\][ ]*(#.*)?
+[ ]*c:[ ]+8d 05 01 00 00 00[ ]+lea[ ]+eax,\[rip\+0x1\][ ]*(#.*)?
+[ ]*12:[ ]+8d 05 00 00 00 00[ ]+lea[ ]+eax,\[rip\+0x0\][ ]*(#.*)?
+#pass