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| author | Jan Beulich <jbeulich@suse.com> | 2022-01-04 10:05:53 +0100 |
|---|---|---|
| committer | Jan Beulich <jbeulich@suse.com> | 2022-01-04 10:05:53 +0100 |
| commit | 125ff8197df74cd3108e36d271267c798cd0e15f (patch) | |
| tree | 694afa99f47a2f6212eb1d6ace96a956d7180b6b /gas | |
| parent | 5ed4d49d107c46670a7994711f0284776a35284e (diff) | |
| download | gdb-125ff8197df74cd3108e36d271267c798cd0e15f.zip gdb-125ff8197df74cd3108e36d271267c798cd0e15f.tar.gz gdb-125ff8197df74cd3108e36d271267c798cd0e15f.tar.bz2 | |
x86/Intel: correct VFPCLASSP{S,D} handling when displacement is present
fits_in_disp8() can be called before ambiguous operands get resolved
or rejected (in process_suffix()), which requires that i.memshift be
non-negative to avoid an internal error. This case wasn't covered by
6c0946d0d28d ("x86: correct VFPCLASSP{S,D} operand size handling").
Diffstat (limited to 'gas')
| -rw-r--r-- | gas/config/tc-i386.c | 6 | ||||
| -rw-r--r-- | gas/testsuite/gas/i386/avx512dq-inval.s | 2 | ||||
| -rw-r--r-- | gas/testsuite/gas/i386/noavx512-2.l | 4 | ||||
| -rw-r--r-- | gas/testsuite/gas/i386/noavx512-2.s | 2 |
4 files changed, 9 insertions, 5 deletions
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index 98c0bf0..66a2e0f 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -6327,7 +6327,7 @@ check_VecOperands (const insn_template *t) i.memshift = t->opcode_modifier.disp8memshift; else { - const i386_operand_type *type = NULL; + const i386_operand_type *type = NULL, *fallback = NULL; i.memshift = 0; for (op = 0; op < i.operands; op++) @@ -6341,6 +6341,8 @@ check_VecOperands (const insn_template *t) type = &t->operand_types[op]; else if (!i.types[op].bitfield.unspecified) type = &i.types[op]; + else /* Ambiguities get resolved elsewhere. */ + fallback = &t->operand_types[op]; } else if (i.types[op].bitfield.class == RegSIMD && t->opcode_modifier.evex != EVEXLIG) @@ -6353,6 +6355,8 @@ check_VecOperands (const insn_template *t) i.memshift = 4; } + if (!type && !i.memshift) + type = fallback; if (type) { if (type->bitfield.zmmword) diff --git a/gas/testsuite/gas/i386/avx512dq-inval.s b/gas/testsuite/gas/i386/avx512dq-inval.s index 36ee3b8..d47ae54 100644 --- a/gas/testsuite/gas/i386/avx512dq-inval.s +++ b/gas/testsuite/gas/i386/avx512dq-inval.s @@ -24,7 +24,7 @@ _start: vcvtuqq2ps xmm0, [rax] vfpclasspd k0, [eax], 0 - vfpclassps k0, [eax], 0 + vfpclassps k0, [eax+1], 0 .att_syntax prefix diff --git a/gas/testsuite/gas/i386/noavx512-2.l b/gas/testsuite/gas/i386/noavx512-2.l index 56d1aaa..7bc4502 100644 --- a/gas/testsuite/gas/i386/noavx512-2.l +++ b/gas/testsuite/gas/i386/noavx512-2.l @@ -104,7 +104,7 @@ GAS LISTING .* [ ]*[1-9][0-9]*[ ]+\.intel_syntax noprefix [ ]*[1-9][0-9]*[ ]+\?\?\?\? 62F3FD48 vfpclasspd k0, \[eax], 0 [ ]*[1-9][0-9]*[ ]+660000 -[ ]*[1-9][0-9]*[ ]+\?\?\?\? 62F37D48 vfpclassps k0, \[eax], 0 -[ ]*[1-9][0-9]*[ ]+660000 +[ ]*[1-9][0-9]*[ ]+\?\?\?\? 62F37D48 vfpclassps k0, \[eax\+0x80], 0 +[ ]*[1-9][0-9]*[ ]+66400200 ? [ ]*[1-9][0-9]*[ ]+ #pass diff --git a/gas/testsuite/gas/i386/noavx512-2.s b/gas/testsuite/gas/i386/noavx512-2.s index 437dc04..d974bcf 100644 --- a/gas/testsuite/gas/i386/noavx512-2.s +++ b/gas/testsuite/gas/i386/noavx512-2.s @@ -52,6 +52,6 @@ .intel_syntax noprefix vfpclasspd k0, [eax], 0 - vfpclassps k0, [eax], 0 + vfpclassps k0, [eax+0x80], 0 .p2align 4 |