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authorJulian Brown <julian@codesourcery.com>2006-08-16 10:32:40 +0000
committerJulian Brown <julian@codesourcery.com>2006-08-16 10:32:40 +0000
commit07161fb2ba6b9a414073396f08c93718b28f115b (patch)
tree8d8b948a67cf47c7308a7daed75360be0a750dff /gas
parent267d2029e75d4aa99eb578f1278cb8eddec12160 (diff)
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* gas/arm/noarm.s: Add test for disabled ARM insns.
* gas/arm/noarm.d: Drive test for above. * gas/arm/noarm.l: Expected error output.
Diffstat (limited to 'gas')
-rw-r--r--gas/testsuite/ChangeLog6
-rw-r--r--gas/testsuite/gas/arm/noarm.d3
-rw-r--r--gas/testsuite/gas/arm/noarm.l3
-rw-r--r--gas/testsuite/gas/arm/noarm.s13
4 files changed, 25 insertions, 0 deletions
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 0e1cf6f..35220b6 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,9 @@
+2006-08-16 Julian Brown <julian@codesourcery.com>
+
+ * gas/arm/noarm.s: Add test for disabled ARM insns.
+ * gas/arm/noarm.d: Drive test for above.
+ * gas/arm/noarm.l: Expected error output.
+
2006-08-15 Thiemo Seufer <ths@mips.com>
Nigel Stephens <nigel@mips.com>
David Ung <davidu@mips.com>
diff --git a/gas/testsuite/gas/arm/noarm.d b/gas/testsuite/gas/arm/noarm.d
new file mode 100644
index 0000000..ae34f83
--- /dev/null
+++ b/gas/testsuite/gas/arm/noarm.d
@@ -0,0 +1,3 @@
+# name: Disallow ARM instructions on V7M
+# as:
+# error-output: noarm.l
diff --git a/gas/testsuite/gas/arm/noarm.l b/gas/testsuite/gas/arm/noarm.l
new file mode 100644
index 0000000..edc59a2
--- /dev/null
+++ b/gas/testsuite/gas/arm/noarm.l
@@ -0,0 +1,3 @@
+[^:]*: Assembler messages:
+[^:]*:12: Error: selected processor does not support ARM opcodes
+[^:]*:13: Error: attempt to use an ARM instruction on a Thumb-only processor -- `nop'
diff --git a/gas/testsuite/gas/arm/noarm.s b/gas/testsuite/gas/arm/noarm.s
new file mode 100644
index 0000000..3dadd44
--- /dev/null
+++ b/gas/testsuite/gas/arm/noarm.s
@@ -0,0 +1,13 @@
+ .arch armv7a
+ .syntax unified
+ .text
+func:
+ nop
+ movw r0, #0
+
+ .arch armv7
+ .thumb
+ nop
+ movw r0, #0
+ .arm
+ nop