diff options
| author | Maciej W. Rozycki <macro@imgtec.com> | 2016-12-23 16:49:42 +0000 |
|---|---|---|
| committer | Maciej W. Rozycki <macro@imgtec.com> | 2016-12-23 19:33:45 +0000 |
| commit | 0674ee5dada21c8deec690ca66d5b2870f13ea49 (patch) | |
| tree | 2db467165d33ec3a9d2fb87e5caa63f292513171 /gas | |
| parent | b2805ed55456cea2694d31fc8627cca17120267b (diff) | |
| download | gdb-0674ee5dada21c8deec690ca66d5b2870f13ea49.zip gdb-0674ee5dada21c8deec690ca66d5b2870f13ea49.tar.gz gdb-0674ee5dada21c8deec690ca66d5b2870f13ea49.tar.bz2 | |
MIPS16: Handle non-extensible instructions correctly
Identify non-extensible instructions in the MIPS16 opcode table and
disallow their use with the `.e' instruction size suffix in assembly and
do not interpret any EXTEND prefix present as a part of the instruction
in disassembly.
According to all versions of the MIPS16 ASE specifications the following
instructions encodings are not extensible [1][2][3][4][5][6]: I8/MOV32R,
I8/MOVR32, all RRR minor opcodes, all RR minor opcodes except from DSRA
and DSRL, and EXTEND itself, and as from revision 2.50 of the MIPS16e
ASE specifications it has been further clarified what was previously
implied, that non-extesiable instructions when preceded with an EXTEND
prefix must cause a Reserved Instruction exception [3][5].
Therefore in the presence of an EXTEND prefix none of these instructions
are supposed to be handled as extended instructions and supporting these
forms in disassembly causes confusion, and in the case of the RRR major
opcode it also clashes with the ASMACRO encoding.
References:
[1] "Product Description, MIPS16 Application-Specific Extension",
Version 1.3, MIPS Technologies, Inc., 970130, Table 3. "MIPS16
Instruction Set Summary", p. 5
[2] same, Table 5 "RR Minor Opcodes (RR-type instructions)", p.10
[3] "MIPS32 Architecture for Programmers, Volume IV-a: The MIPS16e
Application-Specific Extension to the MIPS32 Architecture", MIPS
Technologies, Inc., Document Number: MD00076, Revision 2.63, July
16, 2013, Section 3.9 "MIPS16e Instruction Summaries", pp. 37-39
[4] same, Section 3.15 "Instruction Bit Encoding", pp. 46-49
[5] "MIPS64 Architecture for Programmers, Volume IV-a: The MIPS16e
Application-Specific Extension to the MIPS64 Architecture", MIPS
Technologies, Inc., Document Number: MD00077, Revision 2.60, June
25, 2008, Section 1.9 "MIPS16e Instruction Summaries", pp. 38-41
[6] same, Section 1.15 "Instruction Bit Encoding", pp. 48-51
include/
* opcode/mips.h (INSN2_SHORT_ONLY): New macro.
gas/
* config/tc-mips.c (is_size_valid_16): Disallow a `.e' suffix
instruction size override for INSN2_SHORT_ONLY opcode table
entries.
* testsuite/gas/mips/mips16-extend-swap.d: Adjust output.
* testsuite/gas/mips/mips16-macro-e.l: Adjust error messages.
* testsuite/gas/mips/mips16-32@mips16-macro-e.l: Adjust error
messages.
* testsuite/gas/mips/mips16e-32@mips16-macro-e.l: Adjust error
messages.
* testsuite/gas/mips/mips16-insn-e.d: New test.
* testsuite/gas/mips/mips16-insn-t.d: New test.
* testsuite/gas/mips/mips16-32@mips16-insn-e.d: New test.
* testsuite/gas/mips/mips16-64@mips16-insn-e.d: New test.
* testsuite/gas/mips/mips16e-32@mips16-insn-e.d: New test.
* testsuite/gas/mips/mips16-32@mips16-insn-t.d: New test.
* testsuite/gas/mips/mips16-64@mips16-insn-t.d: New test.
* testsuite/gas/mips/mips16e-32@mips16-insn-t.d: New test.
* testsuite/gas/mips/mips16-insn-e.l: New stderr output.
* testsuite/gas/mips/mips16-insn-t.l: New stderr output.
* testsuite/gas/mips/mips16-32@mips16-insn-e.l: New stderr
output.
* testsuite/gas/mips/mips16-64@mips16-insn-e.l: New stderr
output.
* testsuite/gas/mips/mips16e-32@mips16-insn-e.l: New stderr
output.
* testsuite/gas/mips/mips16-32@mips16-insn-t.l: New stderr
output.
* testsuite/gas/mips/mips16-64@mips16-insn-t.l: New stderr
output.
* testsuite/gas/mips/mips16e-32@mips16-insn-t.l: New stderr
output.
* testsuite/gas/mips/mips16-insn-e.s: New test source.
* testsuite/gas/mips/mips16-insn-t.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new tests.
opcodes/
* mips-dis.c (print_insn_mips16): Disallow EXTEND prefix
matching for INSN2_SHORT_ONLY opcode table entries.
* mips16-opc.c (SH): New macro.
(mips16_opcodes): Set SH in `pinfo2' for non-extensible
instruction entries: "nop", "addu", "and", "break", "cmp",
"daddu", "ddiv", "ddivu", "div", "divu", "dmult", "dmultu",
"drem", "dremu", "dsllv", "dsll", "dsrav", "dsra", "dsrlv",
"dsrl", "dsubu", "exit", "entry", "jalr", "jal", "jr", "j",
"jalrc", "jrc", "mfhi", "mflo", "move", "mult", "multu", "neg",
"not", "or", "rem", "remu", "sllv", "sll", "slt", "sltu",
"srav", "sra", "srlv", "srl", "subu", "xor", "sdbbp", "seb",
"seh", "sew", "zeb", "zeh", "zew" and "extend".
binutils/
* testsuite/binutils-all/mips/mips16-extend-insn.d: New test.
* testsuite/binutils-all/mips/mips16-extend-insn.s: New test
source.
* testsuite/binutils-all/mips/mips.exp: Run the new tests.
Diffstat (limited to 'gas')
25 files changed, 1135 insertions, 43 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index f5dd23d..2a2fafb 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,5 +1,42 @@ 2016-12-23 Maciej W. Rozycki <macro@imgtec.com> + * config/tc-mips.c (is_size_valid_16): Disallow a `.e' suffix + instruction size override for INSN2_SHORT_ONLY opcode table + entries. + * testsuite/gas/mips/mips16-extend-swap.d: Adjust output. + * testsuite/gas/mips/mips16-macro-e.l: Adjust error messages. + * testsuite/gas/mips/mips16-32@mips16-macro-e.l: Adjust error + messages. + * testsuite/gas/mips/mips16e-32@mips16-macro-e.l: Adjust error + messages. + * testsuite/gas/mips/mips16-insn-e.d: New test. + * testsuite/gas/mips/mips16-insn-t.d: New test. + * testsuite/gas/mips/mips16-32@mips16-insn-e.d: New test. + * testsuite/gas/mips/mips16-64@mips16-insn-e.d: New test. + * testsuite/gas/mips/mips16e-32@mips16-insn-e.d: New test. + * testsuite/gas/mips/mips16-32@mips16-insn-t.d: New test. + * testsuite/gas/mips/mips16-64@mips16-insn-t.d: New test. + * testsuite/gas/mips/mips16e-32@mips16-insn-t.d: New test. + * testsuite/gas/mips/mips16-insn-e.l: New stderr output. + * testsuite/gas/mips/mips16-insn-t.l: New stderr output. + * testsuite/gas/mips/mips16-32@mips16-insn-e.l: New stderr + output. + * testsuite/gas/mips/mips16-64@mips16-insn-e.l: New stderr + output. + * testsuite/gas/mips/mips16e-32@mips16-insn-e.l: New stderr + output. + * testsuite/gas/mips/mips16-32@mips16-insn-t.l: New stderr + output. + * testsuite/gas/mips/mips16-64@mips16-insn-t.l: New stderr + output. + * testsuite/gas/mips/mips16e-32@mips16-insn-t.l: New stderr + output. + * testsuite/gas/mips/mips16-insn-e.s: New test source. + * testsuite/gas/mips/mips16-insn-t.s: New test source. + * testsuite/gas/mips/mips.exp: Run the new tests. + +2016-12-23 Maciej W. Rozycki <macro@imgtec.com> + * config/tc-mips.c (match_mips16_insn): Remove the `6' operand code special case and its associated comment. diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c index 7105604..562da64 100644 --- a/gas/config/tc-mips.c +++ b/gas/config/tc-mips.c @@ -3293,6 +3293,8 @@ is_size_valid_16 (const struct mips_opcode *mo) return FALSE; if (forced_insn_length == 2 && mips_opcode_32bit_p (mo)) return FALSE; + if (forced_insn_length == 4 && (mo->pinfo2 & INSN2_SHORT_ONLY)) + return FALSE; return TRUE; } diff --git a/gas/testsuite/gas/mips/mips.exp b/gas/testsuite/gas/mips/mips.exp index a5c722c..60d956d 100644 --- a/gas/testsuite/gas/mips/mips.exp +++ b/gas/testsuite/gas/mips/mips.exp @@ -877,6 +877,10 @@ if { [istarget mips*-*-vxworks*] } { [mips_arch_list_matching mips16-32] run_dump_test_arches "mips16-macro-e" \ [mips_arch_list_matching mips16-32] + run_dump_test_arches "mips16-insn-t" \ + [mips_arch_list_matching mips16-32] + run_dump_test_arches "mips16-insn-e" \ + [mips_arch_list_matching mips16-32] # Check MIPS16e extensions run_dump_test_arches "mips16e" [mips_arch_list_matching mips16e-32] run_dump_test_arches "mips16e-64" [mips_arch_list_matching mips16e-32] diff --git a/gas/testsuite/gas/mips/mips16-32@mips16-insn-e.d b/gas/testsuite/gas/mips/mips16-32@mips16-insn-e.d new file mode 100644 index 0000000..28e2f32 --- /dev/null +++ b/gas/testsuite/gas/mips/mips16-32@mips16-insn-e.d @@ -0,0 +1,4 @@ +#as: -32 +#name: MIPS16 explicit extended instructions +#error-output: mips16-32@mips16-insn-e.l +#source: mips16-insn-e.s diff --git a/gas/testsuite/gas/mips/mips16-32@mips16-insn-e.l b/gas/testsuite/gas/mips/mips16-32@mips16-insn-e.l new file mode 100644 index 0000000..0d43204 --- /dev/null +++ b/gas/testsuite/gas/mips/mips16-32@mips16-insn-e.l @@ -0,0 +1,133 @@ +.*: Assembler messages: +.*:4: Warning: extended operand requested but not required +.*:5: Warning: extended operand requested but not required +.*:8: Warning: extended operand requested but not required +.*:9: Warning: extended operand requested but not required +.*:23: Warning: extended operand requested but not required +.*:24: Error: opcode not supported on this processor: mips1 \(mips1\) `dsll\.e \$16,\$16,8' +.*:25: Warning: extended operand requested but not required +.*:26: Warning: extended operand requested but not required +.*:28: Error: opcode not supported on this processor: mips1 \(mips1\) `ld\.e \$16,0\(\$16\)' +.*:30: Warning: extended operand requested but not required +.*:31: Warning: extended operand requested but not required +.*:32: Error: opcode not supported on this processor: mips1 \(mips1\) `daddiu\.e \$16,\$16,0' +.*:33: Error: opcode not supported on this processor: mips1 \(mips1\) `daddu\.e \$16,\$16,0' +.*:35: Warning: extended operand requested but not required +.*:36: Warning: extended operand requested but not required +.*:38: Warning: extended operand requested but not required +.*:39: Warning: extended operand requested but not required +.*:41: Warning: extended operand requested but not required +.*:42: Warning: extended operand requested but not required +.*:46: Warning: extended operand requested but not required +.*:47: Warning: extended operand requested but not required +.*:48: Warning: extended operand requested but not required +.*:49: Warning: extended operand requested but not required +.*:50: Warning: extended operand requested but not required +.*:51: Error: opcode not supported on this processor: mips1 \(mips1\) `restore\.e 128' +.*:52: Error: opcode not supported on this processor: mips1 \(mips1\) `save\.e 128' +.*:53: Error: unrecognized extended version of MIPS16 opcode `nop\.e ' +.*:54: Error: unrecognized extended version of MIPS16 opcode `move\.e \$0,\$16' +.*:55: Error: unrecognized extended version of MIPS16 opcode `move\.e \$16,\$0' +.*:57: Warning: extended operand requested but not required +.*:59: Warning: extended operand requested but not required +.*:60: Warning: extended operand requested but not required +.*:62: Error: opcode not supported on this processor: mips1 \(mips1\) `sd\.e \$16,0\(\$16\)' +.*:64: Warning: extended operand requested but not required +.*:66: Warning: extended operand requested but not required +.*:68: Warning: extended operand requested but not required +.*:70: Warning: extended operand requested but not required +.*:72: Warning: extended operand requested but not required +.*:74: Warning: extended operand requested but not required +.*:77: Warning: extended operand requested but not required +.*:80: Error: opcode not supported on this processor: mips1 \(mips1\) `lwu\.e \$16,0\(\$16\)' +.*:82: Warning: extended operand requested but not required +.*:84: Warning: extended operand requested but not required +.*:86: Warning: extended operand requested but not required +.*:88: Warning: extended operand requested but not required +.*:90: Error: opcode not supported on this processor: mips1 \(mips1\) `daddu\.e \$16,\$16,\$16' +.*:91: Error: invalid operands `addu\.e \$16,\$16,\$16' +.*:92: Error: opcode not supported on this processor: mips1 \(mips1\) `dsubu\.e \$16,\$16,\$16' +.*:93: Error: unrecognized extended version of MIPS16 opcode `subu\.e \$16,\$16,\$16' +.*:95: Error: unrecognized extended version of MIPS16 opcode `jr\.e \$16' +.*:97: Error: unrecognized extended version of MIPS16 opcode `j\.e \$16' +.*:99: Error: unrecognized extended version of MIPS16 opcode `jr\.e \$31' +.*:101: Error: unrecognized extended version of MIPS16 opcode `j\.e \$31' +.*:103: Error: unrecognized extended version of MIPS16 opcode `jalr\.e \$16' +.*:105: Error: unrecognized extended version of MIPS16 opcode `jalr\.e \$31,\$16' +.*:107: Error: operand 1 must be an immediate expression `jal\.e \$16' +.*:109: Error: operand 1 must be an immediate expression `jal\.e \$31,\$16' +.*:111: Error: opcode not supported on this processor: mips1 \(mips1\) `jrc\.e \$16' +.*:112: Error: opcode not supported on this processor: mips1 \(mips1\) `jrc\.e \$31' +.*:113: Error: opcode not supported on this processor: mips1 \(mips1\) `jalrc\.e \$16' +.*:114: Error: opcode not supported on this processor: mips1 \(mips1\) `jalrc\.e \$31,\$16' +.*:115: Error: opcode not supported on this processor: mips1 \(mips1\) `sdbbp\.e 0' +.*:116: Error: invalid operands `slt\.e \$16,\$16' +.*:117: Error: invalid operands `sltu\.e \$16,\$16' +.*:118: Error: unrecognized extended version of MIPS16 opcode `sllv\.e \$16,\$16' +.*:119: Error: invalid operands `sll\.e \$16,\$16' +.*:120: Error: unrecognized extended version of MIPS16 opcode `break\.e 0' +.*:121: Error: unrecognized extended version of MIPS16 opcode `srlv\.e \$16,\$16' +.*:122: Error: invalid operands `srl\.e \$16,\$16' +.*:123: Error: unrecognized extended version of MIPS16 opcode `srav\.e \$16,\$16' +.*:124: Error: invalid operands `sra\.e \$16,\$16' +.*:125: Error: opcode not supported on this processor: mips1 \(mips1\) `dsrl\.e \$16,8' +.*:126: Error: unrecognized extended version of MIPS16 opcode `entry\.e ' +.*:127: Error: unrecognized extended version of MIPS16 opcode `entry\.e \$31' +.*:128: Error: unrecognized extended version of MIPS16 opcode `exit\.e \$f0' +.*:129: Error: unrecognized extended version of MIPS16 opcode `exit\.e' +.*:130: Error: invalid operands `cmp\.e \$16,\$16' +.*:131: Error: unrecognized extended version of MIPS16 opcode `neg\.e \$16,\$16' +.*:132: Error: unrecognized extended version of MIPS16 opcode `and\.e \$16,\$16' +.*:133: Error: unrecognized extended version of MIPS16 opcode `or\.e \$16,\$16' +.*:134: Error: unrecognized extended version of MIPS16 opcode `xor\.e \$16,\$16' +.*:135: Error: unrecognized extended version of MIPS16 opcode `not\.e \$16,\$16' +.*:136: Error: unrecognized extended version of MIPS16 opcode `mfhi\.e \$16' +.*:137: Error: opcode not supported on this processor: mips1 \(mips1\) `zeb\.e \$16' +.*:138: Error: opcode not supported on this processor: mips1 \(mips1\) `zeh\.e \$16' +.*:139: Error: opcode not supported on this processor: mips1 \(mips1\) `zew\.e \$16' +.*:140: Error: opcode not supported on this processor: mips1 \(mips1\) `seb\.e \$16' +.*:141: Error: opcode not supported on this processor: mips1 \(mips1\) `seh\.e \$16' +.*:142: Error: opcode not supported on this processor: mips1 \(mips1\) `sew\.e \$16' +.*:143: Error: unrecognized extended version of MIPS16 opcode `mflo\.e \$16' +.*:144: Error: opcode not supported on this processor: mips1 \(mips1\) `dsra\.e \$16,8' +.*:145: Error: opcode not supported on this processor: mips1 \(mips1\) `dsllv\.e \$16,\$16' +.*:146: Error: opcode not supported on this processor: mips1 \(mips1\) `dsll\.e \$16,\$16' +.*:147: Error: opcode not supported on this processor: mips1 \(mips1\) `dsrlv\.e \$16,\$16' +.*:148: Error: opcode not supported on this processor: mips1 \(mips1\) `dsrl\.e \$16,\$16' +.*:149: Error: opcode not supported on this processor: mips1 \(mips1\) `dsrav\.e \$16,\$16' +.*:150: Error: opcode not supported on this processor: mips1 \(mips1\) `dsra\.e \$16,\$16' +.*:151: Error: unrecognized extended version of MIPS16 opcode `mult\.e \$16,\$16' +.*:152: Error: unrecognized extended version of MIPS16 opcode `multu\.e \$16,\$16' +.*:153: Error: unrecognized extended version of MIPS16 opcode `div\.e \$0,\$16,\$16' +.*:154: Error: unrecognized extended version of MIPS16 opcode `rem\.e \$0,\$16,\$16' +.*:155: Error: unrecognized extended version of MIPS16 opcode `divu\.e \$0,\$16,\$16' +.*:156: Error: unrecognized extended version of MIPS16 opcode `remu\.e \$0,\$16,\$16' +.*:157: Error: opcode not supported on this processor: mips1 \(mips1\) `dmult\.e \$16,\$16' +.*:158: Error: opcode not supported on this processor: mips1 \(mips1\) `dmultu\.e \$16,\$16' +.*:159: Error: opcode not supported on this processor: mips1 \(mips1\) `ddiv\.e \$0,\$16,\$16' +.*:160: Error: opcode not supported on this processor: mips1 \(mips1\) `drem\.e \$0,\$16,\$16' +.*:161: Error: opcode not supported on this processor: mips1 \(mips1\) `ddivu\.e \$0,\$16,\$16' +.*:162: Error: opcode not supported on this processor: mips1 \(mips1\) `dremu\.e \$0,\$16,\$16' +.*:164: Error: unrecognized extended version of MIPS16 opcode `extend\.e 0' +.*:166: Error: opcode not supported on this processor: mips1 \(mips1\) `ld\.e \$16,0\(\$29\)' +.*:167: Error: opcode not supported on this processor: mips1 \(mips1\) `sd\.e \$16,0\(\$29\)' +.*:168: Error: opcode not supported on this processor: mips1 \(mips1\) `sd\.e \$31,0\(\$29\)' +.*:169: Error: opcode not supported on this processor: mips1 \(mips1\) `daddiu\.e \$29,0' +.*:170: Error: opcode not supported on this processor: mips1 \(mips1\) `daddiu\.e \$29,\$29,0' +.*:171: Error: opcode not supported on this processor: mips1 \(mips1\) `daddu\.e \$29,0' +.*:172: Error: opcode not supported on this processor: mips1 \(mips1\) `daddu\.e \$29,\$29,0' +.*:174: Error: opcode not supported on this processor: mips1 \(mips1\) `ld\.e \$16,0\(\$pc\)' +.*:175: Error: opcode not supported on this processor: mips1 \(mips1\) `ld\.e \$16,\.-3' +.*:176: Error: opcode not supported on this processor: mips1 \(mips1\) `daddiu\.e \$16,0' +.*:177: Error: opcode not supported on this processor: mips1 \(mips1\) `daddu\.e \$16,0' +.*:179: Error: opcode not supported on this processor: mips1 \(mips1\) `daddiu\.e \$16,\$pc,0' +.*:180: Error: opcode not supported on this processor: mips1 \(mips1\) `daddu\.e \$16,\$pc,0' +.*:181: Error: opcode not supported on this processor: mips1 \(mips1\) `dla\.e \$16,\.-1' +.*:182: Error: opcode not supported on this processor: mips1 \(mips1\) `daddiu\.e \$16,\$sp,0' +.*:183: Error: opcode not supported on this processor: mips1 \(mips1\) `daddu\.e \$16,\$sp,0' +.*:10: Warning: extended operand requested but not required +.*:12: Warning: extended operand requested but not required +.*:19: Warning: extended operand requested but not required +.*:21: Warning: extended operand requested but not required +.*:44: Warning: extended operand requested but not required +.*:45: Warning: extended operand requested but not required diff --git a/gas/testsuite/gas/mips/mips16-32@mips16-insn-t.d b/gas/testsuite/gas/mips/mips16-32@mips16-insn-t.d new file mode 100644 index 0000000..499e6aa --- /dev/null +++ b/gas/testsuite/gas/mips/mips16-32@mips16-insn-t.d @@ -0,0 +1,4 @@ +#as: -32 +#name: MIPS16 explicit unextended instructions +#error-output: mips16-32@mips16-insn-t.l +#source: mips16-insn-t.s diff --git a/gas/testsuite/gas/mips/mips16-32@mips16-insn-t.l b/gas/testsuite/gas/mips/mips16-32@mips16-insn-t.l new file mode 100644 index 0000000..a632d59 --- /dev/null +++ b/gas/testsuite/gas/mips/mips16-32@mips16-insn-t.l @@ -0,0 +1,54 @@ +.*: Assembler messages: +.*:14: Error: invalid operands `jal\.t 0' +.*:16: Error: unrecognized unextended version of MIPS16 opcode `jalx\.t 0' +.*:24: Error: opcode not supported on this processor: mips1 \(mips1\) `dsll\.t \$16,\$16,8' +.*:28: Error: opcode not supported on this processor: mips1 \(mips1\) `ld\.t \$16,0\(\$16\)' +.*:32: Error: opcode not supported on this processor: mips1 \(mips1\) `daddiu\.t \$16,\$16,0' +.*:33: Error: opcode not supported on this processor: mips1 \(mips1\) `daddu\.t \$16,\$16,0' +.*:51: Error: opcode not supported on this processor: mips1 \(mips1\) `restore\.t 128' +.*:52: Error: opcode not supported on this processor: mips1 \(mips1\) `save\.t 128' +.*:62: Error: opcode not supported on this processor: mips1 \(mips1\) `sd\.t \$16,0\(\$16\)' +.*:80: Error: opcode not supported on this processor: mips1 \(mips1\) `lwu\.t \$16,0\(\$16\)' +.*:90: Error: opcode not supported on this processor: mips1 \(mips1\) `daddu\.t \$16,\$16,\$16' +.*:92: Error: opcode not supported on this processor: mips1 \(mips1\) `dsubu\.t \$16,\$16,\$16' +.*:111: Error: opcode not supported on this processor: mips1 \(mips1\) `jrc\.t \$16' +.*:112: Error: opcode not supported on this processor: mips1 \(mips1\) `jrc\.t \$31' +.*:113: Error: opcode not supported on this processor: mips1 \(mips1\) `jalrc\.t \$16' +.*:114: Error: opcode not supported on this processor: mips1 \(mips1\) `jalrc\.t \$31,\$16' +.*:115: Error: opcode not supported on this processor: mips1 \(mips1\) `sdbbp\.t 0' +.*:125: Error: opcode not supported on this processor: mips1 \(mips1\) `dsrl\.t \$16,8' +.*:137: Error: opcode not supported on this processor: mips1 \(mips1\) `zeb\.t \$16' +.*:138: Error: opcode not supported on this processor: mips1 \(mips1\) `zeh\.t \$16' +.*:139: Error: opcode not supported on this processor: mips1 \(mips1\) `zew\.t \$16' +.*:140: Error: opcode not supported on this processor: mips1 \(mips1\) `seb\.t \$16' +.*:141: Error: opcode not supported on this processor: mips1 \(mips1\) `seh\.t \$16' +.*:142: Error: opcode not supported on this processor: mips1 \(mips1\) `sew\.t \$16' +.*:144: Error: opcode not supported on this processor: mips1 \(mips1\) `dsra\.t \$16,8' +.*:145: Error: opcode not supported on this processor: mips1 \(mips1\) `dsllv\.t \$16,\$16' +.*:146: Error: opcode not supported on this processor: mips1 \(mips1\) `dsll\.t \$16,\$16' +.*:147: Error: opcode not supported on this processor: mips1 \(mips1\) `dsrlv\.t \$16,\$16' +.*:148: Error: opcode not supported on this processor: mips1 \(mips1\) `dsrl\.t \$16,\$16' +.*:149: Error: opcode not supported on this processor: mips1 \(mips1\) `dsrav\.t \$16,\$16' +.*:150: Error: opcode not supported on this processor: mips1 \(mips1\) `dsra\.t \$16,\$16' +.*:157: Error: opcode not supported on this processor: mips1 \(mips1\) `dmult\.t \$16,\$16' +.*:158: Error: opcode not supported on this processor: mips1 \(mips1\) `dmultu\.t \$16,\$16' +.*:159: Error: opcode not supported on this processor: mips1 \(mips1\) `ddiv\.t \$0,\$16,\$16' +.*:160: Error: opcode not supported on this processor: mips1 \(mips1\) `drem\.t \$0,\$16,\$16' +.*:161: Error: opcode not supported on this processor: mips1 \(mips1\) `ddivu\.t \$0,\$16,\$16' +.*:162: Error: opcode not supported on this processor: mips1 \(mips1\) `dremu\.t \$0,\$16,\$16' +.*:166: Error: opcode not supported on this processor: mips1 \(mips1\) `ld\.t \$16,0\(\$29\)' +.*:167: Error: opcode not supported on this processor: mips1 \(mips1\) `sd\.t \$16,0\(\$29\)' +.*:168: Error: opcode not supported on this processor: mips1 \(mips1\) `sd\.t \$31,0\(\$29\)' +.*:169: Error: opcode not supported on this processor: mips1 \(mips1\) `daddiu\.t \$29,0' +.*:170: Error: opcode not supported on this processor: mips1 \(mips1\) `daddiu\.t \$29,\$29,0' +.*:171: Error: opcode not supported on this processor: mips1 \(mips1\) `daddu\.t \$29,0' +.*:172: Error: opcode not supported on this processor: mips1 \(mips1\) `daddu\.t \$29,\$29,0' +.*:174: Error: opcode not supported on this processor: mips1 \(mips1\) `ld\.t \$16,0\(\$pc\)' +.*:175: Error: opcode not supported on this processor: mips1 \(mips1\) `ld\.t \$16,\.-3' +.*:176: Error: opcode not supported on this processor: mips1 \(mips1\) `daddiu\.t \$16,0' +.*:177: Error: opcode not supported on this processor: mips1 \(mips1\) `daddu\.t \$16,0' +.*:179: Error: opcode not supported on this processor: mips1 \(mips1\) `daddiu\.t \$16,\$pc,0' +.*:180: Error: opcode not supported on this processor: mips1 \(mips1\) `daddu\.t \$16,\$pc,0' +.*:181: Error: opcode not supported on this processor: mips1 \(mips1\) `dla\.t \$16,\.-1' +.*:182: Error: opcode not supported on this processor: mips1 \(mips1\) `daddiu\.t \$16,\$sp,0' +.*:183: Error: opcode not supported on this processor: mips1 \(mips1\) `daddu\.t \$16,\$sp,0' diff --git a/gas/testsuite/gas/mips/mips16-32@mips16-macro-e.l b/gas/testsuite/gas/mips/mips16-32@mips16-macro-e.l index ace5989..a66559b 100644 --- a/gas/testsuite/gas/mips/mips16-32@mips16-macro-e.l +++ b/gas/testsuite/gas/mips/mips16-32@mips16-macro-e.l @@ -1,20 +1,20 @@ .*: Assembler messages: -.*:4: Error: invalid operands `div\.e \$2,\$3,\$4' -.*:5: Error: invalid operands `divu\.e \$3,\$4,\$5' +.*:4: Error: unrecognized extended version of MIPS16 opcode `div\.e \$2,\$3,\$4' +.*:5: Error: unrecognized extended version of MIPS16 opcode `divu\.e \$3,\$4,\$5' .*:6: Error: opcode not supported on this processor: mips1 \(mips1\) `ddiv\.e \$4,\$5,\$6' .*:7: Error: opcode not supported on this processor: mips1 \(mips1\) `ddivu\.e \$5,\$6,\$7' -.*:8: Error: invalid operands `rem\.e \$6,\$7,\$16' -.*:9: Error: invalid operands `remu\.e \$6,\$7,\$17' +.*:8: Error: unrecognized extended version of MIPS16 opcode `rem\.e \$6,\$7,\$16' +.*:9: Error: unrecognized extended version of MIPS16 opcode `remu\.e \$6,\$7,\$17' .*:10: Error: opcode not supported on this processor: mips1 \(mips1\) `drem\.e \$2,\$3,\$4' .*:11: Error: opcode not supported on this processor: mips1 \(mips1\) `dremu\.e \$3,\$4,\$5' .*:12: Error: unrecognized extended version of MIPS16 opcode `mul\.e \$4,\$5,\$6' .*:13: Error: opcode not supported on this processor: mips1 \(mips1\) `dmul\.e \$5,\$6,\$7' -.*:14: Error: invalid operands `subu\.e \$2,-32767' -.*:15: Error: invalid operands `subu\.e \$3,16' -.*:16: Error: invalid operands `subu\.e \$4,32768' -.*:17: Error: invalid operands `subu\.e \$3,\$7,-16383' -.*:18: Error: invalid operands `subu\.e \$4,\$16,4' -.*:19: Error: invalid operands `subu\.e \$5,\$17,16384' +.*:14: Error: unrecognized extended version of MIPS16 opcode `subu\.e \$2,-32767' +.*:15: Error: unrecognized extended version of MIPS16 opcode `subu\.e \$3,16' +.*:16: Error: unrecognized extended version of MIPS16 opcode `subu\.e \$4,32768' +.*:17: Error: unrecognized extended version of MIPS16 opcode `subu\.e \$3,\$7,-16383' +.*:18: Error: unrecognized extended version of MIPS16 opcode `subu\.e \$4,\$16,4' +.*:19: Error: unrecognized extended version of MIPS16 opcode `subu\.e \$5,\$17,16384' .*:20: Error: opcode not supported on this processor: mips1 \(mips1\) `dsubu\.e \$4,-32767' .*:21: Error: opcode not supported on this processor: mips1 \(mips1\) `dsubu\.e \$6,6' .*:22: Error: opcode not supported on this processor: mips1 \(mips1\) `dsubu\.e \$7,32768' diff --git a/gas/testsuite/gas/mips/mips16-64@mips16-insn-e.d b/gas/testsuite/gas/mips/mips16-64@mips16-insn-e.d new file mode 100644 index 0000000..7b1814d --- /dev/null +++ b/gas/testsuite/gas/mips/mips16-64@mips16-insn-e.d @@ -0,0 +1,4 @@ +#as: -32 +#name: MIPS16 explicit extended instructions +#error-output: mips16-64@mips16-insn-e.l +#source: mips16-insn-e.s diff --git a/gas/testsuite/gas/mips/mips16-64@mips16-insn-e.l b/gas/testsuite/gas/mips/mips16-64@mips16-insn-e.l new file mode 100644 index 0000000..3cf4de7 --- /dev/null +++ b/gas/testsuite/gas/mips/mips16-64@mips16-insn-e.l @@ -0,0 +1,132 @@ +.*: Assembler messages: +.*:4: Warning: extended operand requested but not required +.*:5: Warning: extended operand requested but not required +.*:8: Warning: extended operand requested but not required +.*:9: Warning: extended operand requested but not required +.*:23: Warning: extended operand requested but not required +.*:24: Warning: extended operand requested but not required +.*:25: Warning: extended operand requested but not required +.*:26: Warning: extended operand requested but not required +.*:28: Warning: extended operand requested but not required +.*:30: Warning: extended operand requested but not required +.*:31: Warning: extended operand requested but not required +.*:32: Warning: extended operand requested but not required +.*:33: Warning: extended operand requested but not required +.*:35: Warning: extended operand requested but not required +.*:36: Warning: extended operand requested but not required +.*:38: Warning: extended operand requested but not required +.*:39: Warning: extended operand requested but not required +.*:41: Warning: extended operand requested but not required +.*:42: Warning: extended operand requested but not required +.*:46: Warning: extended operand requested but not required +.*:47: Warning: extended operand requested but not required +.*:48: Warning: extended operand requested but not required +.*:49: Warning: extended operand requested but not required +.*:50: Warning: extended operand requested but not required +.*:51: Error: opcode not supported on this processor: mips3 \(mips3\) `restore\.e 128' +.*:52: Error: opcode not supported on this processor: mips3 \(mips3\) `save\.e 128' +.*:53: Error: unrecognized extended version of MIPS16 opcode `nop\.e ' +.*:54: Error: unrecognized extended version of MIPS16 opcode `move\.e \$0,\$16' +.*:55: Error: unrecognized extended version of MIPS16 opcode `move\.e \$16,\$0' +.*:57: Warning: extended operand requested but not required +.*:59: Warning: extended operand requested but not required +.*:60: Warning: extended operand requested but not required +.*:62: Warning: extended operand requested but not required +.*:64: Warning: extended operand requested but not required +.*:66: Warning: extended operand requested but not required +.*:68: Warning: extended operand requested but not required +.*:70: Warning: extended operand requested but not required +.*:72: Warning: extended operand requested but not required +.*:74: Warning: extended operand requested but not required +.*:77: Warning: extended operand requested but not required +.*:80: Warning: extended operand requested but not required +.*:82: Warning: extended operand requested but not required +.*:84: Warning: extended operand requested but not required +.*:86: Warning: extended operand requested but not required +.*:88: Warning: extended operand requested but not required +.*:90: Error: invalid operands `daddu\.e \$16,\$16,\$16' +.*:91: Error: invalid operands `addu\.e \$16,\$16,\$16' +.*:92: Error: unrecognized extended version of MIPS16 opcode `dsubu\.e \$16,\$16,\$16' +.*:93: Error: unrecognized extended version of MIPS16 opcode `subu\.e \$16,\$16,\$16' +.*:95: Error: unrecognized extended version of MIPS16 opcode `jr\.e \$16' +.*:97: Error: unrecognized extended version of MIPS16 opcode `j\.e \$16' +.*:99: Error: unrecognized extended version of MIPS16 opcode `jr\.e \$31' +.*:101: Error: unrecognized extended version of MIPS16 opcode `j\.e \$31' +.*:103: Error: unrecognized extended version of MIPS16 opcode `jalr\.e \$16' +.*:105: Error: unrecognized extended version of MIPS16 opcode `jalr\.e \$31,\$16' +.*:107: Error: operand 1 must be an immediate expression `jal\.e \$16' +.*:109: Error: operand 1 must be an immediate expression `jal\.e \$31,\$16' +.*:111: Error: opcode not supported on this processor: mips3 \(mips3\) `jrc\.e \$16' +.*:112: Error: opcode not supported on this processor: mips3 \(mips3\) `jrc\.e \$31' +.*:113: Error: opcode not supported on this processor: mips3 \(mips3\) `jalrc\.e \$16' +.*:114: Error: opcode not supported on this processor: mips3 \(mips3\) `jalrc\.e \$31,\$16' +.*:115: Error: opcode not supported on this processor: mips3 \(mips3\) `sdbbp\.e 0' +.*:116: Error: invalid operands `slt\.e \$16,\$16' +.*:117: Error: invalid operands `sltu\.e \$16,\$16' +.*:118: Error: unrecognized extended version of MIPS16 opcode `sllv\.e \$16,\$16' +.*:119: Error: invalid operands `sll\.e \$16,\$16' +.*:120: Error: unrecognized extended version of MIPS16 opcode `break\.e 0' +.*:121: Error: unrecognized extended version of MIPS16 opcode `srlv\.e \$16,\$16' +.*:122: Error: invalid operands `srl\.e \$16,\$16' +.*:123: Error: unrecognized extended version of MIPS16 opcode `srav\.e \$16,\$16' +.*:124: Error: invalid operands `sra\.e \$16,\$16' +.*:125: Warning: extended operand requested but not required +.*:126: Error: unrecognized extended version of MIPS16 opcode `entry\.e ' +.*:127: Error: unrecognized extended version of MIPS16 opcode `entry\.e \$31' +.*:128: Error: unrecognized extended version of MIPS16 opcode `exit\.e \$f0' +.*:129: Error: unrecognized extended version of MIPS16 opcode `exit\.e' +.*:130: Error: invalid operands `cmp\.e \$16,\$16' +.*:131: Error: unrecognized extended version of MIPS16 opcode `neg\.e \$16,\$16' +.*:132: Error: unrecognized extended version of MIPS16 opcode `and\.e \$16,\$16' +.*:133: Error: unrecognized extended version of MIPS16 opcode `or\.e \$16,\$16' +.*:134: Error: unrecognized extended version of MIPS16 opcode `xor\.e \$16,\$16' +.*:135: Error: unrecognized extended version of MIPS16 opcode `not\.e \$16,\$16' +.*:136: Error: unrecognized extended version of MIPS16 opcode `mfhi\.e \$16' +.*:137: Error: opcode not supported on this processor: mips3 \(mips3\) `zeb\.e \$16' +.*:138: Error: opcode not supported on this processor: mips3 \(mips3\) `zeh\.e \$16' +.*:139: Error: opcode not supported on this processor: mips3 \(mips3\) `zew\.e \$16' +.*:140: Error: opcode not supported on this processor: mips3 \(mips3\) `seb\.e \$16' +.*:141: Error: opcode not supported on this processor: mips3 \(mips3\) `seh\.e \$16' +.*:142: Error: opcode not supported on this processor: mips3 \(mips3\) `sew\.e \$16' +.*:143: Error: unrecognized extended version of MIPS16 opcode `mflo\.e \$16' +.*:144: Warning: extended operand requested but not required +.*:145: Error: unrecognized extended version of MIPS16 opcode `dsllv\.e \$16,\$16' +.*:146: Error: invalid operands `dsll\.e \$16,\$16' +.*:147: Error: unrecognized extended version of MIPS16 opcode `dsrlv\.e \$16,\$16' +.*:148: Error: invalid operands `dsrl\.e \$16,\$16' +.*:149: Error: unrecognized extended version of MIPS16 opcode `dsrav\.e \$16,\$16' +.*:150: Error: invalid operands `dsra\.e \$16,\$16' +.*:151: Error: unrecognized extended version of MIPS16 opcode `mult\.e \$16,\$16' +.*:152: Error: unrecognized extended version of MIPS16 opcode `multu\.e \$16,\$16' +.*:153: Error: unrecognized extended version of MIPS16 opcode `div\.e \$0,\$16,\$16' +.*:154: Error: unrecognized extended version of MIPS16 opcode `rem\.e \$0,\$16,\$16' +.*:155: Error: unrecognized extended version of MIPS16 opcode `divu\.e \$0,\$16,\$16' +.*:156: Error: unrecognized extended version of MIPS16 opcode `remu\.e \$0,\$16,\$16' +.*:157: Error: unrecognized extended version of MIPS16 opcode `dmult\.e \$16,\$16' +.*:158: Error: unrecognized extended version of MIPS16 opcode `dmultu\.e \$16,\$16' +.*:159: Error: unrecognized extended version of MIPS16 opcode `ddiv\.e \$0,\$16,\$16' +.*:160: Error: unrecognized extended version of MIPS16 opcode `drem\.e \$0,\$16,\$16' +.*:161: Error: unrecognized extended version of MIPS16 opcode `ddivu\.e \$0,\$16,\$16' +.*:162: Error: unrecognized extended version of MIPS16 opcode `dremu\.e \$0,\$16,\$16' +.*:164: Error: unrecognized extended version of MIPS16 opcode `extend\.e 0' +.*:166: Warning: extended operand requested but not required +.*:167: Warning: extended operand requested but not required +.*:168: Warning: extended operand requested but not required +.*:169: Warning: extended operand requested but not required +.*:170: Warning: extended operand requested but not required +.*:171: Warning: extended operand requested but not required +.*:172: Warning: extended operand requested but not required +.*:174: Warning: extended operand requested but not required +.*:176: Warning: extended operand requested but not required +.*:177: Warning: extended operand requested but not required +.*:179: Warning: extended operand requested but not required +.*:180: Warning: extended operand requested but not required +.*:182: Warning: extended operand requested but not required +.*:183: Warning: extended operand requested but not required +.*:10: Warning: extended operand requested but not required +.*:12: Warning: extended operand requested but not required +.*:19: Warning: extended operand requested but not required +.*:21: Warning: extended operand requested but not required +.*:44: Warning: extended operand requested but not required +.*:45: Warning: extended operand requested but not required +.*:181: Warning: extended operand requested but not required diff --git a/gas/testsuite/gas/mips/mips16-64@mips16-insn-t.d b/gas/testsuite/gas/mips/mips16-64@mips16-insn-t.d new file mode 100644 index 0000000..57ea2be --- /dev/null +++ b/gas/testsuite/gas/mips/mips16-64@mips16-insn-t.d @@ -0,0 +1,4 @@ +#as: -32 +#name: MIPS16 explicit unextended instructions +#error-output: mips16-64@mips16-insn-t.l +#source: mips16-insn-t.s diff --git a/gas/testsuite/gas/mips/mips16-64@mips16-insn-t.l b/gas/testsuite/gas/mips/mips16-64@mips16-insn-t.l new file mode 100644 index 0000000..3f9c578 --- /dev/null +++ b/gas/testsuite/gas/mips/mips16-64@mips16-insn-t.l @@ -0,0 +1,16 @@ +.*: Assembler messages: +.*:14: Error: invalid operands `jal\.t 0' +.*:16: Error: unrecognized unextended version of MIPS16 opcode `jalx\.t 0' +.*:51: Error: opcode not supported on this processor: mips3 \(mips3\) `restore\.t 128' +.*:52: Error: opcode not supported on this processor: mips3 \(mips3\) `save\.t 128' +.*:111: Error: opcode not supported on this processor: mips3 \(mips3\) `jrc\.t \$16' +.*:112: Error: opcode not supported on this processor: mips3 \(mips3\) `jrc\.t \$31' +.*:113: Error: opcode not supported on this processor: mips3 \(mips3\) `jalrc\.t \$16' +.*:114: Error: opcode not supported on this processor: mips3 \(mips3\) `jalrc\.t \$31,\$16' +.*:115: Error: opcode not supported on this processor: mips3 \(mips3\) `sdbbp\.t 0' +.*:137: Error: opcode not supported on this processor: mips3 \(mips3\) `zeb\.t \$16' +.*:138: Error: opcode not supported on this processor: mips3 \(mips3\) `zeh\.t \$16' +.*:139: Error: opcode not supported on this processor: mips3 \(mips3\) `zew\.t \$16' +.*:140: Error: opcode not supported on this processor: mips3 \(mips3\) `seb\.t \$16' +.*:141: Error: opcode not supported on this processor: mips3 \(mips3\) `seh\.t \$16' +.*:142: Error: opcode not supported on this processor: mips3 \(mips3\) `sew\.t \$16' diff --git a/gas/testsuite/gas/mips/mips16-extend-swap.d b/gas/testsuite/gas/mips/mips16-extend-swap.d index eb9dd73..d60ab7f 100644 --- a/gas/testsuite/gas/mips/mips16-extend-swap.d +++ b/gas/testsuite/gas/mips/mips16-extend-swap.d @@ -13,10 +13,13 @@ Disassembly of section \.text: [0-9a-f]+ <[^>]*> f123 extend 0x123 [0-9a-f]+ <[^>]*> 1c00 0000 jalx 00000000 <foo> [0-9a-f]+ <[^>]*> 6500 nop -[0-9a-f]+ <[^>]*> f123 eb00 jr v1 +[0-9a-f]+ <[^>]*> f123 extend 0x123 +[0-9a-f]+ <[^>]*> eb00 jr v1 [0-9a-f]+ <[^>]*> 6500 nop -[0-9a-f]+ <[^>]*> f123 e820 jr ra +[0-9a-f]+ <[^>]*> f123 extend 0x123 +[0-9a-f]+ <[^>]*> e820 jr ra [0-9a-f]+ <[^>]*> 6500 nop -[0-9a-f]+ <[^>]*> f123 eb40 jalr v1 +[0-9a-f]+ <[^>]*> f123 extend 0x123 +[0-9a-f]+ <[^>]*> eb40 jalr v1 [0-9a-f]+ <[^>]*> 6500 nop \.\.\. diff --git a/gas/testsuite/gas/mips/mips16-insn-e.d b/gas/testsuite/gas/mips/mips16-insn-e.d new file mode 100644 index 0000000..5a28fea --- /dev/null +++ b/gas/testsuite/gas/mips/mips16-insn-e.d @@ -0,0 +1,3 @@ +#as: -32 +#name: MIPS16 explicit extended instructions +#error-output: mips16-insn-e.l diff --git a/gas/testsuite/gas/mips/mips16-insn-e.l b/gas/testsuite/gas/mips/mips16-insn-e.l new file mode 100644 index 0000000..3ac944e --- /dev/null +++ b/gas/testsuite/gas/mips/mips16-insn-e.l @@ -0,0 +1,130 @@ +.*: Assembler messages: +.*:4: Warning: extended operand requested but not required +.*:5: Warning: extended operand requested but not required +.*:8: Warning: extended operand requested but not required +.*:9: Warning: extended operand requested but not required +.*:23: Warning: extended operand requested but not required +.*:24: Warning: extended operand requested but not required +.*:25: Warning: extended operand requested but not required +.*:26: Warning: extended operand requested but not required +.*:28: Warning: extended operand requested but not required +.*:30: Warning: extended operand requested but not required +.*:31: Warning: extended operand requested but not required +.*:32: Warning: extended operand requested but not required +.*:33: Warning: extended operand requested but not required +.*:35: Warning: extended operand requested but not required +.*:36: Warning: extended operand requested but not required +.*:38: Warning: extended operand requested but not required +.*:39: Warning: extended operand requested but not required +.*:41: Warning: extended operand requested but not required +.*:42: Warning: extended operand requested but not required +.*:46: Warning: extended operand requested but not required +.*:47: Warning: extended operand requested but not required +.*:48: Warning: extended operand requested but not required +.*:49: Warning: extended operand requested but not required +.*:50: Warning: extended operand requested but not required +.*:53: Error: unrecognized extended version of MIPS16 opcode `nop\.e ' +.*:54: Error: unrecognized extended version of MIPS16 opcode `move\.e \$0,\$16' +.*:55: Error: unrecognized extended version of MIPS16 opcode `move\.e \$16,\$0' +.*:57: Warning: extended operand requested but not required +.*:59: Warning: extended operand requested but not required +.*:60: Warning: extended operand requested but not required +.*:62: Warning: extended operand requested but not required +.*:64: Warning: extended operand requested but not required +.*:66: Warning: extended operand requested but not required +.*:68: Warning: extended operand requested but not required +.*:70: Warning: extended operand requested but not required +.*:72: Warning: extended operand requested but not required +.*:74: Warning: extended operand requested but not required +.*:77: Warning: extended operand requested but not required +.*:80: Warning: extended operand requested but not required +.*:82: Warning: extended operand requested but not required +.*:84: Warning: extended operand requested but not required +.*:86: Warning: extended operand requested but not required +.*:88: Warning: extended operand requested but not required +.*:90: Error: invalid operands `daddu\.e \$16,\$16,\$16' +.*:91: Error: invalid operands `addu\.e \$16,\$16,\$16' +.*:92: Error: unrecognized extended version of MIPS16 opcode `dsubu\.e \$16,\$16,\$16' +.*:93: Error: unrecognized extended version of MIPS16 opcode `subu\.e \$16,\$16,\$16' +.*:95: Error: unrecognized extended version of MIPS16 opcode `jr\.e \$16' +.*:97: Error: unrecognized extended version of MIPS16 opcode `j\.e \$16' +.*:99: Error: unrecognized extended version of MIPS16 opcode `jr\.e \$31' +.*:101: Error: unrecognized extended version of MIPS16 opcode `j\.e \$31' +.*:103: Error: unrecognized extended version of MIPS16 opcode `jalr\.e \$16' +.*:105: Error: unrecognized extended version of MIPS16 opcode `jalr\.e \$31,\$16' +.*:107: Error: operand 1 must be an immediate expression `jal\.e \$16' +.*:109: Error: operand 1 must be an immediate expression `jal\.e \$31,\$16' +.*:111: Error: unrecognized extended version of MIPS16 opcode `jrc\.e \$16' +.*:112: Error: unrecognized extended version of MIPS16 opcode `jrc\.e \$31' +.*:113: Error: unrecognized extended version of MIPS16 opcode `jalrc\.e \$16' +.*:114: Error: unrecognized extended version of MIPS16 opcode `jalrc\.e \$31,\$16' +.*:115: Error: unrecognized extended version of MIPS16 opcode `sdbbp\.e 0' +.*:116: Error: invalid operands `slt\.e \$16,\$16' +.*:117: Error: invalid operands `sltu\.e \$16,\$16' +.*:118: Error: unrecognized extended version of MIPS16 opcode `sllv\.e \$16,\$16' +.*:119: Error: invalid operands `sll\.e \$16,\$16' +.*:120: Error: unrecognized extended version of MIPS16 opcode `break\.e 0' +.*:121: Error: unrecognized extended version of MIPS16 opcode `srlv\.e \$16,\$16' +.*:122: Error: invalid operands `srl\.e \$16,\$16' +.*:123: Error: unrecognized extended version of MIPS16 opcode `srav\.e \$16,\$16' +.*:124: Error: invalid operands `sra\.e \$16,\$16' +.*:125: Warning: extended operand requested but not required +.*:126: Error: unrecognized extended version of MIPS16 opcode `entry\.e ' +.*:127: Error: unrecognized extended version of MIPS16 opcode `entry\.e \$31' +.*:128: Error: unrecognized extended version of MIPS16 opcode `exit\.e \$f0' +.*:129: Error: unrecognized extended version of MIPS16 opcode `exit\.e' +.*:130: Error: invalid operands `cmp\.e \$16,\$16' +.*:131: Error: unrecognized extended version of MIPS16 opcode `neg\.e \$16,\$16' +.*:132: Error: unrecognized extended version of MIPS16 opcode `and\.e \$16,\$16' +.*:133: Error: unrecognized extended version of MIPS16 opcode `or\.e \$16,\$16' +.*:134: Error: unrecognized extended version of MIPS16 opcode `xor\.e \$16,\$16' +.*:135: Error: unrecognized extended version of MIPS16 opcode `not\.e \$16,\$16' +.*:136: Error: unrecognized extended version of MIPS16 opcode `mfhi\.e \$16' +.*:137: Error: unrecognized extended version of MIPS16 opcode `zeb\.e \$16' +.*:138: Error: unrecognized extended version of MIPS16 opcode `zeh\.e \$16' +.*:139: Error: unrecognized extended version of MIPS16 opcode `zew\.e \$16' +.*:140: Error: unrecognized extended version of MIPS16 opcode `seb\.e \$16' +.*:141: Error: unrecognized extended version of MIPS16 opcode `seh\.e \$16' +.*:142: Error: unrecognized extended version of MIPS16 opcode `sew\.e \$16' +.*:143: Error: unrecognized extended version of MIPS16 opcode `mflo\.e \$16' +.*:144: Warning: extended operand requested but not required +.*:145: Error: unrecognized extended version of MIPS16 opcode `dsllv\.e \$16,\$16' +.*:146: Error: invalid operands `dsll\.e \$16,\$16' +.*:147: Error: unrecognized extended version of MIPS16 opcode `dsrlv\.e \$16,\$16' +.*:148: Error: invalid operands `dsrl\.e \$16,\$16' +.*:149: Error: unrecognized extended version of MIPS16 opcode `dsrav\.e \$16,\$16' +.*:150: Error: invalid operands `dsra\.e \$16,\$16' +.*:151: Error: unrecognized extended version of MIPS16 opcode `mult\.e \$16,\$16' +.*:152: Error: unrecognized extended version of MIPS16 opcode `multu\.e \$16,\$16' +.*:153: Error: unrecognized extended version of MIPS16 opcode `div\.e \$0,\$16,\$16' +.*:154: Error: unrecognized extended version of MIPS16 opcode `rem\.e \$0,\$16,\$16' +.*:155: Error: unrecognized extended version of MIPS16 opcode `divu\.e \$0,\$16,\$16' +.*:156: Error: unrecognized extended version of MIPS16 opcode `remu\.e \$0,\$16,\$16' +.*:157: Error: unrecognized extended version of MIPS16 opcode `dmult\.e \$16,\$16' +.*:158: Error: unrecognized extended version of MIPS16 opcode `dmultu\.e \$16,\$16' +.*:159: Error: unrecognized extended version of MIPS16 opcode `ddiv\.e \$0,\$16,\$16' +.*:160: Error: unrecognized extended version of MIPS16 opcode `drem\.e \$0,\$16,\$16' +.*:161: Error: unrecognized extended version of MIPS16 opcode `ddivu\.e \$0,\$16,\$16' +.*:162: Error: unrecognized extended version of MIPS16 opcode `dremu\.e \$0,\$16,\$16' +.*:164: Error: unrecognized extended version of MIPS16 opcode `extend\.e 0' +.*:166: Warning: extended operand requested but not required +.*:167: Warning: extended operand requested but not required +.*:168: Warning: extended operand requested but not required +.*:169: Warning: extended operand requested but not required +.*:170: Warning: extended operand requested but not required +.*:171: Warning: extended operand requested but not required +.*:172: Warning: extended operand requested but not required +.*:174: Warning: extended operand requested but not required +.*:176: Warning: extended operand requested but not required +.*:177: Warning: extended operand requested but not required +.*:179: Warning: extended operand requested but not required +.*:180: Warning: extended operand requested but not required +.*:182: Warning: extended operand requested but not required +.*:183: Warning: extended operand requested but not required +.*:10: Warning: extended operand requested but not required +.*:12: Warning: extended operand requested but not required +.*:19: Warning: extended operand requested but not required +.*:21: Warning: extended operand requested but not required +.*:44: Warning: extended operand requested but not required +.*:45: Warning: extended operand requested but not required +.*:181: Warning: extended operand requested but not required diff --git a/gas/testsuite/gas/mips/mips16-insn-e.s b/gas/testsuite/gas/mips/mips16-insn-e.s new file mode 100644 index 0000000..b175cd1 --- /dev/null +++ b/gas/testsuite/gas/mips/mips16-insn-e.s @@ -0,0 +1,187 @@ + .set mips16 + .set noreorder +foo: + addiu.e $16, $29, 0 # ADDIUSP + addu.e $16, $29, 0 + + .align 2 + addiu.e $16, $pc, 0 # ADDIUPC + addu.e $16, $pc, 0 + la.e $16, . - 1 + + b.e . + 2 # B + + jal.e 0 # JAL(X) + nop + jalx.e 0 + nop + + beqz.e $16, . + 2 # BEQZ + + bnez.e $16, . + 2 # BNEZ + + sll.e $16, $16, 8 # SHIFT # SLL + dsll.e $16, $16, 8 # DSLL + srl.e $16, $16, 8 # SRL + sra.e $16, $16, 8 # SRA + + ld.e $16, 0($16) # LD + + addiu.e $16, $16, 0 # RRI-A # ADDIU + addu.e $16, $16, 0 + daddiu.e $16, $16, 0 # DADDIU + daddu.e $16, $16, 0 + + addiu.e $16, 0 # ADDIU8 + addu.e $16, 0 + + slti.e $16, 0 # SLTI + slt.e $16, 0 + + sltiu.e $16, 0 # SLTIU + sltu.e $16, 0 + + bteqz.e . + 2 # I8 # BTEQZ + btnez.e . + 2 # BTNEZ + sw.e $31, 0($29) # SWRASP + addiu.e $29, 0 # ADJSP + addiu.e $29, $29, 0 + addu.e $29, 0 + addu.e $29, $29, 0 + restore.e 128 # SVRS # RESTORE + save.e 128 # SAVE + nop.e # MOV32R + move.e $0, $16 + move.e $16, $0 # MOVR32 + + li.e $16, 0 # LI + + cmpi.e $16, 0 # CMPI + cmp.e $16, 0 + + sd.e $16, 0($16) # SD + + lb.e $16, 0($16) # LB + + lh.e $16, 0($16) # LH + + lw.e $16, 0($29) # LWSP + + lw.e $16, 0($16) # LW + + lbu.e $16, 0($16) # LBU + + lhu.e $16, 0($16) # LHU + + .align 2 + lw.e $16, 0($pc) # LWPC + lw.e $16, . - 3 + + lwu.e $16, 0($16) # LWU + + sb.e $16, 0($16) # SB + + sh.e $16, 0($16) # SH + + sw.e $16, 0($29) # SWSP + + sw.e $16, 0($16) # SW + + daddu.e $16, $16, $16 # RRR # DADDU + addu.e $16, $16, $16 # ADDU + dsubu.e $16, $16, $16 # DSUBU + subu.e $16, $16, $16 # SUBU + + jr.e $16 # RR # J(AL)R(C) # JR rx + nop + j.e $16 + nop + jr.e $31 # JR ra + nop + j.e $31 + nop + jalr.e $16 # JALR + nop + jalr.e $31, $16 + nop + jal.e $16 + nop + jal.e $31, $16 + nop + jrc.e $16 # JRC rx + jrc.e $31 # JRC ra + jalrc.e $16 # JALRC + jalrc.e $31, $16 + sdbbp.e 0 # SDBBP + slt.e $16, $16 # SLT + sltu.e $16, $16 # SLTU + sllv.e $16, $16 # SLLV + sll.e $16, $16 + break.e 0 # BREAK + srlv.e $16, $16 # SRLV + srl.e $16, $16 + srav.e $16, $16 # SRAV + sra.e $16, $16 + dsrl.e $16, 8 # DSRL + entry.e # ENTRY/EXIT + entry.e $31 + exit.e $f0 + exit.e + cmp.e $16, $16 # CMP + neg.e $16, $16 # NEG + and.e $16, $16 # AND + or.e $16, $16 # OR + xor.e $16, $16 # XOR + not.e $16, $16 # NOT + mfhi.e $16 # MFHI + zeb.e $16 # CNVT # ZEB + zeh.e $16 # ZEH + zew.e $16 # ZEW + seb.e $16 # SEB + seh.e $16 # SEH + sew.e $16 # SEW + mflo.e $16 # MFLO + dsra.e $16, 8 # DSRA + dsllv.e $16, $16 # DSLLV + dsll.e $16, $16 + dsrlv.e $16, $16 # DSRLV + dsrl.e $16, $16 + dsrav.e $16, $16 # DSRAV + dsra.e $16, $16 + mult.e $16, $16 # MULT + multu.e $16, $16 # MULTU + div.e $0, $16, $16 # DIV + rem.e $0, $16, $16 + divu.e $0, $16, $16 # DIVU + remu.e $0, $16, $16 + dmult.e $16, $16 # DMULT + dmultu.e $16, $16 # DMULTU + ddiv.e $0, $16, $16 # DDIV + drem.e $0, $16, $16 + ddivu.e $0, $16, $16 # DDIVU + dremu.e $0, $16, $16 + + extend.e 0 # EXTEND + + ld.e $16, 0($29) # I64 # LDSP + sd.e $16, 0($29) # SDSP + sd.e $31, 0($29) # SDRASP + daddiu.e $29, 0 # DADJSP + daddiu.e $29, $29, 0 + daddu.e $29, 0 + daddu.e $29, $29, 0 + .align 3 + ld.e $16, 0($pc) # LDPC + ld.e $16, . - 3 + daddiu.e $16, 0 # DADDIU5 + daddu.e $16, 0 + .align 2 + daddiu.e $16, $pc, 0 # DADDIUPC + daddu.e $16, $pc, 0 + dla.e $16, . - 1 + daddiu.e $16, $sp, 0 # DADDIUSP + daddu.e $16, $sp, 0 + +# Force some (non-delay-slot) zero bytes, to make 'objdump' print ... + .align 4, 0 + .space 16 diff --git a/gas/testsuite/gas/mips/mips16-insn-t.d b/gas/testsuite/gas/mips/mips16-insn-t.d new file mode 100644 index 0000000..a0b7e64 --- /dev/null +++ b/gas/testsuite/gas/mips/mips16-insn-t.d @@ -0,0 +1,3 @@ +#as: -32 +#name: MIPS16 explicit unextended instructions +#error-output: mips16-insn-t.l diff --git a/gas/testsuite/gas/mips/mips16-insn-t.l b/gas/testsuite/gas/mips/mips16-insn-t.l new file mode 100644 index 0000000..c15c066 --- /dev/null +++ b/gas/testsuite/gas/mips/mips16-insn-t.l @@ -0,0 +1,3 @@ +.*: Assembler messages: +.*:14: Error: invalid operands `jal\.t 0' +.*:16: Error: unrecognized unextended version of MIPS16 opcode `jalx\.t 0' diff --git a/gas/testsuite/gas/mips/mips16-insn-t.s b/gas/testsuite/gas/mips/mips16-insn-t.s new file mode 100644 index 0000000..6e2d86d --- /dev/null +++ b/gas/testsuite/gas/mips/mips16-insn-t.s @@ -0,0 +1,187 @@ + .set mips16 + .set noreorder +foo: + addiu.t $16, $29, 0 # ADDIUSP + addu.t $16, $29, 0 + + .align 2 + addiu.t $16, $pc, 0 # ADDIUPC + addu.t $16, $pc, 0 + la.t $16, . - 1 + + b.t . + 2 # B + + jal.t 0 # JAL(X) + nop + jalx.t 0 + nop + + beqz.t $16, . + 2 # BEQZ + + bnez.t $16, . + 2 # BNEZ + + sll.t $16, $16, 8 # SHIFT # SLL + dsll.t $16, $16, 8 # DSLL + srl.t $16, $16, 8 # SRL + sra.t $16, $16, 8 # SRA + + ld.t $16, 0($16) # LD + + addiu.t $16, $16, 0 # RRI-A # ADDIU + addu.t $16, $16, 0 + daddiu.t $16, $16, 0 # DADDIU + daddu.t $16, $16, 0 + + addiu.t $16, 0 # ADDIU8 + addu.t $16, 0 + + slti.t $16, 0 # SLTI + slt.t $16, 0 + + sltiu.t $16, 0 # SLTIU + sltu.t $16, 0 + + bteqz.t . + 2 # I8 # BTEQZ + btnez.t . + 2 # BTNEZ + sw.t $31, 0($29) # SWRASP + addiu.t $29, 0 # ADJSP + addiu.t $29, $29, 0 + addu.t $29, 0 + addu.t $29, $29, 0 + restore.t 128 # SVRS # RESTORE + save.t 128 # SAVE + nop.t # MOV32R + move.t $0, $16 + move.t $16, $0 # MOVR32 + + li.t $16, 0 # LI + + cmpi.t $16, 0 # CMPI + cmp.t $16, 0 + + sd.t $16, 0($16) # SD + + lb.t $16, 0($16) # LB + + lh.t $16, 0($16) # LH + + lw.t $16, 0($29) # LWSP + + lw.t $16, 0($16) # LW + + lbu.t $16, 0($16) # LBU + + lhu.t $16, 0($16) # LHU + + .align 2 + lw.t $16, 0($pc) # LWPC + lw.t $16, . - 3 + + lwu.t $16, 0($16) # LWU + + sb.t $16, 0($16) # SB + + sh.t $16, 0($16) # SH + + sw.t $16, 0($29) # SWSP + + sw.t $16, 0($16) # SW + + daddu.t $16, $16, $16 # RRR # DADDU + addu.t $16, $16, $16 # ADDU + dsubu.t $16, $16, $16 # DSUBU + subu.t $16, $16, $16 # SUBU + + jr.t $16 # RR # J(AL)R(C) # JR rx + nop + j.t $16 + nop + jr.t $31 # JR ra + nop + j.t $31 + nop + jalr.t $16 # JALR + nop + jalr.t $31, $16 + nop + jal.t $16 + nop + jal.t $31, $16 + nop + jrc.t $16 # JRC rx + jrc.t $31 # JRC ra + jalrc.t $16 # JALRC + jalrc.t $31, $16 + sdbbp.t 0 # SDBBP + slt.t $16, $16 # SLT + sltu.t $16, $16 # SLTU + sllv.t $16, $16 # SLLV + sll.t $16, $16 + break.t 0 # BREAK + srlv.t $16, $16 # SRLV + srl.t $16, $16 + srav.t $16, $16 # SRAV + sra.t $16, $16 + dsrl.t $16, 8 # DSRL + entry.t # ENTRY/EXIT + entry.t $31 + exit.t $f0 + exit.t + cmp.t $16, $16 # CMP + neg.t $16, $16 # NEG + and.t $16, $16 # AND + or.t $16, $16 # OR + xor.t $16, $16 # XOR + not.t $16, $16 # NOT + mfhi.t $16 # MFHI + zeb.t $16 # CNVT # ZEB + zeh.t $16 # ZEH + zew.t $16 # ZEW + seb.t $16 # SEB + seh.t $16 # SEH + sew.t $16 # SEW + mflo.t $16 # MFLO + dsra.t $16, 8 # DSRA + dsllv.t $16, $16 # DSLLV + dsll.t $16, $16 + dsrlv.t $16, $16 # DSRLV + dsrl.t $16, $16 + dsrav.t $16, $16 # DSRAV + dsra.t $16, $16 + mult.t $16, $16 # MULT + multu.t $16, $16 # MULTU + div.t $0, $16, $16 # DIV + rem.t $0, $16, $16 + divu.t $0, $16, $16 # DIVU + remu.t $0, $16, $16 + dmult.t $16, $16 # DMULT + dmultu.t $16, $16 # DMULTU + ddiv.t $0, $16, $16 # DDIV + drem.t $0, $16, $16 + ddivu.t $0, $16, $16 # DDIVU + dremu.t $0, $16, $16 + + extend.t 0 # EXTEND + + ld.t $16, 0($29) # I64 # LDSP + sd.t $16, 0($29) # SDSP + sd.t $31, 0($29) # SDRASP + daddiu.t $29, 0 # DADJSP + daddiu.t $29, $29, 0 + daddu.t $29, 0 + daddu.t $29, $29, 0 + .align 3 + ld.t $16, 0($pc) # LDPC + ld.t $16, . - 3 + daddiu.t $16, 0 # DADDIU5 + daddu.t $16, 0 + .align 2 + daddiu.t $16, $pc, 0 # DADDIUPC + daddu.t $16, $pc, 0 + dla.t $16, . - 1 + daddiu.t $16, $sp, 0 # DADDIUSP + daddu.t $16, $sp, 0 + +# Force some (non-delay-slot) zero bytes, to make 'objdump' print ... + .align 4, 0 + .space 16 diff --git a/gas/testsuite/gas/mips/mips16-macro-e.l b/gas/testsuite/gas/mips/mips16-macro-e.l index 225d9a9..663d87b 100644 --- a/gas/testsuite/gas/mips/mips16-macro-e.l +++ b/gas/testsuite/gas/mips/mips16-macro-e.l @@ -1,26 +1,26 @@ .*: Assembler messages: -.*:4: Error: invalid operands `div\.e \$2,\$3,\$4' -.*:5: Error: invalid operands `divu\.e \$3,\$4,\$5' -.*:6: Error: invalid operands `ddiv\.e \$4,\$5,\$6' -.*:7: Error: invalid operands `ddivu\.e \$5,\$6,\$7' -.*:8: Error: invalid operands `rem\.e \$6,\$7,\$16' -.*:9: Error: invalid operands `remu\.e \$6,\$7,\$17' -.*:10: Error: invalid operands `drem\.e \$2,\$3,\$4' -.*:11: Error: invalid operands `dremu\.e \$3,\$4,\$5' +.*:4: Error: unrecognized extended version of MIPS16 opcode `div\.e \$2,\$3,\$4' +.*:5: Error: unrecognized extended version of MIPS16 opcode `divu\.e \$3,\$4,\$5' +.*:6: Error: unrecognized extended version of MIPS16 opcode `ddiv\.e \$4,\$5,\$6' +.*:7: Error: unrecognized extended version of MIPS16 opcode `ddivu\.e \$5,\$6,\$7' +.*:8: Error: unrecognized extended version of MIPS16 opcode `rem\.e \$6,\$7,\$16' +.*:9: Error: unrecognized extended version of MIPS16 opcode `remu\.e \$6,\$7,\$17' +.*:10: Error: unrecognized extended version of MIPS16 opcode `drem\.e \$2,\$3,\$4' +.*:11: Error: unrecognized extended version of MIPS16 opcode `dremu\.e \$3,\$4,\$5' .*:12: Error: unrecognized extended version of MIPS16 opcode `mul\.e \$4,\$5,\$6' .*:13: Error: unrecognized extended version of MIPS16 opcode `dmul\.e \$5,\$6,\$7' -.*:14: Error: invalid operands `subu\.e \$2,-32767' -.*:15: Error: invalid operands `subu\.e \$3,16' -.*:16: Error: invalid operands `subu\.e \$4,32768' -.*:17: Error: invalid operands `subu\.e \$3,\$7,-16383' -.*:18: Error: invalid operands `subu\.e \$4,\$16,4' -.*:19: Error: invalid operands `subu\.e \$5,\$17,16384' -.*:20: Error: invalid operands `dsubu\.e \$4,-32767' -.*:21: Error: invalid operands `dsubu\.e \$6,6' -.*:22: Error: invalid operands `dsubu\.e \$7,32768' -.*:23: Error: invalid operands `dsubu\.e \$2,\$4,-16383' -.*:24: Error: invalid operands `dsubu\.e \$3,\$7,8' -.*:25: Error: invalid operands `dsubu\.e \$4,\$5,16384' +.*:14: Error: unrecognized extended version of MIPS16 opcode `subu\.e \$2,-32767' +.*:15: Error: unrecognized extended version of MIPS16 opcode `subu\.e \$3,16' +.*:16: Error: unrecognized extended version of MIPS16 opcode `subu\.e \$4,32768' +.*:17: Error: unrecognized extended version of MIPS16 opcode `subu\.e \$3,\$7,-16383' +.*:18: Error: unrecognized extended version of MIPS16 opcode `subu\.e \$4,\$16,4' +.*:19: Error: unrecognized extended version of MIPS16 opcode `subu\.e \$5,\$17,16384' +.*:20: Error: unrecognized extended version of MIPS16 opcode `dsubu\.e \$4,-32767' +.*:21: Error: unrecognized extended version of MIPS16 opcode `dsubu\.e \$6,6' +.*:22: Error: unrecognized extended version of MIPS16 opcode `dsubu\.e \$7,32768' +.*:23: Error: unrecognized extended version of MIPS16 opcode `dsubu\.e \$2,\$4,-16383' +.*:24: Error: unrecognized extended version of MIPS16 opcode `dsubu\.e \$3,\$7,8' +.*:25: Error: unrecognized extended version of MIPS16 opcode `dsubu\.e \$4,\$5,16384' .*:26: Error: unrecognized extended version of MIPS16 opcode `beq\.e \$2,\$3,1b' .*:27: Error: unrecognized extended version of MIPS16 opcode `bne\.e \$4,\$5,1b' .*:28: Error: unrecognized extended version of MIPS16 opcode `blt\.e \$6,\$7,1b' diff --git a/gas/testsuite/gas/mips/mips16e-32@mips16-insn-e.d b/gas/testsuite/gas/mips/mips16e-32@mips16-insn-e.d new file mode 100644 index 0000000..1f5edee --- /dev/null +++ b/gas/testsuite/gas/mips/mips16e-32@mips16-insn-e.d @@ -0,0 +1,4 @@ +#as: -32 +#name: MIPS16 explicit extended instructions +#error-output: mips16e-32@mips16-insn-e.l +#source: mips16-insn-e.s diff --git a/gas/testsuite/gas/mips/mips16e-32@mips16-insn-e.l b/gas/testsuite/gas/mips/mips16e-32@mips16-insn-e.l new file mode 100644 index 0000000..2c53785 --- /dev/null +++ b/gas/testsuite/gas/mips/mips16e-32@mips16-insn-e.l @@ -0,0 +1,131 @@ +.*: Assembler messages: +.*:4: Warning: extended operand requested but not required +.*:5: Warning: extended operand requested but not required +.*:8: Warning: extended operand requested but not required +.*:9: Warning: extended operand requested but not required +.*:23: Warning: extended operand requested but not required +.*:24: Error: opcode not supported on this processor: mips32 \(mips32\) `dsll\.e \$16,\$16,8' +.*:25: Warning: extended operand requested but not required +.*:26: Warning: extended operand requested but not required +.*:28: Error: opcode not supported on this processor: mips32 \(mips32\) `ld\.e \$16,0\(\$16\)' +.*:30: Warning: extended operand requested but not required +.*:31: Warning: extended operand requested but not required +.*:32: Error: opcode not supported on this processor: mips32 \(mips32\) `daddiu\.e \$16,\$16,0' +.*:33: Error: opcode not supported on this processor: mips32 \(mips32\) `daddu\.e \$16,\$16,0' +.*:35: Warning: extended operand requested but not required +.*:36: Warning: extended operand requested but not required +.*:38: Warning: extended operand requested but not required +.*:39: Warning: extended operand requested but not required +.*:41: Warning: extended operand requested but not required +.*:42: Warning: extended operand requested but not required +.*:46: Warning: extended operand requested but not required +.*:47: Warning: extended operand requested but not required +.*:48: Warning: extended operand requested but not required +.*:49: Warning: extended operand requested but not required +.*:50: Warning: extended operand requested but not required +.*:53: Error: unrecognized extended version of MIPS16 opcode `nop\.e ' +.*:54: Error: unrecognized extended version of MIPS16 opcode `move\.e \$0,\$16' +.*:55: Error: unrecognized extended version of MIPS16 opcode `move\.e \$16,\$0' +.*:57: Warning: extended operand requested but not required +.*:59: Warning: extended operand requested but not required +.*:60: Warning: extended operand requested but not required +.*:62: Error: opcode not supported on this processor: mips32 \(mips32\) `sd\.e \$16,0\(\$16\)' +.*:64: Warning: extended operand requested but not required +.*:66: Warning: extended operand requested but not required +.*:68: Warning: extended operand requested but not required +.*:70: Warning: extended operand requested but not required +.*:72: Warning: extended operand requested but not required +.*:74: Warning: extended operand requested but not required +.*:77: Warning: extended operand requested but not required +.*:80: Error: opcode not supported on this processor: mips32 \(mips32\) `lwu\.e \$16,0\(\$16\)' +.*:82: Warning: extended operand requested but not required +.*:84: Warning: extended operand requested but not required +.*:86: Warning: extended operand requested but not required +.*:88: Warning: extended operand requested but not required +.*:90: Error: opcode not supported on this processor: mips32 \(mips32\) `daddu\.e \$16,\$16,\$16' +.*:91: Error: invalid operands `addu\.e \$16,\$16,\$16' +.*:92: Error: opcode not supported on this processor: mips32 \(mips32\) `dsubu\.e \$16,\$16,\$16' +.*:93: Error: unrecognized extended version of MIPS16 opcode `subu\.e \$16,\$16,\$16' +.*:95: Error: unrecognized extended version of MIPS16 opcode `jr\.e \$16' +.*:97: Error: unrecognized extended version of MIPS16 opcode `j\.e \$16' +.*:99: Error: unrecognized extended version of MIPS16 opcode `jr\.e \$31' +.*:101: Error: unrecognized extended version of MIPS16 opcode `j\.e \$31' +.*:103: Error: unrecognized extended version of MIPS16 opcode `jalr\.e \$16' +.*:105: Error: unrecognized extended version of MIPS16 opcode `jalr\.e \$31,\$16' +.*:107: Error: operand 1 must be an immediate expression `jal\.e \$16' +.*:109: Error: operand 1 must be an immediate expression `jal\.e \$31,\$16' +.*:111: Error: unrecognized extended version of MIPS16 opcode `jrc\.e \$16' +.*:112: Error: unrecognized extended version of MIPS16 opcode `jrc\.e \$31' +.*:113: Error: unrecognized extended version of MIPS16 opcode `jalrc\.e \$16' +.*:114: Error: unrecognized extended version of MIPS16 opcode `jalrc\.e \$31,\$16' +.*:115: Error: unrecognized extended version of MIPS16 opcode `sdbbp\.e 0' +.*:116: Error: invalid operands `slt\.e \$16,\$16' +.*:117: Error: invalid operands `sltu\.e \$16,\$16' +.*:118: Error: unrecognized extended version of MIPS16 opcode `sllv\.e \$16,\$16' +.*:119: Error: invalid operands `sll\.e \$16,\$16' +.*:120: Error: unrecognized extended version of MIPS16 opcode `break\.e 0' +.*:121: Error: unrecognized extended version of MIPS16 opcode `srlv\.e \$16,\$16' +.*:122: Error: invalid operands `srl\.e \$16,\$16' +.*:123: Error: unrecognized extended version of MIPS16 opcode `srav\.e \$16,\$16' +.*:124: Error: invalid operands `sra\.e \$16,\$16' +.*:125: Error: opcode not supported on this processor: mips32 \(mips32\) `dsrl\.e \$16,8' +.*:126: Error: unrecognized extended version of MIPS16 opcode `entry\.e ' +.*:127: Error: unrecognized extended version of MIPS16 opcode `entry\.e \$31' +.*:128: Error: unrecognized extended version of MIPS16 opcode `exit\.e \$f0' +.*:129: Error: unrecognized extended version of MIPS16 opcode `exit\.e' +.*:130: Error: invalid operands `cmp\.e \$16,\$16' +.*:131: Error: unrecognized extended version of MIPS16 opcode `neg\.e \$16,\$16' +.*:132: Error: unrecognized extended version of MIPS16 opcode `and\.e \$16,\$16' +.*:133: Error: unrecognized extended version of MIPS16 opcode `or\.e \$16,\$16' +.*:134: Error: unrecognized extended version of MIPS16 opcode `xor\.e \$16,\$16' +.*:135: Error: unrecognized extended version of MIPS16 opcode `not\.e \$16,\$16' +.*:136: Error: unrecognized extended version of MIPS16 opcode `mfhi\.e \$16' +.*:137: Error: unrecognized extended version of MIPS16 opcode `zeb\.e \$16' +.*:138: Error: unrecognized extended version of MIPS16 opcode `zeh\.e \$16' +.*:139: Error: opcode not supported on this processor: mips32 \(mips32\) `zew\.e \$16' +.*:140: Error: unrecognized extended version of MIPS16 opcode `seb\.e \$16' +.*:141: Error: unrecognized extended version of MIPS16 opcode `seh\.e \$16' +.*:142: Error: opcode not supported on this processor: mips32 \(mips32\) `sew\.e \$16' +.*:143: Error: unrecognized extended version of MIPS16 opcode `mflo\.e \$16' +.*:144: Error: opcode not supported on this processor: mips32 \(mips32\) `dsra\.e \$16,8' +.*:145: Error: opcode not supported on this processor: mips32 \(mips32\) `dsllv\.e \$16,\$16' +.*:146: Error: opcode not supported on this processor: mips32 \(mips32\) `dsll\.e \$16,\$16' +.*:147: Error: opcode not supported on this processor: mips32 \(mips32\) `dsrlv\.e \$16,\$16' +.*:148: Error: opcode not supported on this processor: mips32 \(mips32\) `dsrl\.e \$16,\$16' +.*:149: Error: opcode not supported on this processor: mips32 \(mips32\) `dsrav\.e \$16,\$16' +.*:150: Error: opcode not supported on this processor: mips32 \(mips32\) `dsra\.e \$16,\$16' +.*:151: Error: unrecognized extended version of MIPS16 opcode `mult\.e \$16,\$16' +.*:152: Error: unrecognized extended version of MIPS16 opcode `multu\.e \$16,\$16' +.*:153: Error: unrecognized extended version of MIPS16 opcode `div\.e \$0,\$16,\$16' +.*:154: Error: unrecognized extended version of MIPS16 opcode `rem\.e \$0,\$16,\$16' +.*:155: Error: unrecognized extended version of MIPS16 opcode `divu\.e \$0,\$16,\$16' +.*:156: Error: unrecognized extended version of MIPS16 opcode `remu\.e \$0,\$16,\$16' +.*:157: Error: opcode not supported on this processor: mips32 \(mips32\) `dmult\.e \$16,\$16' +.*:158: Error: opcode not supported on this processor: mips32 \(mips32\) `dmultu\.e \$16,\$16' +.*:159: Error: opcode not supported on this processor: mips32 \(mips32\) `ddiv\.e \$0,\$16,\$16' +.*:160: Error: opcode not supported on this processor: mips32 \(mips32\) `drem\.e \$0,\$16,\$16' +.*:161: Error: opcode not supported on this processor: mips32 \(mips32\) `ddivu\.e \$0,\$16,\$16' +.*:162: Error: opcode not supported on this processor: mips32 \(mips32\) `dremu\.e \$0,\$16,\$16' +.*:164: Error: unrecognized extended version of MIPS16 opcode `extend\.e 0' +.*:166: Error: opcode not supported on this processor: mips32 \(mips32\) `ld\.e \$16,0\(\$29\)' +.*:167: Error: opcode not supported on this processor: mips32 \(mips32\) `sd\.e \$16,0\(\$29\)' +.*:168: Error: opcode not supported on this processor: mips32 \(mips32\) `sd\.e \$31,0\(\$29\)' +.*:169: Error: opcode not supported on this processor: mips32 \(mips32\) `daddiu\.e \$29,0' +.*:170: Error: opcode not supported on this processor: mips32 \(mips32\) `daddiu\.e \$29,\$29,0' +.*:171: Error: opcode not supported on this processor: mips32 \(mips32\) `daddu\.e \$29,0' +.*:172: Error: opcode not supported on this processor: mips32 \(mips32\) `daddu\.e \$29,\$29,0' +.*:174: Error: opcode not supported on this processor: mips32 \(mips32\) `ld\.e \$16,0\(\$pc\)' +.*:175: Error: opcode not supported on this processor: mips32 \(mips32\) `ld\.e \$16,\.-3' +.*:176: Error: opcode not supported on this processor: mips32 \(mips32\) `daddiu\.e \$16,0' +.*:177: Error: opcode not supported on this processor: mips32 \(mips32\) `daddu\.e \$16,0' +.*:179: Error: opcode not supported on this processor: mips32 \(mips32\) `daddiu\.e \$16,\$pc,0' +.*:180: Error: opcode not supported on this processor: mips32 \(mips32\) `daddu\.e \$16,\$pc,0' +.*:181: Error: opcode not supported on this processor: mips32 \(mips32\) `dla\.e \$16,\.-1' +.*:182: Error: opcode not supported on this processor: mips32 \(mips32\) `daddiu\.e \$16,\$sp,0' +.*:183: Error: opcode not supported on this processor: mips32 \(mips32\) `daddu\.e \$16,\$sp,0' +.*:10: Warning: extended operand requested but not required +.*:12: Warning: extended operand requested but not required +.*:19: Warning: extended operand requested but not required +.*:21: Warning: extended operand requested but not required +.*:44: Warning: extended operand requested but not required +.*:45: Warning: extended operand requested but not required diff --git a/gas/testsuite/gas/mips/mips16e-32@mips16-insn-t.d b/gas/testsuite/gas/mips/mips16e-32@mips16-insn-t.d new file mode 100644 index 0000000..3c677cf --- /dev/null +++ b/gas/testsuite/gas/mips/mips16e-32@mips16-insn-t.d @@ -0,0 +1,4 @@ +#as: -32 +#name: MIPS16 explicit unextended instructions +#error-output: mips16e-32@mips16-insn-t.l +#source: mips16-insn-t.s diff --git a/gas/testsuite/gas/mips/mips16e-32@mips16-insn-t.l b/gas/testsuite/gas/mips/mips16e-32@mips16-insn-t.l new file mode 100644 index 0000000..69ce411 --- /dev/null +++ b/gas/testsuite/gas/mips/mips16e-32@mips16-insn-t.l @@ -0,0 +1,43 @@ +.*: Assembler messages: +.*:14: Error: invalid operands `jal\.t 0' +.*:16: Error: unrecognized unextended version of MIPS16 opcode `jalx\.t 0' +.*:24: Error: opcode not supported on this processor: mips32 \(mips32\) `dsll\.t \$16,\$16,8' +.*:28: Error: opcode not supported on this processor: mips32 \(mips32\) `ld\.t \$16,0\(\$16\)' +.*:32: Error: opcode not supported on this processor: mips32 \(mips32\) `daddiu\.t \$16,\$16,0' +.*:33: Error: opcode not supported on this processor: mips32 \(mips32\) `daddu\.t \$16,\$16,0' +.*:62: Error: opcode not supported on this processor: mips32 \(mips32\) `sd\.t \$16,0\(\$16\)' +.*:80: Error: opcode not supported on this processor: mips32 \(mips32\) `lwu\.t \$16,0\(\$16\)' +.*:90: Error: opcode not supported on this processor: mips32 \(mips32\) `daddu\.t \$16,\$16,\$16' +.*:92: Error: opcode not supported on this processor: mips32 \(mips32\) `dsubu\.t \$16,\$16,\$16' +.*:125: Error: opcode not supported on this processor: mips32 \(mips32\) `dsrl\.t \$16,8' +.*:139: Error: opcode not supported on this processor: mips32 \(mips32\) `zew\.t \$16' +.*:142: Error: opcode not supported on this processor: mips32 \(mips32\) `sew\.t \$16' +.*:144: Error: opcode not supported on this processor: mips32 \(mips32\) `dsra\.t \$16,8' +.*:145: Error: opcode not supported on this processor: mips32 \(mips32\) `dsllv\.t \$16,\$16' +.*:146: Error: opcode not supported on this processor: mips32 \(mips32\) `dsll\.t \$16,\$16' +.*:147: Error: opcode not supported on this processor: mips32 \(mips32\) `dsrlv\.t \$16,\$16' +.*:148: Error: opcode not supported on this processor: mips32 \(mips32\) `dsrl\.t \$16,\$16' +.*:149: Error: opcode not supported on this processor: mips32 \(mips32\) `dsrav\.t \$16,\$16' +.*:150: Error: opcode not supported on this processor: mips32 \(mips32\) `dsra\.t \$16,\$16' +.*:157: Error: opcode not supported on this processor: mips32 \(mips32\) `dmult\.t \$16,\$16' +.*:158: Error: opcode not supported on this processor: mips32 \(mips32\) `dmultu\.t \$16,\$16' +.*:159: Error: opcode not supported on this processor: mips32 \(mips32\) `ddiv\.t \$0,\$16,\$16' +.*:160: Error: opcode not supported on this processor: mips32 \(mips32\) `drem\.t \$0,\$16,\$16' +.*:161: Error: opcode not supported on this processor: mips32 \(mips32\) `ddivu\.t \$0,\$16,\$16' +.*:162: Error: opcode not supported on this processor: mips32 \(mips32\) `dremu\.t \$0,\$16,\$16' +.*:166: Error: opcode not supported on this processor: mips32 \(mips32\) `ld\.t \$16,0\(\$29\)' +.*:167: Error: opcode not supported on this processor: mips32 \(mips32\) `sd\.t \$16,0\(\$29\)' +.*:168: Error: opcode not supported on this processor: mips32 \(mips32\) `sd\.t \$31,0\(\$29\)' +.*:169: Error: opcode not supported on this processor: mips32 \(mips32\) `daddiu\.t \$29,0' +.*:170: Error: opcode not supported on this processor: mips32 \(mips32\) `daddiu\.t \$29,\$29,0' +.*:171: Error: opcode not supported on this processor: mips32 \(mips32\) `daddu\.t \$29,0' +.*:172: Error: opcode not supported on this processor: mips32 \(mips32\) `daddu\.t \$29,\$29,0' +.*:174: Error: opcode not supported on this processor: mips32 \(mips32\) `ld\.t \$16,0\(\$pc\)' +.*:175: Error: opcode not supported on this processor: mips32 \(mips32\) `ld\.t \$16,\.-3' +.*:176: Error: opcode not supported on this processor: mips32 \(mips32\) `daddiu\.t \$16,0' +.*:177: Error: opcode not supported on this processor: mips32 \(mips32\) `daddu\.t \$16,0' +.*:179: Error: opcode not supported on this processor: mips32 \(mips32\) `daddiu\.t \$16,\$pc,0' +.*:180: Error: opcode not supported on this processor: mips32 \(mips32\) `daddu\.t \$16,\$pc,0' +.*:181: Error: opcode not supported on this processor: mips32 \(mips32\) `dla\.t \$16,\.-1' +.*:182: Error: opcode not supported on this processor: mips32 \(mips32\) `daddiu\.t \$16,\$sp,0' +.*:183: Error: opcode not supported on this processor: mips32 \(mips32\) `daddu\.t \$16,\$sp,0' diff --git a/gas/testsuite/gas/mips/mips16e-32@mips16-macro-e.l b/gas/testsuite/gas/mips/mips16e-32@mips16-macro-e.l index eb763b5..b91a274 100644 --- a/gas/testsuite/gas/mips/mips16e-32@mips16-macro-e.l +++ b/gas/testsuite/gas/mips/mips16e-32@mips16-macro-e.l @@ -1,20 +1,20 @@ .*: Assembler messages: -.*:4: Error: invalid operands `div\.e \$2,\$3,\$4' -.*:5: Error: invalid operands `divu\.e \$3,\$4,\$5' +.*:4: Error: unrecognized extended version of MIPS16 opcode `div\.e \$2,\$3,\$4' +.*:5: Error: unrecognized extended version of MIPS16 opcode `divu\.e \$3,\$4,\$5' .*:6: Error: opcode not supported on this processor: mips32 \(mips32\) `ddiv\.e \$4,\$5,\$6' .*:7: Error: opcode not supported on this processor: mips32 \(mips32\) `ddivu\.e \$5,\$6,\$7' -.*:8: Error: invalid operands `rem\.e \$6,\$7,\$16' -.*:9: Error: invalid operands `remu\.e \$6,\$7,\$17' +.*:8: Error: unrecognized extended version of MIPS16 opcode `rem\.e \$6,\$7,\$16' +.*:9: Error: unrecognized extended version of MIPS16 opcode `remu\.e \$6,\$7,\$17' .*:10: Error: opcode not supported on this processor: mips32 \(mips32\) `drem\.e \$2,\$3,\$4' .*:11: Error: opcode not supported on this processor: mips32 \(mips32\) `dremu\.e \$3,\$4,\$5' .*:12: Error: unrecognized extended version of MIPS16 opcode `mul\.e \$4,\$5,\$6' .*:13: Error: opcode not supported on this processor: mips32 \(mips32\) `dmul\.e \$5,\$6,\$7' -.*:14: Error: invalid operands `subu\.e \$2,-32767' -.*:15: Error: invalid operands `subu\.e \$3,16' -.*:16: Error: invalid operands `subu\.e \$4,32768' -.*:17: Error: invalid operands `subu\.e \$3,\$7,-16383' -.*:18: Error: invalid operands `subu\.e \$4,\$16,4' -.*:19: Error: invalid operands `subu\.e \$5,\$17,16384' +.*:14: Error: unrecognized extended version of MIPS16 opcode `subu\.e \$2,-32767' +.*:15: Error: unrecognized extended version of MIPS16 opcode `subu\.e \$3,16' +.*:16: Error: unrecognized extended version of MIPS16 opcode `subu\.e \$4,32768' +.*:17: Error: unrecognized extended version of MIPS16 opcode `subu\.e \$3,\$7,-16383' +.*:18: Error: unrecognized extended version of MIPS16 opcode `subu\.e \$4,\$16,4' +.*:19: Error: unrecognized extended version of MIPS16 opcode `subu\.e \$5,\$17,16384' .*:20: Error: opcode not supported on this processor: mips32 \(mips32\) `dsubu\.e \$4,-32767' .*:21: Error: opcode not supported on this processor: mips32 \(mips32\) `dsubu\.e \$6,6' .*:22: Error: opcode not supported on this processor: mips32 \(mips32\) `dsubu\.e \$7,32768' |