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author | Claudiu Zissulescu <claziss@synopsys.com> | 2023-09-25 10:55:51 +0300 |
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committer | Claudiu Zissulescu <claziss@gmail.com> | 2023-09-25 10:55:51 +0300 |
commit | 04414221df53bb5129e34bec354dae3121db436a (patch) | |
tree | f48b3ff309a2710bd1898134c2039141418b7218 /gas | |
parent | 4deb1ee57fdb711cac6f36fed75b3c8cb5112d99 (diff) | |
download | gdb-04414221df53bb5129e34bec354dae3121db436a.zip gdb-04414221df53bb5129e34bec354dae3121db436a.tar.gz gdb-04414221df53bb5129e34bec354dae3121db436a.tar.bz2 |
arc: Update opcode related include files for ARCv3.
Add new ARCv3 CPUs and required bits to decode/encode ARCv3 ISA
opcodes. Fix 32 bit relocations which were set as signed but should be
bitfield: ARC_32_ME, ARC_GLOB_DAT, ARC_JMP_SLOT, ARC_RELATIVE. Remove
non-ABI relocation ARC_32_ME_S.
include/
xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com>
Cupertino Miranda <cupertinomiranda@gmail.com>
Bruno Mauricio <brunoasmauricio@gmail.com>
* include/elf/arc-cpu.def: Add new HS5x and HS6x CPUs.
* include/elf/arc-reloc.def: Add new ARC64 relocations.
* include/elf/arc.h (EF_ARC_CPU_ARC64): New define.
* include/opcode/arc-attrs.h (FEATURE_LIST_NAME): Update predicate.
* include/opcode/arc-func.h: Update formating.
(replace_disp8ls): New function.
(replace_disp9s): Likewise.
(replace_disp6s): Likewise.
(replace_disp7s): Likewise.
(replace_disp12s): Likewise.
* include/opcode/arc.h (ARC_OPCODE_ARC64): New define.
(ARC_OPCODE_ARC32): Likewise.
(ARC_OPERAND_FP): Likewise.
(HARD_FIELDF): Likewise.
(ARC_OPCODE_ARCVx): New macro.
(arc_flag_class): Update structure to hold new extract/insert
functions for flags.
(INSN3OP): Update macro.
(FP_SIZE, TPOF, DPOF, SOPF, COPF, CONVOPS): New enums.
Signed-off-by: Claudiu Zissulescu <claziss@synopsys.com>
Diffstat (limited to 'gas')
0 files changed, 0 insertions, 0 deletions