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| author | Igor Tsimbalist <igor.v.tsimbalist@intel.com> | 2018-01-23 19:56:30 +0300 |
|---|---|---|
| committer | Igor Tsimbalist <igor.v.tsimbalist@intel.com> | 2018-01-23 20:09:35 +0300 |
| commit | be3a8dca2d7241878302ca55f45129d532b6f746 (patch) | |
| tree | 8466b4e7555c4c5c3923a92984c9875b18e609d1 /gas/doc | |
| parent | 3233d7d074e59b83f68a22071cff597f00d5ae81 (diff) | |
| download | gdb-be3a8dca2d7241878302ca55f45129d532b6f746.zip gdb-be3a8dca2d7241878302ca55f45129d532b6f746.tar.gz gdb-be3a8dca2d7241878302ca55f45129d532b6f746.tar.bz2 | |
Enable Intel PCONFIG instruction.
Intel has disclosed a set of new instructions for Icelake processor.
The spec is
https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf
This patch enables Intel PCONFIG instruction.
gas/
* config/tc-i386.c (cpu_arch): Add .pconfig.
* doc/c-i386.texi: Document .pconfig.
* testsuite/gas/i386/i386.exp: Add PCONFIG tests.
* testsuite/gas/i386/pconfig-intel.d: New test.
* testsuite/gas/i386/pconfig.d: Likewise.
* testsuite/gas/i386/pconfig.s: Likewise.
* testsuite/gas/i386/x86-64-pconfig-intel.d: Likewise.
* testsuite/gas/i386/x86-64-pconfig.d: Likewise.
* testsuite/gas/i386/x86-64-pconfig.s: Likewise.
opcodes/
* i386-dis.c (enum): Add pconfig.
* i386-gen.c (cpu_flag_init): Add CPU_PCONFIG_FLAGS.
(cpu_flags): Add CpuPCONFIG.
* i386-opc.h (enum): Add CpuPCONFIG.
(i386_cpu_flags): Add cpupconfig.
* i386-opc.tbl: Add PCONFIG instruction.
* i386-init.h: Regenerate.
* i386-tbl.h: Likewise.
Diffstat (limited to 'gas/doc')
| -rw-r--r-- | gas/doc/c-i386.texi | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi index a671be8..e669c5f 100644 --- a/gas/doc/c-i386.texi +++ b/gas/doc/c-i386.texi @@ -230,6 +230,7 @@ accept various extension mnemonics. For example, @code{mwaitx}, @code{clzero}, @code{wbnoinvd}, +@code{pconfig}, @code{lwp}, @code{fma4}, @code{xop}, @@ -1241,7 +1242,7 @@ supported on the CPU specified. The choices for @var{cpu_type} are: @item @samp{.avx512_vpopcntdq} @tab @samp{.avx512_vbmi2} @tab @samp{.avx512_vnni} @item @samp{.avx512_bitalg} @item @samp{.clwb} @tab @samp{.rdpid} @tab @samp{.ptwrite} @tab @item @samp{.ibt} -@item @samp{.wbnoinvd} +@item @samp{.wbnoinvd} @tab @samp{.pconfig} @item @samp{.shstk} @tab @samp{.gfni} @tab @samp{.vaes} @tab @samp{.vpclmulqdq} @item @samp{.3dnow} @tab @samp{.3dnowa} @tab @samp{.sse4a} @tab @samp{.sse5} @item @samp{.syscall} @tab @samp{.rdtscp} @tab @samp{.svme} @tab @samp{.abm} |