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author | Mary Bennett <mary.bennett682@gmail.com> | 2024-08-04 18:12:26 +0100 |
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committer | Nelson Chu <nelson@rivosinc.com> | 2024-08-06 13:57:33 +0800 |
commit | 2f1739a348c59e8b095805d3eb6200ffd04be1dc (patch) | |
tree | 2e19b601def98bb46ca42635d9ff21203de3c026 /gas/doc | |
parent | 8a3ffa71945816b941d3dea9ebc7013d5be7a1a4 (diff) | |
download | gdb-2f1739a348c59e8b095805d3eb6200ffd04be1dc.zip gdb-2f1739a348c59e8b095805d3eb6200ffd04be1dc.tar.gz gdb-2f1739a348c59e8b095805d3eb6200ffd04be1dc.tar.bz2 |
RISC-V: Add support for XCvBitmanip extension in CV32E40P
Spec: https://docs.openhwgroup.org/projects/cv32e40p-user-manual/en/latest/instruction_set_extensions.html
Contributors:
Mary Bennett <mary.bennett682@gmail.com>
Nandni Jamnadas <nandni.jamnadas@embecosm.com>
Pietra Ferreira <pietra.ferreira@embecosm.com>
Charlie Keaney
Jessica Mills
Craig Blackmore <craig.blackmore@embecosm.com>
Simon Cook <simon.cook@embecosm.com>
Jeremy Bennett <jeremy.bennett@embecosm.com>
Helene Chelin <helene.chelin@embecosm.com>
bfd/ChangeLog:
* elfxx-riscv.c (riscv_multi_subset_supports): Add `xcvbitmanip`
instruction class.
(riscv_multi_subset_supports_ext): Likewise.
gas/ChangeLog:
* config/tc-riscv.c (validate_riscv_insn): Add custom operands `Xc6` and `Xc7`.
(riscv_ip): Likewise.
* doc/c-riscv.texi: Note XCVbitmanip as an additional ISA extension
for CORE-V.
* testsuite/gas/riscv/march-help.l: Add xcvbitmanip.
* testsuite/gas/riscv/x-cv-bitmanip-fail.d: New Test.
* testsuite/gas/riscv/x-cv-bitmanip-fail.l: New Test.
* testsuite/gas/riscv/x-cv-bitmanip-fail.s: New Test.
* testsuite/gas/riscv/x-cv-bitmanip.d: New Test.
* testsuite/gas/riscv/x-cv-bitmanip.s: New Test.
include/opcode/ChangeLog:
* riscv-opc.h: Add corresponding MATCH and MASK macros for
XCVbitmanip.
* riscv.h: Add corresponding EXTRACT and ENCODE macros for
XCVbitmanip.
(enum riscv_insn_class): Add the XCVbitmanip instruction class.
opcodes/ChangeLog:
* riscv-dis.c (print_insn_args): Add custom operands `Xc6` and `Xc7`.
* riscv-opc.c: Add XCvBitmanip instructions.
Diffstat (limited to 'gas/doc')
-rw-r--r-- | gas/doc/c-riscv.texi | 17 |
1 files changed, 11 insertions, 6 deletions
diff --git a/gas/doc/c-riscv.texi b/gas/doc/c-riscv.texi index d396669..cec7457 100644 --- a/gas/doc/c-riscv.texi +++ b/gas/doc/c-riscv.texi @@ -740,13 +740,18 @@ extensions supported and provides the location of their publicly-released documentation: @table @r -@item XCvMac -The XCvMac extension provides instructions for multiply-accumulate operations. +@item XCvAlu +The XCvAlu extension provides instructions for general ALU operations. It is documented in @url{https://docs.openhwgroup.org/projects/cv32e40p-user-manual/en/latest/instruction_set_extensions.html} -@item XCvAlu -The XCvAlu extension provides instructions for general ALU operations. +@item XCvBi +The XCvBi extension provides instructions for branch immediate operations. + +It is documented in @url{https://docs.openhwgroup.org/projects/cv32e40p-user-manual/en/latest/instruction_set_extensions.html} + +@item XCvBitmanip +The XCvBitmanip extension provides instructions for bitmanip operations. It is documented in @url{https://docs.openhwgroup.org/projects/cv32e40p-user-manual/en/latest/instruction_set_extensions.html} @@ -755,8 +760,8 @@ The XCvElw extension provides instructions for event load word operations. It is documented in @url{https://docs.openhwgroup.org/projects/cv32e40p-user-manual/en/latest/instruction_set_extensions.html} -@item XCvBi -The XCvBi extension provides instructions for branch immediate operations. +@item XCvMac +The XCvMac extension provides instructions for multiply-accumulate operations. It is documented in @url{https://docs.openhwgroup.org/projects/cv32e40p-user-manual/en/latest/instruction_set_extensions.html} |