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| author | Nelson Chu <nelson.chu@sifive.com> | 2020-02-12 02:18:49 -0800 |
|---|---|---|
| committer | Jim Wilson <jimw@sifive.com> | 2020-02-20 16:49:09 -0800 |
| commit | bd0cf5a6bae180f65f3b9298619d1bd695abcdd8 (patch) | |
| tree | a9573166927fdbd4f0b702bd2207fe3a7e6f3d72 /binutils/ChangeLog | |
| parent | 10a95fcc1f8fb621dfc82b1097336cc58a3574f5 (diff) | |
| download | gdb-bd0cf5a6bae180f65f3b9298619d1bd695abcdd8.zip gdb-bd0cf5a6bae180f65f3b9298619d1bd695abcdd8.tar.gz gdb-bd0cf5a6bae180f65f3b9298619d1bd695abcdd8.tar.bz2 | |
RISC-V: Support the ISA-dependent CSR checking.
According to the riscv privilege spec, some CSR are only valid when rv32 or
the specific extension is set. We extend the DECLARE_CSR and DECLARE_CSR_ALIAS
to record more informaton we need, and then check whether the CSR is valid
according to these information. We report warning message when the CSR is
invalid, so we have a choice between error and warning by --fatal-warnings
option. Also, a --no-warn/-W option is used to turn the warnings off, if
people don't want the warnings.
gas/
* config/tc-riscv.c (enum riscv_csr_class): New enum. Used to decide
whether or not this CSR is legal in the current ISA string.
(struct riscv_csr_extra): New structure to hold all extra information
of CSR.
(riscv_init_csr_hash): New function. According to the DECLARE_CSR and
DECLARE_CSR_ALIAS, insert CSR extra information into csr_extra_hash.
Call hash_reg_name to insert CSR address into reg_names_hash.
(md_begin): Call riscv_init_csr_hashes for each DECLARE_CSR.
(reg_csr_lookup_internal, riscv_csr_class_check): New functions.
Decide whether the CSR is valid according to the csr_extra_hash.
(init_opcode_hash): Update 'if (hash_error != NULL)' as hash_error is
not a boolean. This is same as riscv_init_csr_hash, so keep the
consistent usage.
* testsuite/gas/riscv/csr-dw-regnums.d: Add -march=rv32if option.
* testsuite/gas/riscv/priv-reg.d: Add f-ext by -march option.
* testsuite/gas/riscv/priv-reg-fail-fext.d: New testcase. The source
file is `priv-reg.s`, and the ISA is rv32i without f-ext, so the
f-ext CSR are not allowed.
* testsuite/gas/riscv/priv-reg-fail-fext.l: Likewise.
* testsuite/gas/riscv/priv-reg-fail-rv32-only.d: New testcase. The
source file is `priv-reg.s`, and the ISA is rv64if, so the
rv32-only CSR are not allowed.
* testsuite/gas/riscv/priv-reg-fail-rv32-only.l: Likewise.
include/
* opcode/riscv-opc.h: Extend DECLARE_CSR and DECLARE_CSR_ALIAS to
record riscv_csr_class.
opcodes/
* riscv-dis.c (print_insn_args): Updated since the DECLARE_CSR is changed.
gdb/
* riscv-tdep.c: Updated since the DECLARE_CSR is changed.
* riscv-tdep.h: Likewise.
* features/riscv/rebuild-csr-xml.sh: Generate the 64bit-csr.xml without
rv32-only CSR.
* features/riscv/64bit-csr.xml: Regernated.
binutils/
* dwarf.c: Updated since the DECLARE_CSR is changed.
Diffstat (limited to 'binutils/ChangeLog')
| -rw-r--r-- | binutils/ChangeLog | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/binutils/ChangeLog b/binutils/ChangeLog index bb39cea..5b2f876 100644 --- a/binutils/ChangeLog +++ b/binutils/ChangeLog @@ -1,3 +1,8 @@ +2020-02-20 Nelson Chu <nelson.chu@sifive.com> + + * dwarf.c (regname_internal_riscv): Updated since the DECLARE_CSR + is changed. + 2020-02-19 Jordan Rupprecht <rupprecht@google.com> * objdump.c (show_line): call bfd_demangle when using do_demangle. |