| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2025-08-20 | tree-optimization/114480 - speedup IDF compute | Richard Biener | 1 | -19/+25 |
| 2025-08-20 | AVR: target/121608 - Don't add --relax when linking with -r. | Georg-Johann Lay | 1 | -1/+1 |
| 2025-08-20 | Thread the remains of vect_analyze_slp_instance | Richard Biener | 1 | -146/+345 |
| 2025-08-20 | Enable gather/scatter for epilogues of vector epilogues | Richard Biener | 1 | -7/+0 |
| 2025-08-20 | Remove most of the epilogue vinfo fixup | Richard Biener | 1 | -89/+5 |
| 2025-08-20 | Record get_load_store_info results from analysis | Richard Biener | 3 | -138/+182 |
| 2025-08-19 | cobol: Eliminate errors that cause valgrind messages. | Robert Dubner | 3 | -2/+15 |
| 2025-08-19 | Fortran: Clean up and fix some refs. | Jerry DeLisle | 1 | -51/+51 |
| 2025-08-19 | x86: Place the TLS call before all register setting BBs | H.J. Lu | 5 | -106/+332 |
| 2025-08-20 | Daily bump. | GCC Administrator | 4 | -1/+128 |
| 2025-08-19 | c++: testcase tweak for -fimplicit-constexpr | Jason Merrill | 1 | -1/+1 |
| 2025-08-19 | c++: Fix ICE on mangling invalid compound requirement [PR120618] | Ben Wu | 3 | -4/+20 |
| 2025-08-19 | middle-end: Fix malloc like functions when calling with void "return" [PR120024] | Andrew Pinski | 3 | -13/+28 |
| 2025-08-19 | c++: constrained corresponding using from partial spec [PR121351] | Patrick Palka | 2 | -4/+27 |
| 2025-08-19 | Remove reduction chain detection from parloops | Richard Biener | 1 | -177/+0 |
| 2025-08-19 | A few missing SLP node passings to vector costing | Richard Biener | 2 | -5/+6 |
| 2025-08-19 | tree-optimization/121592 - failed reduction SLP discovery | Richard Biener | 1 | -0/+5 |
| 2025-08-19 | Fix riscv build, no longer works with python2 | Richard Biener | 1 | -1/+1 |
| 2025-08-19 | tree-optimization/121527 - wrong SRA with aggregate copy | Richard Biener | 1 | -14/+6 |
| 2025-08-19 | AArch64: Use vectype from SLP node instead of stmt_info [PR121536] | Tamar Christina | 2 | -5/+20 |
| 2025-08-19 | middle-end: Fix costing hooks of various vectorizable_* [PR121536] | Tamar Christina | 1 | -6/+6 |
| 2025-08-19 | AArch64: Fix scalar costing after removal of vectype from mid-end [PR121536] | Tamar Christina | 1 | -0/+11 |
| 2025-08-19 | testsuite: Fix g++.dg/abi/mangle83.C [PR121578] | Nathaniel Shead | 1 | -1/+1 |
| 2025-08-19 | c++/modules: Fix exporting using-decls of unattached purview functions [PR120... | Nathaniel Shead | 3 | -2/+26 |
| 2025-08-19 | testsuite: Fix PR108080 testcase for some targets [PR121396] | Nathaniel Shead | 1 | -1/+1 |
| 2025-08-19 | Daily bump. | GCC Administrator | 6 | -1/+203 |
| 2025-08-18 | docs: Fix __builtin_object_size example [PR121581] | Andrew Pinski | 1 | -1/+2 |
| 2025-08-18 | opts: use sanitize_code_type for sanitizer flags | Indu Bhagat | 14 | -39/+75 |
| 2025-08-18 | aarch64: add new constants for MTE insns | Indu Bhagat | 1 | -4/+14 |
| 2025-08-18 | gcse: Fix handling of partial clobbers [PR97497] | Richard Sandiford | 2 | -8/+71 |
| 2025-08-18 | LoongArch: Implement 16-byte atomic add, sub, and, or, xor, and nand with sc.q | Xi Ruoyao | 1 | -6/+111 |
| 2025-08-18 | LoongArch: Implement 16-byte atomic exchange with sc.q | Xi Ruoyao | 1 | -0/+35 |
| 2025-08-18 | LoongArch: Implement 16-byte CAS with sc.q | Xi Ruoyao | 1 | -0/+89 |
| 2025-08-18 | LoongArch: Implement 16-byte atomic store with sc.q | Xi Ruoyao | 2 | -1/+28 |
| 2025-08-18 | LoongArch: Add -m[no-]scq option | Xi Ruoyao | 8 | -5/+31 |
| 2025-08-18 | LoongArch: Implement 16-byte atomic store with LSX | Xi Ruoyao | 1 | -0/+44 |
| 2025-08-18 | LoongArch: Implement 16-byte atomic load with LSX | Xi Ruoyao | 1 | -0/+41 |
| 2025-08-18 | LoongArch: Implement atomic_fetch_nand<GPR:mode> | Xi Ruoyao | 1 | -0/+40 |
| 2025-08-18 | LoongArch: Don't expand atomic_fetch_sub_{hi, qi} to LL-SC loop if -mlam-bh | Xi Ruoyao | 1 | -1/+1 |
| 2025-08-18 | LoongArch: Implement subword atomic_fetch_{and, or, xor} with am*.w instructions | Xi Ruoyao | 1 | -143/+34 |
| 2025-08-18 | LoongArch: Remove unneeded "andi offset, addr, 3" instruction in atomic_test_... | Xi Ruoyao | 1 | -5/+4 |
| 2025-08-18 | LoongArch: Remove unneeded "b 3f" instruction after LL-SC loops | Xi Ruoyao | 2 | -13/+10 |
| 2025-08-18 | LoongArch: Don't emit overly-restrictive barrier for LL-SC loops | Xi Ruoyao | 1 | -12/+9 |
| 2025-08-18 | LoongArch: Allow using bstrins for masking the address in atomic_test_and_set | Xi Ruoyao | 1 | -5/+6 |
| 2025-08-18 | LoongArch: Don't use "+" for atomic_{load, store} "m" constraint | Xi Ruoyao | 1 | -2/+2 |
| 2025-08-18 | LoongArch: (NFC) Remove amo and use size instead | Xi Ruoyao | 1 | -28/+25 |
| 2025-08-18 | LoongArch: (NFC) Remove atomic_optab and use amop instead | Xi Ruoyao | 1 | -4/+2 |
| 2025-08-18 | Daily bump. | GCC Administrator | 3 | -1/+99 |
| 2025-08-17 | [PR target/121213] Avoid unnecessary constant load in amoswap | Austin Law | 2 | -4/+21 |
| 2025-08-17 | Add test for spill failure | dragan.mladjenovic | 1 | -0/+10 |
