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| author | Indu Bhagat <indu.bhagat@oracle.com> | 2025-07-09 14:50:44 +0300 |
|---|---|---|
| committer | Claudiu Zissulescu <claudiu.zissulescu-ianculescu@oracle.com> | 2025-08-18 18:01:29 +0300 |
| commit | f88e1fa41e76f774b29537e2f54c1fa1074063bd (patch) | |
| tree | b8f505a0b92955bdc050bebbe8312a8700b29496 /gcc | |
| parent | 1cc21cb516105628721885dca3f925a2b80640aa (diff) | |
| download | gcc-f88e1fa41e76f774b29537e2f54c1fa1074063bd.zip gcc-f88e1fa41e76f774b29537e2f54c1fa1074063bd.tar.gz gcc-f88e1fa41e76f774b29537e2f54c1fa1074063bd.tar.bz2 | |
aarch64: add new constants for MTE insns
Define new constants to be used by the MTE pattern definitions.
gcc/
* config/aarch64/aarch64.md (MEMTAG_TAG_MASK): New define
constant.
(MEMTAG_ADDR_MASK): Likewise.
(irg, subp, ldg): Use new constants.
Signed-off-by: Claudiu Zissulescu <claudiu.zissulescu-ianculescu@oracle.com>
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/config/aarch64/aarch64.md | 18 |
1 files changed, 14 insertions, 4 deletions
diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md index 8e431a1..fedbd40 100644 --- a/gcc/config/aarch64/aarch64.md +++ b/gcc/config/aarch64/aarch64.md @@ -441,6 +441,16 @@ ; must not operate on inactive inputs if doing so could induce a fault. (SVE_STRICT_GP 1)]) +;; These constants are used as a const_int in MTE instructions +(define_constants + [; 0xf0ff... + ; Tag mask for the 4-bit tag stored in the top 8 bits of a pointer. + (MEMTAG_TAG_MASK -1080863910568919041) + + ; 0x00ff... + ; Tag mask 56-bit address used by subp instruction. + (MEMTAG_ADDR_MASK 72057594037927935)]) + (include "constraints.md") (include "predicates.md") (include "iterators.md") @@ -8530,7 +8540,7 @@ [(set (match_operand:DI 0 "register_operand" "=rk") (ior:DI (and:DI (match_operand:DI 1 "register_operand" "rk") - (const_int -1080863910568919041)) ;; 0xf0ff... + (const_int MEMTAG_TAG_MASK)) (ashift:DI (unspec:QI [(match_operand:DI 2 "register_operand" "r")] UNSPEC_GEN_TAG_RND) (const_int 56))))] @@ -8573,9 +8583,9 @@ [(set (match_operand:DI 0 "register_operand" "=r") (minus:DI (and:DI (match_operand:DI 1 "register_operand" "rk") - (const_int 72057594037927935)) ;; 0x00ff... + (const_int MEMTAG_ADDR_MASK)) (and:DI (match_operand:DI 2 "register_operand" "rk") - (const_int 72057594037927935))))] ;; 0x00ff... + (const_int MEMTAG_ADDR_MASK))))] "TARGET_MEMTAG" "subp\\t%0, %1, %2" [(set_attr "type" "memtag")] @@ -8585,7 +8595,7 @@ (define_insn "ldg" [(set (match_operand:DI 0 "register_operand" "+r") (ior:DI - (and:DI (match_dup 0) (const_int -1080863910568919041)) ;; 0xf0ff... + (and:DI (match_dup 0) (const_int MEMTAG_TAG_MASK)) (ashift:DI (mem:QI (unspec:DI [(and:DI (plus:DI (match_operand:DI 1 "register_operand" "rk") |