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2024-12-09Daily bump.GCC Administrator3-1/+32
2024-12-08Support for 64-bit location_t: Activate 64-bit location_tLewis Hyatt9-45/+30
Change location_t to be a 64-bit integer instead of a 32-bit integer in libcpp. Also included in this change are the two other patches in the original series which depended on this one; I am committing them all at once in case it needs to be reverted later: -Support for 64-bit location_t: gimple parts The size of struct gimple increased by 8 bytes with the change in size of location_t from 32- to 64-bit; adjust the WORD markings in the comments accordingly. It seems that most of the WORD markings were off by one already, probably not having been updated after a previous reduction in the size of a gimple, so they have become retroactively correct again, and only a couple needed adjustment actually. Also add a comment that there is now 32 bits of unused padding available in struct gimple for 64-bit hosts. -Support for 64-bit location_t: Remove -flarge-source-files The option -flarge-source-files became unnecessary with 64-bit location_t and harms performance compared to the new default setting, so silently ignore it. libcpp/ChangeLog: * include/cpplib.h (struct cpp_token): Adjust comment about the struct size. * include/line-map.h (location_t): Change typedef from 32-bit to 64-bit integer. (LINE_MAP_MAX_COLUMN_NUMBER): Increase size to be appropriate for 64-bit location_t. (LINE_MAP_MAX_LOCATION_WITH_PACKED_RANGES): Likewise. (LINE_MAP_MAX_LOCATION_WITH_COLS): Likewise. (LINE_MAP_MAX_LOCATION): Likewise. (MAX_LOCATION_T): Likewise. (line_map_suggested_range_bits): Likewise. (struct line_map): Adjust comment about the struct size. (struct line_map_macro): Likewise. (struct line_map_ordinary): Likewise. Rearrange fields to optimize padding. gcc/testsuite/ChangeLog: * g++.dg/diagnostic/pr77949.C: Adapt the test for 64-bit location_t, when the previously expected failure doesn't actually happen. * g++.dg/modules/loc-prune-4.C: Adjust the expected output for the 64-bit location_t case. * gcc.dg/plugin/expensive_selftests_plugin.cc: Don't try to test the maximum supported column number in 64-bit location_t mode. * gcc.dg/plugin/location_overflow_plugin.cc: Adjust the base_location so it can effectively test 64-bit location_t. gcc/ChangeLog: * gimple.h (struct gphi): Update word marking comments to reflect the new size of location_t. (struct gimple): Likewise. Add a comment about padding. * common.opt: Mark -flarge-source-files as Ignored. * common.opt.urls: Regenerate. * doc/invoke.texi: Remove -flarge-source-files. * toplev.cc (process_options): Remove support for -flarge-source-files.
2024-12-08pru: Implement c and n asm operand modifiersDimitar Dimitrov2-1/+43
Fix c-c++-common/toplevel-asm-1.c failure for PRU backend, caused by missing implementation of the "c" asm operand modifier. gcc/ChangeLog: * config/pru/pru.cc (pru_print_operand): Implement c and n inline assembly operand modifiers. gcc/testsuite/ChangeLog: * gcc.target/pru/asm-op-modifier.c: New test. Signed-off-by: Dimitar Dimitrov <dimitar@dinux.eu>
2024-12-08Daily bump.GCC Administrator4-1/+93
2024-12-07SPARC: Add functional comments for VIS4B instructionsEric Botcazou1-1/+14
gcc/ * config/sparc/sparc.md (VIS4B instructions): Add comments.
2024-12-07AVR: Better location for late (during final) diagnostic.Georg-Johann Lay1-5/+11
gcc/ * config/avr/avr.cc (avr_print_operand_address): Use avr_insn_location as location for late (during final) diagnostic.
2024-12-07PR modula2/117948: Forward procedure declaration should only be available in ISOGaius Mulley4-4/+26
This patch restricts the forward procedure declaration to the ISO dialect. gcc/m2/ChangeLog: PR modula2/117948 * gm2-compiler/P1Build.bnf (ForwardDeclaration): Pass token position of the FORWARD keyword to EndBuildForward. * gm2-compiler/P1SymBuild.def (EndBuildForward): New parameter forwardPos. * gm2-compiler/P1SymBuild.mod (EndBuildForward): Issue an error at forwardPos if the Iso boolean is false. gcc/testsuite/ChangeLog: PR modula2/117948 * gm2/pim/fail/forward.mod: New test. Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
2024-12-07i386: x r<< (c - y) to x r>> y etc. optimization [PR117930]Jakub Jelinek2-0/+259
The following patch optimizes x r<< (c - y) to x r>> y, x r>> (c - y) to x r<< y, x r<< (c + y) to x r<< y and x r>> (c + y) to x r>> y if c is a multiple of x's bitsize. 2024-12-07 Jakub Jelinek <jakub@redhat.com> PR target/117930 * config/i386/i386.md (crotate): New define_code_attr. (*<insn><mode>3_add, *<insn><mode>3_add_1, *<insn><mode>3_sub, *<insn><mode>3_sub_1): New define_insn_and_split patterns plus following define_split for constant first input operand. * gcc.target/i386/pr117930.c: New test.
2024-12-07The fix for PR116778:Denis Chertykov2-4/+5
Brief: The bug appears in LRA after rematerialization pass while creating live ranges. File lra.cc: ************************************************************* /* Now we know what pseudos should be spilled. Try to rematerialize them first. */ if (lra_remat ()) { /* We need full live info -- see the comment above. */ lra_create_live_ranges (lra_reg_spill_p, true); ************************************************************* Wrong call `lra_create_live_ranges (lra_reg_spill_p, true)' It have to be `lra_create_live_ranges (true, true)'. The explanation: ********************************** int main (void) { if (a.u33 * a.u33 != 0) ------^^^^^^^^^^^^^ goto abrt; if (a.u33 * a.u40 * a.u33 != 0) ********************************** The bug appears here. Part of the expression `a.u33 * a.u33' Before LRA: ************************************************************* (insn 13 11 15 2 (set (reg:QI 184 [ _1+3 ]) (mem/c:QI (const:HI (plus:HI (symbol_ref:HI ("a") [flags 0x2] <var_decl 0x7c866435d000 a>) (const_int 3 [0x3]))) [1 a+3 S1 A8])) "bf.c":11:8 86 {movqi_insn_split} (nil)) (insn 15 13 16 2 (set (reg:QI 64 [ a+4 ]) (mem/c:QI (const:HI (plus:HI (symbol_ref:HI ("a") [flags 0x2] <var_decl 0x7c866435d000 a>) (const_int 4 [0x4]))) [1 a+4 S1 A8])) "bf.c":11:8 86 {movqi_insn_split} (nil)) (insn 16 15 20 2 (set (reg:QI 185 [ _1+4 ]) (zero_extract:QI (reg:QI 64 [ a+4 ]) (const_int 1 [0x1]) (const_int 0 [0]))) "bf.c":11:8 985 {*extzvqi_split} (nil)) ************************************************************* After LRA: ************************************************************* (insn 587 11 13 2 (set (reg:QI 24 r24 [368]) (mem/c:QI (const:HI (plus:HI (symbol_ref:HI ("a") [flags 0x2] <var_decl 0x7c866435d000 a>) (const_int 3 [0x3]))) [1 a+3 S1 A8])) "bf.c":11:8 86 {movqi_insn_split} (nil)) (insn 13 587 15 2 (set (mem/c:QI (plus:HI (reg/f:HI 28 r28) (const_int 1 [0x1])) [4 %sfp+1 S1 A8]) (reg:QI 24 r24 [368])) "bf.c":11:8 86 {movqi_insn_split} (nil)) (insn 15 13 16 2 (set (reg:QI 6 r6 [orig:64 a+4 ] [64]) (mem/c:QI (const:HI (plus:HI (symbol_ref:HI ("a") [flags 0x2] <var_decl 0x7c866435d000 a>) (const_int 4 [0x4]))) [1 a+4 S1 A8])) "bf.c":11:8 86 {movqi_insn_split} (nil)) (insn 16 15 572 2 (set (reg:QI 24 r24 [orig:185 _1+4 ] [185]) (zero_extract:QI (reg:QI 6 r6 [orig:64 a+4 ] [64]) (const_int 1 [0x1]) (const_int 0 [0]))) "bf.c":11:8 985 {*extzvqi_split} (nil)) (insn 572 16 20 2 (set (mem/c:QI (plus:HI (reg/f:HI 28 r28) (const_int 1 [0x1])) [4 %sfp+1 S1 A8]) (reg:QI 24 r24 [orig:185 _1+4 ] [185])) "bf.c":11:8 86 {movqi_insn_split} (nil)) ************************************************************* Insn 13 and insn 572 use sfp+1 as a spill slot, but in IRA pass it was a two different pseudos r184 and r185. Insns 13 use sfp+1 as a spill slot for r184 Insns 572 use the same slot for r185. It's wrong. Here we have a rematerialization. Fragment from bf.c.317r.reload: ************************************************************************************** ******** Rematerialization #1: ******** df_worklist_dataflow_doublequeue: n_basic_blocks 14 n_edges 18 count 14 ( 1) df_worklist_dataflow_doublequeue: n_basic_blocks 14 n_edges 18 count 14 ( 1) Cands: 0 (nop=0, remat_regno=185, reload_regno=359): (insn 16 15 572 2 (set (reg:QI 359 [orig:185 _1+4 ] [185]) (zero_extract:QI (reg:QI 64 [ a+4 ]) (const_int 1 [0x1]) (const_int 0 [0]))) "bf.c":11:8 985 {*extzvqi_split} (nil)) ************************************************************************************** [...] ************************************************************************************** Ranges after the compression: r185: [0..1] Frame pointer can not be eliminated anymore Spilling non-eliminable hard regs: 28 29 Spilling r113(28) Spilling r184(29) Spilling r208(29) Spilling r209(28) Slot 0 regnos (width = 0): 185 209 208 184 113 ************************************************************************************** The bug is here: `r185: [0..1]' wrong live range after compression. r185 and r184 can't have the same spill slot ! Rematerialization in bf.c.317r.reload looks like: ************************************************************* 24: r14:QI=r185:QI Inserting rematerialization insn before: 581: r14:QI=zero_extract(r64:QI,0x1,0) deleting insn with uid = 24. Considering alt=0 of insn 16: (0) =r (1) rYil (2) n overall=0,losers=0,rld_nregs=0 32: r22:QI=r185:QI Inserting rematerialization insn before: 582: r22:QI=zero_extract(r64:QI,0x1,0) deleting insn with uid = 32. ************************************************************* It's happened because: Fragment from lra.c (lra): ************************************************************************* if (! live_p) { /* We need full live info for spilling pseudos into registers instead of memory. */ lra_create_live_ranges (lra_reg_spill_p, true); live_p = true; } /* We should check necessity for spilling here as the above live range pass can remove spilled pseudos. */ if (! lra_need_for_spills_p ()) break; /* Now we know what pseudos should be spilled. Try to rematerialize them first. */ if (lra_remat ()) { /* We need full live info -- see the comment above. */ lra_create_live_ranges (lra_reg_spill_p, true); ----------------------------------^^^^^^^^^^^^^^^ live_p = true; ************************************************************************* The bug is here. Rematerialization sometimes can be like spilling pseudos into registers. 582: r22:QI=zero_extract(r64:QI,0x1,0) So, here we need a live ranges for all pseudos. PS: the patch will not affect any target with usable definition of TARGET_SPILL_CLASS hook. PR target/116778 gcc/ * lra-lives.cc (complete_info_p): Clarification of the comment. * lra.cc (lra): Create a full live info after rematerialization.
2024-12-07Revert "RISC-V: Add const to function_shape::get_name [NFC]"Kito Cheng3-73/+73
This reverts commit 9bf4cad4e4e1ec92c320a619c9bad35535596ced.
2024-12-07Daily bump.GCC Administrator7-1/+875
2024-12-06Support for 64-bit location_t: libgdiagnostics partsLewis Hyatt1-2/+2
Tweak libgdiagnostics.cc, which is necessarily sensitive to line-map internals, to support 64-bit location_t as well. gcc/ChangeLog: * libgdiagnostics.cc (struct diagnostic_manager): Use location_t(-1) instead of UINT_MAX to support 64-bit location_t as well. (diagnostic_manager::diagnostic_manager): Change hard-coded "5" to line_map_suggested_range_bits.
2024-12-06Support for 64-bit location_t: RTL partsLewis Hyatt30-57/+170
Some RTL objects need to store a location_t. Currently, they store it in the rt_int field of union rtunion, but in a world where location_t could be 64-bit, they need to store it in a larger variable. Unfortunately, rtunion does not currently have a 64-bit int type for that purpose, so add one. In order to avoid increasing any overhead when 64-bit locations are not in use, the new field is dedicated for location_t storage only and has type "location_t" so it will only be 64-bit if necessary. This necessitates adding a new RTX format code 'L' for locations. There are very many switch statements in the codebase that inspect the RTX format code. I took the approach of finding all of them that handle code 'i' or 'n' and making sure they handle 'L' too. I am sure that some of these call sites can never see an 'L' code, but I thought it would be safer and more future-proof to handle as many as possible, given it's just a line or two to add in most cases. gcc/ChangeLog: * rtl.def (DEBUG_INSN): Use new format code 'L' for location_t fields. (INSN): Likewise. (JUMP_INSN): Likewise. (CALL_INSN): Likewise. (ASM_INPUT): Likewise. (ASM_OPERANDS): Likewise. * rtl.h (union rtunion): Add new location_t RT_LOC member for use by the 'L' format. (struct rtx_debug_insn): Adjust comment. (struct rtx_nonjump_insn): Adjust comment. (struct rtx_call_insn): Adjust comment. (XLOC): New accessor macro for rtunion::rt_loc. (X0LOC): Likewise. (XCLOC): Likewise. (INSN_LOCATION): Use XLOC instead of XUINT to retrieve a location_t. (NOTE_MARKER_LOCATION): Likewise for XCUINT -> XCLOC. (ASM_OPERANDS_SOURCE_LOCATION): Likewise. (ASM_INPUT_SOURCE_LOCATION):Likewise. (gen_rtx_ASM_INPUT): Adjust to use sL format instead of si. (gen_rtx_INSN): Adjust prototype to use location_r rather than int for the location. * cfgrtl.cc (force_nonfallthru_and_redirect): Change type of LOC local variable from int to location_t. * rtlhash.cc (add_rtx): Support 'L' format in the switch statement. * var-tracking.cc (loc_cmp): Likewise. * alias.cc (rtx_equal_for_memref_p): Likewise. * config/alpha/alpha.cc (summarize_insn): Likewise. * config/ia64/ia64.cc (rtx_needs_barrier): Likewise. * config/rs6000/rs6000.cc (rs6000_hash_constant): Likewise. * cse.cc (hash_rtx): Likewise. (exp_equiv_p): Likewise. * cselib.cc (rtx_equal_for_cselib_1): Likewise. (cselib_hash_rtx): Likewise. (cselib_expand_value_rtx_1): Likewise. * emit-rtl.cc (copy_insn_1): Likewise. (gen_rtx_INSN): Change the location argument from int to location_t, and call the corresponding gen_rtf_fmt_* function. * final.cc (leaf_renumber_regs_insn): Support 'L' format in the switch statement. * genattrtab.cc (attr_rtx_1): Likewise. * genemit.cc (gen_exp): Likewise. * gengenrtl.cc (type_from_format): Likewise. (accessor_from_format): Likewise. * gengtype.cc (adjust_field_rtx_def): Likewise. * genpeep.cc (match_rtx): Likewise; just mark gcc_unreachable() for now. * genrecog.cc (find_operand): Support 'L' format in the switch statement. (find_matching_operand): Likewise. (validate_pattern): Likewise. * gensupport.cc (subst_pattern_match): Likewise. (get_alternatives_number): Likewise. (collect_insn_data): Likewise. (alter_predicate_for_insn): Likewise. (alter_constraints): Likewise. (subst_dup): Likewise. * jump.cc (rtx_renumbered_equal_p): Likewise. * loop-invariant.cc (hash_invariant_expr_1): Likewise. * lra-constraints.cc (operands_match_p): Likewise. * lra.cc (lra_rtx_hash): Likewise. * print-rtl.cc (rtx_writer::print_rtx_operand_code_i): Refactor location_t-relevant code to... (rtx_writer::print_rtx_operand_code_L): ...new function here. (rtx_writer::print_rtx_operand): Support 'L' format in the switch statement. * print-rtl.h (rtx_writer::print_rtx_operand_code_L): Add prototype for new function. * read-rtl-function.cc (function_reader::read_rtx_operand): Support 'L' format in the switch statement. (function_reader::read_rtx_operand_i_or_n): Rename to... (function_reader::read_rtx_operand_inL): ...this, and support 'L' as well. * read-rtl.cc (apply_int_iterator): Support 'L' format in the switch statement. (rtx_reader::read_rtx_operand): Likewise. * reload.cc (operands_match_p): Likewise. * rtl.cc (rtx_format): Add new code 'L'. (rtx_equal_p): Support 'L' in the switch statement. Remove dead code in the handling for 'i' and 'n'.
2024-12-06final: Fix call to INSN_LOCATION on a NOTE rtlLewis Hyatt1-1/+3
This function has a code path that calls INSN_LOCATION on an rtl note. For a note, this returns the note type enum rather than a location, but it runs without complaint even with --enable-checking=rtl because both are stored in the rt_int member of the rtunion. A subsequent commit will add a new rtl format code specifically for locations, in which case attempting to call INSN_LOCATION on a note will trigger an error. Fix it up by handling the case of a note missing a location separately. gcc/ChangeLog: * final.cc (reemit_insn_block_notes): Don't try to call INSN_LOCATION on a NOTE rtl object. Don't call change_scope () for a NOTE missing a location.
2024-12-06middle-end: Handle resized PHI nodes in loop_version()Lewis Hyatt5-15/+64
While testing upcoming support for 64-bit location_t, I came across some test failures on sparc (32-bit) that trigger when location_t is changed to be 64-bit. The reason is that several call sites that make use of loop_version() for performing loop optimizations assume that a gphi* obtained prior to calling loop_version() will remain valid afterwards, but this is not the case for a PHI that needs to be resized. It doesn't happen usually, because PHI nodes usually have room for at least 4 arguments and this is usually more than are needed, but this is not guaranteed. Fix the affected callers by avoiding the assumption that a PHI node pointer remains valid. For most cases, this is done by remembering instead the gphi->result pointer, which contains a pointer back to the PHI node that is kept up to date when the PHI is moved to a new address. gcc/ChangeLog: * tree-parloops.cc (struct reduction_info): Store the result of the reduction PHI rather than the PHI itself. (reduction_info::reduc_phi): New member function. (reduction_hasher::equal): Adapt to the change in struct reduction_info. (reduction_phi): Likewise. (initialize_reductions): Likewise. (create_call_for_reduction_1): Likewise. (transform_to_exit_first_loop_alt): Likewise. (transform_to_exit_first_loop): Likewise. (build_new_reduction): Likewise. (set_reduc_phi_uids): Likewise. (try_create_reduction_list): Likewise. * tree-ssa-loop-split.cc (split_loop): Remember the PHI result variable so that the PHI can be found in case it is resized and move to a new address. * tree-vect-loop-manip.cc (vect_loop_versioning): After calling loop_version(), fix up stored PHI pointers in case they have changed. * tree-vectorizer.cc (vec_info::resync_stmt_addr): New function. * tree-vectorizer.h (vec_info::resync_stmt_addr): Declare.
2024-12-06Only add inferred ranges if they change the value.Andrew MacLeod1-1/+8
Do not add an inferred range if it is already incorprated in the current range of an SSA_NAME. PR tree-optimization/117467 * gimple-range-infer.cc (infer_range_manager::add_ranges): Check range_of_expr to see if the inferred range is needed.
2024-12-06Add a range query to inferred ranges.Andrew MacLeod5-17/+74
Provide a range_query for any inferred range processing which wants to examine the range of an argument to make decisions. Add some comments. * gimple-range-cache.cc (ranger_cache::ranger_cache): Create the infer oracle using THIS as the range_query. * gimple-range-infer.cc (gimple_infer_range::gimple_infer_range): Add a range_query to the constructor and use it. (infer_range_manager::infer_range_manager): Add a range_query. * gimple-range-infer.h (gimple_infer_range): Adjust prototype. (infer_range_manager): Add a range_query. * value-query.cc (range_query::create_infer_oracle): Add a range_query. * value-query.h (range_query::create_infer_oracle): Update prototype.
2024-12-06Do not calculate an entry range for invariant names.Andrew MacLeod1-0/+7
If an SSA_NAME is invariant, do not calculate an on_entry value. PR tree-optimization/117467 * gimple-range-cache.cc (ranger_cache::entry_range): Do not invoke range_from_dom for invariant ssa-names.
2024-12-06[PR117248][LRA]: Rewriting reg notes update and fix calculation of conflict ↵Vladimir N. Makarov1-107/+177
hard regs of pseudo. LRA updates conflict hard regs of pseudo when some hard reg dies. A complicated PA div/mod insns reference for clobbered explicit hard regs and hard reg as operands. It prevents some hard reg dying although they still conflict with pseudos living through. Although on such insns LRA updates wrongly reg notes (REG_DEAD, REG_UNUSED) which are used later in rematerialization subpass. The patch fixes the problems. gcc/ChangeLog: PR rtl-optimization/117248 * lra-lives.cc (start_living, start_dying): Remove. (insn_regnos, out_insn_regnos, insn_regnos_live_after): New. (sparseset_contains_pseudos_p): Remove. (make_hard_regno_live, make_hard_regno_dead): Return true if something in liveness is changed. (mark_pseudo_live, mark_pseudo_dead): Ditto. (mark_regno_live, mark_regno_dead): Ditto. (clear_sparseset_regnos, regnos_in_sparseset_p): Use set instead of dead_set. (process_bb_lives): Rewrite dealing with reg notes. Update conflict hard regs even when clobber hard reg is not marked as dead. (lra_create_live_ranges_1): Add initialization/finalization of insn_regnos, out_insn_regnos, insn_regnos_live_after.
2024-12-06[PR tree-optimization/117895] Fix sparc libgo build failure with CRC opts ↵Jeff Law1-11/+14
enabled So as noted in the BZ, sparc builds of the golang libraries were failing due to the CRC code. Ultimately this was another mode problem in the table expansion. Essentially when the mode of the resultant crc was different than the mode of the input data we could create mixed mode operations which is a no-no. Not entirely sure how we were getting away with it before, but it was clearly wrong. The mode of the crc will always be at least as large at the mode of the data for the cases we support. So the code has been adjusted to convert the data's mode to the crc's mode and do all the ops in the crc mode. That fixes the libgo build problem on sparc and I've verfied that there aren't any regressions on x86_64 as well as all the embedded targets in my tester. PR tree-optimization/117895 gcc/ * expr.cc (calculate_table_based_CRC): Drop CRC_MODE argument. Convert DATA to CRC's mode, then do calculations in CRC's mode. (expand_crc_table_based): Corresponding changes. (expand_reversed_crc_table_based): Corresponding changes.
2024-12-06c++: use diagnostic nesting [PR116253]David Malcolm6-45/+257
This patch uses the nested diagnostics capabilities added in the earlier patch in the C++ frontend. With this, and enabling the non-standard text formatting via: -fdiagnostics-set-output=text:experimental-nesting=yes and using: -std=c++20 -fconcepts-diagnostics-depth=2 then the output for the example in SG15's P3358R0 ("SARIF for Structured Diagnostics") is: P3358R0.C: In function ‘int main()’: P3358R0.C:26:6: error: no matching function for call to ‘pet(lizard)’ 26 | pet(lizard{}); | ~~~^~~~~~~~~~ • note: candidate: ‘template<class auto:1> requires pettable<auto:1> void pet(auto:1)’ P3358R0.C:21:6: 21 | void pet(pettable auto t); | ^~~ • note: template argument deduction/substitution failed: • note: constraints not satisfied • P3358R0.C: In substitution of ‘template<class auto:1> requires pettable<auto:1> void pet(auto:1) [with auto:1 = lizard]’: • required from here P3358R0.C:26:6: 26 | pet(lizard{}); | ~~~^~~~~~~~~~ • required for the satisfaction of ‘pettable<auto:1>’ [with auto:1 = lizard] P3358R0.C:19:9: 19 | concept pettable = has_member_pet<T> or has_default_pet<T>; | ^~~~~~~~ • note: no operand of the disjunction is satisfied P3358R0.C:19:38: 19 | concept pettable = has_member_pet<T> or has_default_pet<T>; | ~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~ • note: the operand ‘has_member_pet<T>’ is unsatisfied because P3358R0.C:19:20: 19 | concept pettable = has_member_pet<T> or has_default_pet<T>; | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ • required for the satisfaction of ‘has_member_pet<T>’ [with T = lizard] P3358R0.C:13:9: 13 | concept has_member_pet = requires(T t) { t.pet(); }; | ^~~~~~~~~~~~~~ • required for the satisfaction of ‘pettable<auto:1>’ [with auto:1 = lizard] P3358R0.C:19:9: 19 | concept pettable = has_member_pet<T> or has_default_pet<T>; | ^~~~~~~~ • in requirements with ‘T t’ [with T = lizard] P3358R0.C:13:26: 13 | concept has_member_pet = requires(T t) { t.pet(); }; | ^~~~~~~~~~~~~~~~~~~~~~~~~~ • note: the required expression ‘t.pet()’ is invalid, because P3358R0.C:13:47: 13 | concept has_member_pet = requires(T t) { t.pet(); }; | ~~~~~^~ • error: ‘struct lizard’ has no member named ‘pet’ P3358R0.C:13:44: 13 | concept has_member_pet = requires(T t) { t.pet(); }; | ~~^~~ • note: the operand ‘has_default_pet<T>’ is unsatisfied because P3358R0.C:19:41: 19 | concept pettable = has_member_pet<T> or has_default_pet<T>; | ~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~ • required for the satisfaction of ‘has_default_pet<T>’ [with T = lizard] P3358R0.C:16:9: 16 | concept has_default_pet = T::is_pettable; | ^~~~~~~~~~~~~~~ • required for the satisfaction of ‘pettable<auto:1>’ [with auto:1 = lizard] P3358R0.C:19:9: 19 | concept pettable = has_member_pet<T> or has_default_pet<T>; | ^~~~~~~~ • error: ‘is_pettable’ is not a member of ‘lizard’ P3358R0.C:16:30: 16 | concept has_default_pet = T::is_pettable; | ^~~~~~~~~~~ • note: candidate: ‘void pet(dog)’ P3358R0.C:9:6: 9 | void pet(dog); | ^~~ • note: no known conversion for argument 1 from ‘lizard’ to ‘dog’ P3358R0.C:9:10: 9 | void pet(dog); | ^~~ • note: candidate: ‘void pet(cat)’ P3358R0.C:10:6: 10 | void pet(cat); | ^~~ • note: no known conversion for argument 1 from ‘lizard’ to ‘cat’ P3358R0.C:10:10: 10 | void pet(cat); | ^~~ showing the hierarchical structure of the messages; ideally there would be a UI here allowing the user to expand/collapse the messages to drill out into the detail they are interested in. The structure is also captured in SARIF output (via the "nestingLevel" property). gcc/cp/ChangeLog: PR other/116253 * call.cc (print_conversion_rejection): Remove leading space from diagnostic messages. (print_conversion_rejection): Likewise. (print_arity_information): Likewise. (print_z_candidate): Likewise. Add auto_diagnostic_nesting_level before calls to fn_type_unification and diagnose_constraints. (print_z_candidates): Add auto_diagnostic_nesting_level before looping over candidates. (conversion_null_warnings): Remove leading space from diagnostic messages. (maybe_inform_about_fndecl_for_bogus_argument_init): Likewise. * constraint.cc (tsubst_valid_expression_requirement): Add auto_diagnostic_nesting_level when showing why the expression is invalid. (satisfy_disjunction): Likewise when showing operans, and again when replaying each branch of the disjunction. (diagnose_constraints): Likewise when replaying satisfaction. * error.cc (cp_diagnostic_text_starter): Set prefix. (print_instantiation_full_context): Only show the file if we're not showing nesting or the user has opted in to showing location information in nested diagnostics. (class auto_context_line): New. (print_instantiation_partial_context_line): Replace calls to print_location and to diagnostic_show_locus with an auto_context_line. (print_instantiation_partial_context): Replace calls to print_location with an auto_context_line. (maybe_print_constexpr_context): Likewise. (print_constrained_decl_info): Likewise. (print_concept_check_info): Likewise. (print_constraint_context_head): Likewise. (print_requires_expression_info): Likewise. gcc/testsuite/ChangeLog: PR other/116253 * g++.dg/concepts/nested-diagnostics-1-truncated.C: New test. * g++.dg/concepts/nested-diagnostics-1.C: New test. * g++.dg/concepts/nested-diagnostics-2.C: New test. Signed-off-by: David Malcolm <dmalcolm@redhat.com>
2024-12-06i386: Add missing part from my previous commit.Uros Bizjak1-0/+3
gcc/ChangeLog: * config/i386/i386.cc (ix86_decompose_address): Add missing part from my previous commit.
2024-12-06i386: Fix gcc.target/i386/pr101716.c (and some related cleanups)Uros Bizjak2-32/+21
Fix pr101716.c testcase scan-assembler failure. The combine pass will not combine instructions that use registers in TARGET_CLASS_LIKELY_SPILLED class, such as %eax return register in AREG class. Change the testcase to use pseudos only and explicitly scan for zero_extendsidi pattern name. While looking there, also clean ix86_decompose_address a bit: eliminate common code and use UINTVAL and HOST_WIDE_INT_UC macros in the condition for AND wrapped address. gcc/ChangeLog: * config/i386/i386.cc (ix86_decompose_address): Eliminate common code and use use UINTVAL and HOST_WIDE_INT_UC macros in the condition for AND wrapped address. gcc/testsuite/ChangeLog: * gcc.target/i386/pr101716.c (dg-options): Add -dp. (dg-final): Scan for zero_extendsidi. (sample1): Change the code to use pseudos only.
2024-12-06arm,testsuite: Add -mtune=cortex-m55 to dlstp-int8x16.cChristophe Lyon1-1/+1
Like dlstp-compile-asm-1.c, this test would fail if GCC is configured with non-default options, such as -mtune=cortex-a9. Force -mtune=cortex-m55 to avoid this unexpected issue. gcc/testsuite/ChangeLog: * gcc.target/arm/mve/dlstp-int8x16.c: Add -mtune=cortex-m55
2024-12-06i386: Fix unwanted fwprop to 3dNOW! insn [PR117926]Uros Bizjak2-36/+76
The compiler is able to forward propagate a partial vector V4SF instruction using XMM registers to a 3dNOW! V2SF instruction using MM registers. Prevent unwanted transformation by tagging 3dNOW! V2SF instructions using generic RTXes with "(unspec [(const_int 0)] UNSPEC_3DNOW)" tag. PR target/117926 gcc/ChangeLog: * config/i386/mmx.md (UNSPEC_3DNOW): New unspec. (mmx_addv2sf3): Tag insn with UNSPEC_3DNOW tag. (*mmx_addv2sf3): Ditto. (mmx_sub2vsf3): Ditto. (mmx_subrv2sf3): Ditto. (*mmx_subv2sf3): Ditto. (mmx_mulv2sf3): Ditto. (mmx_<smaxmin:code>v2sf3): Ditto. (*mmx_<smaxmin:code>v2sf3): Ditto. (mmx_ieee_<ieee_maxmin>v2sf3): Ditto. (mmx_eqv2sf3): Ditto. (*mmx_eqv2sf3): Ditto. (mmx_gtv2sf3): Ditto. (mmx_gev2sf3): Ditto. (mmx_fix_truncv2sfv2si2): Ditto. (mmx_floatv2siv2sf2): Ditto. gcc/testsuite/ChangeLog: * gcc.target/i386/pr117926.c: New test.
2024-12-06arm: testsuite: fix some legacy C testsRichard Earnshaw6-6/+6
These tests all lack ISO-C style function definitions. Some deliberatly so. Rather than try to adjust the code and risk changing the nature of the test, add -std=c17 to the test options. gcc/testsuite/ChangeLog: * gcc.target/arm/20031108-1.c: Add -std=c17. * gcc.target/arm/fp16-unprototyped-1.c: Likewise. * gcc.target/arm/fp16-unprototyped-2.c: Likewise. * gcc.target/arm/neon-thumb2-move.c: Likewise. * gcc.target/arm/pr67756.c: Likewise. * gcc.target/arm/pr81863.c: Likewise.
2024-12-06diagnostics: UX: add doc URLs for attributes (v2)David Malcolm61-40/+1140
This is v2 of the patch; v1 was here: https://gcc.gnu.org/pipermail/gcc-patches/2024-June/655541.html Changed in v2: * added a new TARGET_DOCUMENTATION_NAME hook for figuring out which documentation URL to use when there are multiple per-target docs, such as for __attribute__((interrupt)); implemented this for all targets that have target-specific attributes * moved attribute_urlifier and its support code to a new gcc-attribute-urlifier.cc since it needs to use targetm for the above; gcc-urlifier.o is used by the driver. * fixed extend.texi so that some attributes that failed to appear in attr-urls.def now do so (affected nvptx "kernel" and "shared" attrs) * regenerated attr-urls.def for the above fix, and bringing in attributes added since v1 of the patch In r14-5118-gc5db4d8ba5f3de I added a mechanism to automatically add documentation URLs to quoted strings in diagnostics. In r14-6920-g9e49746da303b8 I added a mechanism to generate URLs for mentions of command-line options in quoted strings in diagnostics. This patch does a similar thing for attributes. It adds a new Python 3 script to scrape the generated HTML looking for documentation of attributes, and uses this to (re)generate a new gcc/attr-urls.def file. Running "make regenerate-attr-urls" after rebuilding the HTML docs will regenerate gcc/attr-urls.def in the source directory. The patch uses this to optionally add doc URLs for attributes in any diagnostic emitted during the lifetime of a auto_urlify_attributes instance, and adds such instances everywhere that a diagnostic refers to a diagnostic within quotes (based on grepping the source tree for references to attributes in strings and in code). For example, given: $ ./xgcc -B. -S ../../src/gcc/testsuite/gcc.dg/attr-access-2.c ../../src/gcc/testsuite/gcc.dg/attr-access-2.c:14:16: warning: attribute ‘access(read_write, 2, 3)’ positional argument 2 conflicts with previous designation by argument 1 [-Wattributes] with this patch the quoted text `access(read_write, 2, 3)' automatically gains the URL for our docs for "access": https://gcc.gnu.org/onlinedocs/gcc/Common-Function-Attributes.html#index-access-function-attribute in a sufficiently modern terminal. Like r14-6920-g9e49746da303b8 this avoids the Makefile target depending on the generated HTML, since a missing URL is a minor problem, whereas requiring all users to build HTML docs seems more involved. Doing so also avoids Python 3 as a build requirement for everyone, but instead just for developers addding attributes. Like the options, we could add a CI test for this. The patch gathers both general and target-specific attributes. For example, the function attribute "interrupt" has 19 URLs within our docs: one common, and 18 target-specific ones. The patch adds a new target hook used when selecting the most appropriate one. Signed-off-by: David Malcolm <dmalcolm@redhat.com> gcc/ChangeLog: * Makefile.in (OBJS): Add -attribute-urlifier.o. (ATTR_URLS_HTML_DEPS): New. (regenerate-attr-urls): New. (regenerate-attr-urls-unit-test): New. * attr-urls.def: New file. * attribs.cc: Include "gcc-urlifier.h". (decl_attributes): Use auto_urlify_attributes. * config/aarch64/aarch64.cc (TARGET_DOCUMENTATION_NAME): New. * config/arc/arc.cc (TARGET_DOCUMENTATION_NAME): New. * config/arm/arm.cc (TARGET_DOCUMENTATION_NAME): New. * config/bfin/bfin.cc (TARGET_DOCUMENTATION_NAME): New. * config/bpf/bpf.cc (TARGET_DOCUMENTATION_NAME): New. * config/epiphany/epiphany.cc (TARGET_DOCUMENTATION_NAME): New. * config/gcn/gcn.cc (TARGET_DOCUMENTATION_NAME): New. * config/h8300/h8300.cc (TARGET_DOCUMENTATION_NAME): New. * config/i386/i386.cc (TARGET_DOCUMENTATION_NAME): New. * config/ia64/ia64.cc (TARGET_DOCUMENTATION_NAME): New. * config/m32c/m32c.cc (TARGET_DOCUMENTATION_NAME): New. * config/m32r/m32r.cc (TARGET_DOCUMENTATION_NAME): New. * config/m68k/m68k.cc (TARGET_DOCUMENTATION_NAME): New. * config/mcore/mcore.cc (TARGET_DOCUMENTATION_NAME): New. * config/microblaze/microblaze.cc (TARGET_DOCUMENTATION_NAME): New. * config/mips/mips.cc (TARGET_DOCUMENTATION_NAME): New. * config/msp430/msp430.cc (TARGET_DOCUMENTATION_NAME): New. * config/nds32/nds32.cc (TARGET_DOCUMENTATION_NAME): New. * config/nvptx/nvptx.cc (TARGET_DOCUMENTATION_NAME): New. * config/riscv/riscv.cc (TARGET_DOCUMENTATION_NAME): New. * config/rl78/rl78.cc (TARGET_DOCUMENTATION_NAME): New. * config/rs6000/rs6000.cc (TARGET_DOCUMENTATION_NAME): New. * config/rx/rx.cc (TARGET_DOCUMENTATION_NAME): New. * config/s390/s390.cc (TARGET_DOCUMENTATION_NAME): New. * config/sh/sh.cc (TARGET_DOCUMENTATION_NAME): New. * config/stormy16/stormy16.cc (TARGET_DOCUMENTATION_NAME): New. * config/v850/v850.cc (TARGET_DOCUMENTATION_NAME): New. * config/visium/visium.cc (TARGET_DOCUMENTATION_NAME): New. gcc/analyzer/ChangeLog: * region-model.cc: Include "gcc-urlifier.h". (reason_attr_access::emit): Use auto_urlify_attributes. * sm-taint.cc: Include "gcc-urlifier.h". (tainted_access_attrib_size::emit): Use auto_urlify_attributes. gcc/c-family/ChangeLog: * c-attribs.cc: Include "gcc-urlifier.h". (positional_argument): Use auto_urlify_attributes. * c-common.cc: Include "gcc-urlifier.h". (parse_optimize_options): Use auto_urlify_attributes with OPT_Wattributes. (attribute_fallthrough_p): Use auto_urlify_attributes. * c-warn.cc: Include "gcc-urlifier.h". (diagnose_mismatched_attributes): Use auto_urlify_attributes. gcc/c/ChangeLog: * c-decl.cc: Include "gcc-urlifier.h". (start_decl): Use auto_urlify_attributes with OPT_Wattributes. (start_function): Likewise. * c-parser.cc: Include "gcc-urlifier.h". (c_parser_statement_after_labels): Use auto_urlify_attributes with OPT_Wattributes. * c-typeck.cc: Include "gcc-urlifier.h". (maybe_warn_nodiscard): Use auto_urlify_attributes with OPT_Wunused_result. gcc/cp/ChangeLog: * cp-gimplify.cc: Include "gcc-urlifier.h". (process_stmt_hotness_attribute): Use auto_urlify_attributes with OPT_Wattributes. * cvt.cc: Include "gcc-urlifier.h". (maybe_warn_nodiscard): Use auto_urlify_attributes with OPT_Wunused_result. * decl.cc: Include "gcc-urlifier.h". (start_decl): Use auto_urlify_attributes. (start_preparsed_function): Likewise. gcc/ChangeLog: * diagnostic.cc (diagnostic_context::override_urlifier): New. * diagnostic.h (diagnostic_context::override_urlifier): New decl. * doc/extend.texi (Nvidia PTX Function Attributes): Update @cindex to specify that "kernel" is a function attribute and "shared" is a variable attribute, so that these entries are recognized by the regex in regenerate-attr-urls.py. * doc/tm.texi: Regenerate. * doc/tm.texi.in (TARGET_DOCUMENTATION_NAME): New. * gcc-attribute-urlifier.cc: New file. * gcc-urlifier.cc: Include diagnostic.h. (gcc_urlifier::make_doc): Convert to... (make_doc_url): ...this. (auto_override_urlifier::auto_override_urlifier): New. (auto_override_urlifier::~auto_override_urlifier): New. (selftest::gcc_urlifier_cc_tests): Split out body into... (selftest::test_gcc_urlifier): ...this. * gcc-urlifier.h: Include "pretty-print-urlifier.h" and "label-text.h". (make_doc_url): New decl. (class auto_override_urlifier): New. (class attribute_urlifier): New. (class auto_urlify_attributes): New. * gimple-ssa-warn-access.cc: Include "gcc-urlifier.h". (pass_waccess::execute): Use auto_urlify_attributes. * gimplify.cc: Include "gcc-urlifier.h". (expand_FALLTHROUGH): Use auto_urlify_attributes. * internal-fn.cc: Define INCLUDE_MEMORY and include "gcc-urlifier.h. (expand_FALLTHROUGH): Use auto_urlify_attributes. * ipa-pure-const.cc: Include "gcc-urlifier.h. (suggest_attribute): Use auto_urlify_attributes. * ipa-strub.cc: Include "gcc-urlifier.h. (can_strub_p): Use auto_urlify_attributes. * regenerate-attr-urls.py: New file. * selftest-run-tests.cc (selftest::run_tests): Call gcc_attribute_urlifier_cc_tests. * selftest.h (selftest::gcc_attribute_urlifier_cc_tests): New decl. * target.def (documentation_name): New DEFHOOKPOD. * tree-cfg.cc: Include "gcc-urlifier.h. (do_warn_unused_result): Use auto_urlify_attributes. * tree-ssa-uninit.cc: Include "gcc-urlifier.h. (maybe_warn_read_write_only): Use auto_urlify_attributes. (maybe_warn_pass_by_reference): Likewise. Signed-off-by: David Malcolm <dmalcolm@redhat.com>
2024-12-06c++: handle misspelled concepts and missing #include <concepts>David Malcolm6-1046/+1231
gcc/cp/ChangeLog: * name-lookup.cc (suggest_alternative_in_explicit_scope): Gracefully handle non-namespaces, such as scoped enums. * parser.cc (cp_parser_name_lookup_error): Provide a name_hint for the case where we're in an explicit scope. * std-name-hint.gperf: Add <concepts>. * std-name-hint.h: Regenerate. gcc/testsuite/ChangeLog: * g++.dg/concepts/missing-header.C: New test. * g++.dg/concepts/misspelled-concept.C: New test. Signed-off-by: David Malcolm <dmalcolm@redhat.com>
2024-12-06c++: consolidate location printing in error.cc [PR116253]David Malcolm1-47/+24
Consolidate the location-printing logic in cp/error.cc, as preliminary work towards supporting nested diagnostics (PR other/116253). gcc/cp/ChangeLog: PR other/116253 * error.cc (print_location): Move to earlier in the file. (print_instantiation_partial_context_line): Replace location-printing logic with a call to print_location. (print_instantiation_partial_context): Likewise, splitting up pp_verbatim calls. (maybe_print_constexpr_context): Likewise. Signed-off-by: David Malcolm <dmalcolm@redhat.com>
2024-12-06avr.opt.urls: Rebuild.Georg-Johann Lay1-0/+3
gcc/ * config/avr/avr.opt.urls: Rebuild.
2024-12-06AVR: Disable generation of CRC lookup tables.Georg-Johann Lay1-0/+2
With -foptimize-crc, large lookup tables may be generated which are places in .rodata (RAM). This patch disables such tables. gcc/ * common/config/avr/avr-common.cc (avr_option_optimization_table): Default to -fno-optimize-crc.
2024-12-06avoid-store-forwarding: bail when an instruction may throw [PR117816]kelefth2-1/+12
Avoid-store-forwarding doesn't handle the case where an instruction in the store-load sequence contains a REG_EH_REGION note, leading to the insertion of instructions after it, while it should be the last instruction in the basic block. This causes an ICE when compiling using `-O -fnon-call-exceptions -favoid-store-forwarding -fno-forward-propagate -finstrument-functions`. This patch rejects the transformation when there are instructions in the sequence that may throw an exeption. PR rtl-optimization/117816 gcc/ChangeLog: * avoid-store-forwarding.cc (store_forwarding_analyzer::avoid_store_forwarding): Reject the transformation when having instructions that may throw exceptions in the sequence. gcc/testsuite/ChangeLog: * gcc.dg/pr117816.c: New test.
2024-12-06nvptx: Support '-march=sm_89'Thomas Schwinge12-27/+100
gcc/ * config/nvptx/nvptx-sm.def: Add '89'. * config/nvptx/nvptx-gen.h: Regenerate. * config/nvptx/nvptx-gen.opt: Likewise. * config/nvptx/nvptx.cc (first_ptx_version_supporting_sm): Adjust. * config/nvptx/nvptx.opt (-march-map=sm_89, -march-map=sm_90) (march-map=sm_90a): Likewise. * config.gcc: Likewise. * doc/invoke.texi (Nvidia PTX Options): Document '-march=sm_89'. * config/nvptx/gen-multilib-matches-tests: Extend. gcc/testsuite/ * gcc.target/nvptx/march-map=sm_89.c: Adjust. * gcc.target/nvptx/march-map=sm_90.c: Likewise. * gcc.target/nvptx/march-map=sm_90a.c: Likewise. * gcc.target/nvptx/march=sm_89.c: New. libgomp/ * testsuite/libgomp.c/declare-variant-3-sm89.c: New. * testsuite/libgomp.c/declare-variant-3.h: Adjust.
2024-12-06nvptx: Support '-mptx=7.8'Thomas Schwinge6-2/+30
gcc/ * config/nvptx/nvptx-opts.h (enum ptx_version): Add 'PTX_VERSION_7_8'. * config/nvptx/nvptx.cc (ptx_version_to_string) (ptx_version_to_number): Adjust. * config/nvptx/nvptx.h (TARGET_PTX_7_8): New. * config/nvptx/nvptx.opt (Enum(ptx_version)): Add 'EnumValue' '7.8' for 'PTX_VERSION_7_8'. * doc/invoke.texi (Nvidia PTX Options): Document '-mptx=7.8'. gcc/testsuite/ * gcc.target/nvptx/mptx=7.8.c: New.
2024-12-06nvptx: Support '-march=sm_52'Thomas Schwinge10-11/+65
gcc/ * config/nvptx/nvptx-sm.def: Add '52'. * config/nvptx/nvptx-gen.h: Regenerate. * config/nvptx/nvptx-gen.opt: Likewise. * config/nvptx/nvptx.cc (first_ptx_version_supporting_sm): Adjust. * config/nvptx/nvptx.opt (-march-map=sm_52): Likewise. * config.gcc: Likewise. * doc/invoke.texi (Nvidia PTX Options): Document '-march=sm_52'. * config/nvptx/gen-multilib-matches-tests: Extend. gcc/testsuite/ * gcc.target/nvptx/march-map=sm_52.c: Adjust. * gcc.target/nvptx/march=sm_52.c: New. libgomp/ * testsuite/libgomp.c/declare-variant-3-sm52.c: New. * testsuite/libgomp.c/declare-variant-3.h: Adjust.
2024-12-06nvptx: Support '-march=sm_37'Thomas Schwinge12-17/+81
gcc/ * config/nvptx/nvptx-sm.def: Add '37'. * config/nvptx/nvptx-gen.h: Regenerate. * config/nvptx/nvptx-gen.opt: Likewise. * config/nvptx/nvptx.cc (first_ptx_version_supporting_sm): Adjust. * config/nvptx/nvptx.opt (-march-map=sm_37, -march-map=sm_50): Likewise. * config.gcc: Likewise. * doc/invoke.texi (Nvidia PTX Options): Document '-march=sm_37'. * config/nvptx/gen-multilib-matches-tests: Extend. gcc/testsuite/ * gcc.target/nvptx/march-map=sm_37.c: Adjust. * gcc.target/nvptx/march-map=sm_50.c: Likewise. * gcc.target/nvptx/march-map=sm_52.c: Likewise. * gcc.target/nvptx/march=sm_37.c: New. libgomp/ * testsuite/libgomp.c/declare-variant-3-sm37.c: New. * testsuite/libgomp.c/declare-variant-3.h: Adjust.
2024-12-06nvptx: Support '-mptx=4.1'Thomas Schwinge6-1/+29
gcc/ * config/nvptx/nvptx-opts.h (enum ptx_version): Add 'PTX_VERSION_4_1'. * config/nvptx/nvptx.cc (ptx_version_to_string) (ptx_version_to_number): Adjust. * config/nvptx/nvptx.h (TARGET_PTX_4_1): New. * config/nvptx/nvptx.opt (Enum(ptx_version)): Add 'EnumValue' '4.1' for 'PTX_VERSION_4_1'. * doc/invoke.texi (Nvidia PTX Options): Document '-mptx=4.1'. gcc/testsuite/ * gcc.target/nvptx/mptx=4.1.c: New.
2024-12-06nvptx: Expose '-mptx=4.2'Thomas Schwinge4-3/+30
'PTX_VERSION_4_2' was added in commit decde11183bdccc46587d6614b75f3d56a2f2e4a "[nvptx] Choose -mptx default based on -misa" for use for '-march=sm_52' ('first_ptx_version_supporting_sm', 'PTX_ISA_SM53'), as documented by Nvidia. However, '-mptx=4.2' wasn't exposed to the user, but there's no reason not to. gcc/ * config/nvptx/nvptx.h (TARGET_PTX_4_2): New. * config/nvptx/nvptx.opt (Enum(ptx_version)): Add 'EnumValue' '4.2' for 'PTX_VERSION_4_2'. * doc/invoke.texi (Nvidia PTX Options): Document '-mptx=4.2'. gcc/testsuite/ * gcc.target/nvptx/mptx=4.2.c: New.
2024-12-06nvptx: Clarify that our baseline is PTX ISA Version 3.1Thomas Schwinge3-9/+6
Added in commit decde11183bdccc46587d6614b75f3d56a2f2e4a "[nvptx] Choose -mptx default based on -misa", 'PTX_VERSION_3_0' was added for 'first_ptx_version_supporting_sm' to return it for 'PTX_ISA_SM30' (as documented by Nvidia). It's however then immediately overridden to 3.1, which in GCC/nvptx "has been the smallest version historically", and also '-mptx=3.0' isn't exposed to the user. As we also elsewhere (machine description etc.) assume that our baseline is PTX ISA Version 3.1, there's no real value added in maintaining 'PTX_VERSION_3_0' for purposes of 'first_ptx_version_supporting_sm' only. No change in behavior intended. gcc/ * config/nvptx/nvptx-opts.h (enum ptx_version): Remove 'PTX_VERSION_3_0'. * config/nvptx/nvptx.cc (first_ptx_version_supporting_sm) (default_ptx_version_option, ptx_version_to_string) (ptx_version_to_number): Adjust. * config/nvptx/nvptx.h: Comment.
2024-12-06nvptx: Support '--with-multilib-list'Thomas Schwinge7-35/+242
No change in behavior unless specifying it. gcc/ * config.gcc: nvptx: Support '--with-multilib-list'. * config/nvptx/gen-multilib-matches.sh: Adjust. * configure.ac: Likewise. * configure: Regenerate. * doc/install.texi: Update. * doc/invoke.texi: Align. * config/nvptx/gen-multilib-matches-tests: Extend.
2024-12-06arm,testsuite: Add -mtune=cortex-m55 to dlstp-compile-asm-1.c test.Christophe Lyon1-1/+1
This test would fail if GCC is configured with non-default options, such as -mtune=cortex-a9. This 'unexpected' scheduling makes the DLSTP optimization generate subs lr, #16 bhi .L4 lctp pop {r4, r5, pc} .L4: sub ip, ip, #16 b <loop-begin> instead of the expected sub ip, ip, #16 letp lr, <loop-begin> Although GCC still optimizes all 144 loops, only 96 use letp, 48 others use lctp. The patch simply forces -mtune=cortex-m55 to avoid this unexpected issue. gcc/testsuite/ChangeLog: * gcc.target/arm/mve/dlstp-compile-asm-1.c: Add -mtune=cortex-m55
2024-12-06nvptx: Enhance '-march-map=[...]' test casesThomas Schwinge21-12/+361
This expands upon the one test case added in commit de0ef04419e90eacf0d1ddb265552a1b08c18d4b "[nvptx] Add march-map". gcc/testsuite/ * gcc.target/nvptx/march-map.c: Remove; expanded into... * gcc.target/nvptx/march-map=sm_50.c: ... this. * gcc.target/nvptx/march-map=sm_30.c: New. * gcc.target/nvptx/march-map=sm_32.c: Likewise. * gcc.target/nvptx/march-map=sm_35.c: Likewise. * gcc.target/nvptx/march-map=sm_37.c: Likewise. * gcc.target/nvptx/march-map=sm_52.c: Likewise. * gcc.target/nvptx/march-map=sm_53.c: Likewise. * gcc.target/nvptx/march-map=sm_60.c: Likewise. * gcc.target/nvptx/march-map=sm_61.c: Likewise. * gcc.target/nvptx/march-map=sm_62.c: Likewise. * gcc.target/nvptx/march-map=sm_70.c: Likewise. * gcc.target/nvptx/march-map=sm_72.c: Likewise. * gcc.target/nvptx/march-map=sm_75.c: Likewise. * gcc.target/nvptx/march-map=sm_80.c: Likewise. * gcc.target/nvptx/march-map=sm_86.c: Likewise. * gcc.target/nvptx/march-map=sm_87.c: Likewise. * gcc.target/nvptx/march-map=sm_89.c: Likewise. * gcc.target/nvptx/march-map=sm_90.c: Likewise. * gcc.target/nvptx/march-map=sm_90a.c: Likewise. * gcc.target/nvptx/main.c: Remove.
2024-12-06nvptx: Enhance '-march=[...]' test casesThomas Schwinge13-41/+114
This expands upon the test cases added in commit 4706670cd3b06bb024da0683776bf86c79d55940 "[nvptx, testsuite] Add gcc.target/nvptx/sm*.c". gcc/testsuite/ * gcc.target/nvptx/sm30.c: Remove; expanded into... * gcc.target/nvptx/march=sm_30.c: ... this. * gcc.target/nvptx/sm35.c: Remove; expanded into... * gcc.target/nvptx/march=sm_35.c: ... this. * gcc.target/nvptx/sm53.c: Remove; expanded into... * gcc.target/nvptx/march=sm_53.c: ... this. * gcc.target/nvptx/sm70.c: Remove; expanded into... * gcc.target/nvptx/march=sm_70.c: ... this. * gcc.target/nvptx/sm75.c: Remove; expanded into... * gcc.target/nvptx/march=sm_75.c: ... this. * gcc.target/nvptx/sm80.c: Remove; expanded into... * gcc.target/nvptx/march=sm_80.c: ... this. * gcc.target/nvptx/march.c: Remove.
2024-12-06nvptx: Enhance '-mptx=[...]' test casesThomas Schwinge9-40/+95
This expands upon the test cases added in commit a2eacdbd4c4a698b3b6f27ef5e1f8dd3d836b2e5 "[nvptx] Add __PTX_ISA_VERSION_{MAJOR,MINOR}__". gcc/testsuite/ * gcc.target/nvptx/ptx31.c: Remove; expanded into... * gcc.target/nvptx/mptx=3.1.c: ... this. * gcc.target/nvptx/ptx60.c: Remove; expanded into... * gcc.target/nvptx/mptx=6.0.c: ... this. * gcc.target/nvptx/ptx63.c: Remove; expanded into... * gcc.target/nvptx/mptx=6.3.c: ... this. * gcc.target/nvptx/ptx70.c: Remove; expanded into... * gcc.target/nvptx/mptx=7.0.c: ... this. * gcc.target/nvptx/mptx=_.c: New.
2024-12-06Use new RAW_DATA_{U,S}CHAR_ELT macros in the middle-end and C FEJakub Jelinek6-42/+22
During the patch review of the C++ #embed optimization, Jason asked for a macro for the common ((const unsigned char *) RAW_DATA_POINTER (value))[i] and ditto with signed char patterns which appear in a lot of places. In the just committed patch I've added +#define RAW_DATA_UCHAR_ELT(NODE, I) \ + (((const unsigned char *) RAW_DATA_POINTER (NODE))[I]) +#define RAW_DATA_SCHAR_ELT(NODE, I) \ + (((const signed char *) RAW_DATA_POINTER (NODE))[I]) macros for that in tree.h. The following patch is just a cleanup to use those macros where appropriate. 2024-12-06 Jakub Jelinek <jakub@redhat.com> gcc/ * gimplify.cc (gimplify_init_ctor_eval): Use RAW_DATA_UCHAR_ELT macro. * gimple-fold.cc (fold_array_ctor_reference): Likewise. * tree-pretty-print.cc (dump_generic_node): Use RAW_DATA_UCHAR_ELT and RAW_DATA_SCHAR_ELT macros. * fold-const.cc (fold): Use RAW_DATA_UCHAR_ELT macro. gcc/c/ * c-parser.cc (c_parser_get_builtin_args, c_parser_expression, c_parser_expr_list): Use RAW_DATA_UCHAR_ELT macro. * c-typeck.cc (digest_init): Use RAW_DATA_UCHAR_ELT and RAW_DATA_SCHAR_ELT macros. (add_pending_init, maybe_split_raw_data): Use RAW_DATA_UCHAR_ELT macro.
2024-12-06More duplicates reported by genmatchRichard Biener1-8/+8
Here are a bit less obvious cases of duplicate, mostly of the form (op (op:c @0 @1) (op:c @0 @1)) where it's enough to have one :c to get all relevant cases. * match.pd: Remove redundant :c, reported by genmatch as duplicate patterns.
2024-12-06Remove some duplicates reported by genmatchRichard Biener1-5/+5
genmatch currently has a difficulty to decide whether a duplicate structural match is really duplicate as uses of captures within predicates or in C code can be order dependent. For example a reported duplicate results in { tree captures[4] ATTRIBUTE_UNUSED = { _p1, _p0, _q20, _q21 } if (gimple_simplify_112 (res_op, seq, valueize, type, captures)) return true; } { tree captures[4] ATTRIBUTE_UNUSED = { _p1, _p0, _q21, _q20 }; if (gimple_simplify_112 (res_op, seq, valueize, type, captures)) return true; } where the difference is only in _q20 and _q21 being swapped but that resulting in a call to bitwise_inverted_equal_p (_p1, X) with X once _q20 and once _q21. That is, we treat bare captures as equal for reporting duplicates. Due to bitwise_inverted_equal_p there are meanwhile a _lot_ of duplicates reported that are not actual duplicates. The following removes some that are though, as the operands are only passed to types_match. * match.pd (.SAT_ADD patterns using IFN_ADD_OVERFLOW): Remove :c that only causes duplicate patterns.
2024-12-06RISC-V: Add --with-cmodel configure optionHau Hsu4-6/+29
Sometimes we want to use default cmodel other than medlow. Add a GCC configure option for that. gcc/ChangeLog: * config.gcc (riscv*-*-*): Add support for --with-cmodel configure option. (all_defaults): Add cmodel. * config/riscv/riscv.h (TARGET_DEFAULT_CMODEL): Remove. * doc/install.texi: Document --with-cmodel configure option. * doc/invoke.texi (-mcmodel): Mention --with-cmodel configure option. Co-authored-by: Kito Cheng <kito.cheng@sifive.com>
2024-12-06'gcc/config/nvptx/gen-multilib-matches.sh': Support '--selftest'Thomas Schwinge3-2/+159
..., and invoke that before actual use. gcc/ * config/nvptx/gen-multilib-matches.sh: Support '--selftest'. * config/nvptx/t-nvptx (t-nvptx-gen-multilib-matches:): Invoke it. * config/nvptx/gen-multilib-matches-tests: New.
2024-12-06'gcc/config/nvptx/gen-*.sh': Simplify interfaceThomas Schwinge6-11/+26
What we currently pass in as '$1' is simply 'dirname "$0"'. gcc/ * config/nvptx/gen-h.sh: Don't pass in '$1'; compute it locally. * config/nvptx/gen-multilib-matches.sh: Likewise. * config/nvptx/gen-omp-device-properties.sh: Likewise. * config/nvptx/gen-opt.sh: Likewise. * config/nvptx/t-nvptx (s-nvptx-gen-h:, s-nvptx-gen-opt:) (t-nvptx-gen-multilib-matches:): Adjust. * config/nvptx/t-omp-device (omp-device-properties-nvptx): Likewise.