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| author | Christophe Lyon <christophe.lyon@linaro.org> | 2024-12-06 09:49:58 +0000 |
|---|---|---|
| committer | Christophe Lyon <christophe.lyon@linaro.org> | 2024-12-06 10:42:12 +0000 |
| commit | 2b707b41b178dc2f42aee1d28b2ee62583241cca (patch) | |
| tree | 5e712401530f9a828d6ad938c8c379f216436556 /gcc | |
| parent | ee6711ead30876daf2a8a66f8647cad95470fe79 (diff) | |
| download | gcc-2b707b41b178dc2f42aee1d28b2ee62583241cca.zip gcc-2b707b41b178dc2f42aee1d28b2ee62583241cca.tar.gz gcc-2b707b41b178dc2f42aee1d28b2ee62583241cca.tar.bz2 | |
arm,testsuite: Add -mtune=cortex-m55 to dlstp-compile-asm-1.c test.
This test would fail if GCC is configured with non-default options,
such as -mtune=cortex-a9.
This 'unexpected' scheduling makes the DLSTP optimization generate
subs lr, #16
bhi .L4
lctp
pop {r4, r5, pc}
.L4:
sub ip, ip, #16
b <loop-begin>
instead of the expected
sub ip, ip, #16
letp lr, <loop-begin>
Although GCC still optimizes all 144 loops, only 96 use letp, 48
others use lctp.
The patch simply forces -mtune=cortex-m55 to avoid this unexpected
issue.
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/dlstp-compile-asm-1.c: Add -mtune=cortex-m55
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/testsuite/gcc.target/arm/mve/dlstp-compile-asm-1.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/gcc/testsuite/gcc.target/arm/mve/dlstp-compile-asm-1.c b/gcc/testsuite/gcc.target/arm/mve/dlstp-compile-asm-1.c index 6e6da3d..7b7f1da 100644 --- a/gcc/testsuite/gcc.target/arm/mve/dlstp-compile-asm-1.c +++ b/gcc/testsuite/gcc.target/arm/mve/dlstp-compile-asm-1.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ -/* { dg-options "-O3 -save-temps" } */ +/* { dg-options "-O3 -save-temps -mtune=cortex-m55" } */ /* { dg-add-options arm_v8_1m_mve } */ #include <arm_mve.h> |