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2020-04-03AArch64: Fix options canonicalization for assemblerTamar Christina16-0/+176
2020-04-02aarch64: Fix ICE due to aarch64_gen_compare_reg_maybe_ze [PR94435]Jakub Jelinek1-0/+25
2020-04-02[ARM]: Fix for MVE ACLE intrinsics with writeback (PR94317).Srinath Parvathaneni10-10/+40
2020-03-31vect: ICE: in vectorizable_load, at tree-vect-stmts.c:9173 [PR94398]Felix Yang1-0/+24
2020-03-31[ARM][PATCH]: Add MVE ACLE intrinsics vbicq_n_* polymorphic variant support.Srinath Parvathaneni4-4/+28
2020-03-31[ARM][PATCH]: Add support for MVE ACLE intrinsics polymorphic variants for +m...Srinath Parvathaneni22-22/+22
2020-03-30RS6000 Allow builtin initialization regardless of maskWill Schmidt7-2/+215
2020-03-30Update bswap64-4 test for desired resultsWill Schmidt1-2/+4
2020-03-30i386: Fix up *one_cmplv*2* insn with avx512f [PR94343]Jakub Jelinek2-0/+24
2020-03-30XFAIL pr57193.c test-case.Martin Liska1-1/+2
2020-03-30Fix vextract* masked patterns [PR93069]Jakub Jelinek1-0/+12
2020-03-26Fix UNRESOLVED test-case.Martin Liska1-4/+1
2020-03-26Skip test for non-x86 targets.Martin Liska1-0/+1
2020-03-25i386: Fix ix86_add_reg_usage_to_vzeroupper [PR94308]Jakub Jelinek1-0/+31
2020-03-25Make target_clones resolver fn static if possible.Martin Liska2-2/+16
2020-03-25sccvn: Fix buffer overflow in push_partial_def [PR94300]Jakub Jelinek1-0/+21
2020-03-24[testsuite,arm] use arm_fp_dp_ok effective-targetChristophe Lyon8-16/+16
2020-03-24[testsuite,arm] cmp-2.c: Move double-precision tests to cmp-3.cChristophe Lyon2-3/+50
2020-03-24if-conv: Fix -fcompare-debug bugs in ifcvt_local_dce [PR94283]Jakub Jelinek1-0/+5
2020-03-23[ARM][GCC][14x]: MVE ACLE whole vector left shift with carry intrinsics.Srinath Parvathaneni6-0/+138
2020-03-23[ARM][GCC][13x]: MVE ACLE scalar shift intrinsics.Srinath Parvathaneni16-0/+208
2020-03-23[ARM][GCC][12x]: MVE ACLE intrinsics to set and get vector lane.Srinath Parvathaneni20-0/+370
2020-03-23testsuite, arm: Change tests to assembleAndre Vieira2364-2380/+19
2020-03-20[ARM][GCC][11x]: MVE ACLE vector interleaving store and deinterleaving load i...Srinath Parvathaneni40-0/+920
2020-03-20c-family: Tighten vector handling in type_for_mode [PR94072]Richard Sandiford1-0/+9
2020-03-20[ARM][GCC][10x]: MVE ACLE intrinsics "add with carry across beats" and "beat-...Srinath Parvathaneni16-0/+367
2020-03-20[ARM][GCC][9x]: MVE ACLE predicated intrinsics with (dont-care) variant.Srinath Parvathaneni379-4/+8157
2020-03-20[ARM][GCC][2/8x]: MVE ACLE gather load and scatter store intrinsics with writ...Srinath Parvathaneni20-0/+356
2020-03-20[ARM][GCC][1/8x]: MVE ACLE vidup, vddup, viwdup and vdwdup intrinsics with wr...Srinath Parvathaneni48-0/+1104
2020-03-20[ARM][GCC][7x]: MVE vreinterpretq and vuninitializedq intrinsics.Srinath Parvathaneni14-0/+544
2020-03-20[ARM][GCC][6x]:MVE ACLE vaddq intrinsics using arithmetic plus operator.Srinath Parvathaneni8-0/+176
2020-03-20gcc, Arm: Fix testisms for MVE testsuiteAndre Simoes Dias Vieira17-20/+36
2020-03-20gcc, Arm: Fix MVE move from GPR -> GPRAndre Simoes Dias Vieira1-0/+18
2020-03-18[ARM][GCC][8/5x]: Remaining MVE store intrinsics which stores an half word, w...Srinath Parvathaneni30-0/+660
2020-03-18[ARM][GCC][7/5x]: MVE store intrinsics which stores byte,half word or word to...Srinath Parvathaneni70-60/+970
2020-03-18[ARM][GCC][6/5x]: Remaining MVE load intrinsics which loads half word and wor...Srinath Parvathaneni30-0/+582
2020-03-18[ARM][GCC][5/5x]: MVE ACLE load intrinsics which load a byte, halfword, or wo...Srinath Parvathaneni40-0/+752
2020-03-18[ARM][GCC][4/5x]: MVE load intrinsics with zero(_z) suffix.Srinath Parvathaneni14-0/+244
2020-03-18[ARM][GCC][3/5x]: MVE store intrinsics with predicated suffix.Srinath Parvathaneni14-0/+308
2020-03-18[ARM][GCC][2/5x]: MVE load intrinsics.Srinath Parvathaneni14-0/+244
2020-03-18[ARM][GCC][1/5x]: MVE store intrinsics.Srinath Parvathaneni14-0/+308
2020-03-18[ARM][GCC][4/4x]: MVE intrinsics with quaternary operands.Srinath Parvathaneni62-0/+1488
2020-03-18[ARM][GCC][3/4x]: MVE intrinsics with quaternary operands.Srinath Parvathaneni77-0/+1813
2020-03-18[ARM][GCC][2/4x]: MVE intrinsics with quaternary operands.Srinath Parvathaneni300-0/+7185
2020-03-18[ARM][GCC][1/4x]: MVE intrinsics with quaternary operands.Srinath Parvathaneni31-0/+711
2020-03-18[ARM][GCC][3/3x]: MVE intrinsics with ternary operands.Srinath Parvathaneni199-0/+4487
2020-03-18[ARM][GCC][2/3x]: MVE intrinsics with ternary operands.Srinath Parvathaneni259-2/+5785
2020-03-18aarch64: Fix SYMBOL_TINY_GOT handling for ILP32 [PR94201]Duan bo1-0/+13
2020-03-18aarch64: Treat p12-p15 as call-preserved in SVE PCS functionsRichard Sandiford24-1173/+1422
2020-03-17testsuite: Fix gcc.target/aarch64/advsimd-intrinsics/bfcvt-nosimd.cRichard Sandiford1-2/+3
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