aboutsummaryrefslogtreecommitdiff
path: root/gcc/testsuite/gcc.target
AgeCommit message (Expand)AuthorFilesLines
2015-11-26[AArch64] Add NEON intrinsics vqrdmlah_lane and vqrdmlsh_lane.Matthew Wahab3-0/+272
2015-11-26[AArch64] Add NEON intrinsics vqrdmlah and vqrdmlsh.Matthew Wahab3-0/+256
2015-11-26nvptx.c (write_func_decl_from_insn): Replace callee arg with name.Nathan Sidwell1-3/+3
2015-11-26re PR target/68416 ([MPX] GCC emits a lot of redundant bndmov instructions)Ilya Enkovich1-0/+9
2015-11-25<patch #10>Michael Meissner2-0/+416
2015-11-252015-11-24 Michael Collison <michael.collison@linaro.org>Michael Collison5-0/+81
2015-11-24Fix typos from last checkin.Steve Ellcey1-2/+2
2015-11-24frame-header-4.c: New test.Steve Ellcey1-0/+20
2015-11-24[AArch64][v2] Improve comparison with complex immediates followed by branch/csetKyrylo Tkachov2-0/+49
2015-11-24Fix PR68497 (ICE with -fno-checking)Mikhail Maltsev1-0/+8
2015-11-24[AARCH64][PATCH 3/3] Adding tests to check proper error reporting of out of...Bilyan Borisov12-0/+192
2015-11-24re PR target/68483 (gcc 5.2: suboptimal code compared to 4.9)Jakub Jelinek2-0/+37
2015-11-24re PR c/68337 ([MPX] memcpy() for arrays with function pointers results in hu...Ilya Enkovich2-0/+41
2015-11-23[AArch64] PR target/68363 Check that argument is real INSN in aarch64_madd_ne...Kyrylo Tkachov1-0/+19
2015-11-23[AARCH64] Adding constant folding for __builtin_fmulx* with scalar 32 and 64 ...Bilyan Borisov4-0/+194
2015-11-23S/390: Fix symbol ref alignmentRobin Dapp1-0/+46
2015-11-22[AARCH64][PATCH 2/3] Implementing vmulx_lane NEON intrinsic variantsBilyan Borisov12-0/+917
2015-11-20[ARM] Do not expand movmisalign pattern if not in 32-bit modeKyrylo Tkachov1-0/+18
2015-11-20S/390: Add bswaphi2 patternAndreas Krebbel1-0/+36
2015-11-20S/390: Clobber r1 in patterns resulting in pfpo instruction.Dominik Vogt1-0/+21
2015-11-19[Patch, vrp] Allow VRP type conversion folding only for widenings upto word modeSenthil Kumar Selvaraj1-0/+24
2015-11-19re PR target/67770 (i386: -fshrink-wrap can interact badly with trampolines)Jakub Jelinek1-0/+40
2015-11-16[AArch64] Fix gcc.target/aarch64/vclz.cAlan Lawrence1-8/+3
2015-11-16arm_neon.h: Remove #ifndef check on __ARM_NEON.Christian Bruel2-0/+43
2015-11-16re PR target/65837 ([arm-linux-gnueabihf] lto1 target specific builtin not av...Christian Bruel5-0/+120
2015-11-13constraints.md (we constraint): New constraint for 64-bit power9 vector support.Michael Meissner3-0/+71
2015-11-13[combine] Don't transform sign and zero extends inside multsKyrylo Tkachov1-0/+29
2015-11-13Revert [ARM] Remove neon-testgen.ml and generated tests.Christophe Lyon1989-0/+38425
2015-11-12[ARM] Remove neon-testgen.ml and generated tests.Christophe Lyon1989-38425/+0
2015-11-12* gcc.target/powerpc/pr67789.c: Skip on AIX and Darwin.David Edelsohn1-0/+1
2015-11-12re PR target/67265 ([x86] 'asm' operand has impossible constraints with -fsta...Eric Botcazou1-0/+9
2015-11-12mmx-1.c: Adjust for unified asm.Christian Bruel1-1/+1
2015-11-12i386.c (ix86_legitimate_combined_insn): Reject combined insn if the alignment...Uros Bizjak1-2/+4
2015-11-11re PR target/67265 ([x86] 'asm' operand has impossible constraints with -fsta...Eric Botcazou1-0/+12
2015-11-11rs6000: Extend 20050603-3.c testcase to 64-bitSegher Boessenkool1-4/+8
2015-11-11Undo delay slot filling and use compact branches in selected cases.Simon Dardis1-0/+19
2015-11-10sse.md (HALFMASKMODE): New attribute.Ilya Enkovich2-0/+200
2015-11-10internal-fn.c (expand_MASK_LOAD): Adjust to maskload optab changes.Ilya Enkovich1-0/+18
2015-11-10re PR tree-optimization/56118 (Piecewise vector / complex initialization from...Richard Biener1-0/+17
2015-11-10[AArch64][2/3] Implement negcc, notcc optabsKyrylo Tkachov1-0/+99
2015-11-10re PR target/57845 (ICE with -freg-struct-return on SPARC)Eric Botcazou2-0/+13
2015-11-10constraints.md (wF constraint): New constraints for power9/toc fusion.Michael Meissner12-8/+164
2015-11-09Resolve DejaGnu hard stopThomas Schwinge1-1/+1
2015-11-09thumb2-slow-flash-data.c: Add missing typespec for labelref and check use of ...Thomas Preud'homme1-3/+2
2015-11-09i386: Add address spaces for fs/gs segments and tlsRichard Henderson3-0/+32
2015-11-08Merge of the scalar-storage-order branch.Eric Botcazou1-0/+19
2015-11-08[AArch64] Fix vqtb[lx][234] on big-endianChristophe Lyon1-0/+519
2015-11-06revert: arm.md (*arm_smin_cmp): New pattern.Michael Collison1-20/+0
2015-11-06[Patch ARM] Unified assembler in ARM state.Ramana Radhakrishnan4-7/+6
2015-11-06vtbX.c: Fix typos in comment.Christophe Lyon1-2/+2
generated by cgit v1.1 at 2024-07-24 08:20:50 +0000