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2018-04-10cppopts.texi: Use "side effect" instead of side-effect.Martin Sebor1-5/+5
2018-01-13Add support for SVE scatter storesRichard Sandiford1-0/+29
2018-01-13Add support for SVE gather loadsRichard Sandiford1-0/+29
2018-01-13Add support for in-order addition reduction using SVE FADDARichard Sandiford1-0/+8
2018-01-13Add support for conditional reductions using SVE CLASTBRichard Sandiford1-0/+9
2018-01-13Add support for vectorising live-out values using SVE LASTBRichard Sandiford1-0/+8
2018-01-13Add support for reductions in fully-masked loopsRichard Sandiford1-0/+36
2018-01-13Add support for fully-predicated loopsRichard Sandiford1-0/+13
2018-01-13Add support for bitwise reductionsRichard Sandiford1-0/+11
2018-01-13SLP reductions with variable-length vectorsRichard Sandiford1-0/+8
2018-01-13Add support for masked load/store_lanesRichard Sandiford1-0/+36
2018-01-13[AArch64] Add SVE supportRichard Sandiford1-1/+7
2018-01-03Update copyright years.Jakub Jelinek1-1/+1
2018-01-02Remove vec_perm_const optabRichard Sandiford1-14/+2
2017-12-16Add VEC_SERIES_EXPR and associated optabRichard Sandiford1-0/+13
2017-12-16Add VEC_DUPLICATE_EXPR and associated optabRichard Sandiford1-0/+11
2017-12-01Fix "central flowgraph" typo in machine desc docsJonathan Wakely1-1/+1
2017-11-13[Documentation] Fix latency in pipeline description exampleLuis Machado1-2/+2
2017-10-14target-insns.def: Add memory_blockage.Uros Bizjak1-0/+9
2017-09-04Turn HARD_REGNO_MODE_OK into a target hookRichard Sandiford1-2/+2
2017-09-01retire mem_signal_fence patternAlexander Monakov1-13/+0
2017-08-28optabs: ensure mem_thread_fence is a compiler barrierAlexander Monakov1-5/+11
2017-08-01re PR target/80846 (auto-vectorized AVX2 horizontal sum should narrow to 128b...Jakub Jelinek1-7/+14
2017-06-07Clarify define_insn documentationRichard Sandiford1-4/+21
2017-05-25md.texi (Machine Constraints): Update x86 family machine constraints section ...Sebastian Peryt1-3/+102
2017-05-17md.texi (Canonicalization of Instructions): Describe the canonical form of in...Uros Bizjak1-0/+19
2017-03-22re PR target/80123 (libgomp tests pr66199-2.c and pr66199-5.c fail with -mcpu...Aaron Sawdey1-0/+3
2017-03-21Use the more formal "cannot" instead of the informal "can't."Martin Sebor1-1/+1
2017-02-06RISC-V Port: gccPalmer Dabbelt1-0/+20
2017-01-10extend.texi: Tweak formatting to fix overfull hbox warnings.Sandra Loosemore1-5/+17
2017-01-03* doc/md.texi (Standard Names): Remove reference to Java frontend.Gerald Pfeifer1-2/+1
2017-01-01Update copyright years.Jakub Jelinek1-1/+1
2016-10-27constraints.md (wH constraint): Add new constraints for allowing 32-bit integ...Michael Meissner1-0/+12
2016-10-25re PR target/78102 (GCC refuses to generate PCMPEQQ instruction for SSE4.1)Jakub Jelinek1-0/+16
2016-09-27MIPS/GCC/doc: Fix `d' constraint descriptionMaciej W. Rozycki1-2/+2
2016-09-12extend.texi: Use lowercase "boolean".Marek Polacek1-2/+2
2016-07-22rs6000.c (rs6000_option_override_internal): Add comments to explain why certa...Kelvin Nilsen1-2/+2
2016-06-21remove mep-* supportTrevor Saunders1-101/+0
2016-06-15vsx.md (VSINT_84): Add DImode to enable loading DImode constants with XXSPLTI...Michael Meissner1-0/+3
2016-06-03Add option for whether ceil etc. can raise "inexact", adjust x86 conditions.Joseph Myers1-4/+13
2016-05-18re PR target/70915 (Improve loading 0/-1 in VSX registers on PowerPC)Michael Meissner1-1/+10
2016-05-17Fix minor doc bugs, signalling typo, major version changes rare.Jim Wilson1-1/+1
2016-05-11predicates.md (quad_memory_operand): Move most of the code into quad_address_...Michael Meissner1-0/+3
2016-05-03re PR target/49244 (__sync or __atomic builtins will not emit 'lock bts/btr/b...Jakub Jelinek1-0/+27
2016-02-22re PR bootstrap/69885 (ICE in maybe_legitimize_operand, at optabs.c:6903 on m...Jakub Jelinek1-1/+3
2016-02-12cgraph.c: Spelling fixes - behaviour -> behavior and neighbour -> neighbor.Jakub Jelinek1-1/+1
2016-01-29re PR target/69299 (-mavx performance degradation with r232088)Vladimir Makarov1-0/+14
2016-01-28re PR target/69459 (wrong code with -O2 and vector arithmetics @ x86_64)Uros Bizjak1-1/+1
2016-01-14Tidy: remove reduc_xxx_optab migration code.Alan Lawrence1-27/+0
2016-01-04constraints.md (wo constraint): New constraint for ISA 3.0 (power9).Michael Meissner1-2/+5
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