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2024-10-14SH: Fix cost estimation of mem load/storeOleg Endo1-7/+13
2024-10-13m68k: replace reload_in_progress by reload_in_progress || lra_in_progressAndreas Schwab3-11/+20
2024-10-12[RISC-V] Avoid unnecessary extensions when value is already extendedJivan Hakobyan1-2/+18
2024-10-12RISC-V] Slightly improve broadcasting small constants into vectorsJeff Law2-6/+21
2024-10-12RISC-V: Implement vector SAT_SUB for signed integerPan Li3-0/+21
2024-10-11PR target/117048 aarch64: Use more canonical and optimization-friendly repres...Kyrylo Tkachov1-4/+29
2024-10-11tree-optimization/117080 - Add SLP_TREE_MEMORY_ACCESS_TYPERichard Biener1-7/+15
2024-10-11aarch64: Add codegen support for SVE2 faminmaxSaurabh Jha2-0/+43
2024-10-11aarch64: Add SVE2 faminmax intrinsicsSaurabh Jha5-1/+29
2024-10-11i386: Fix up spaceship expanders for -mtune=i[45]86 [PR117053]Jakub Jelinek1-38/+108
2024-10-11i386: Fix some patterns's mem attribute.Hu, Lin11-10/+12
2024-10-10RISC-V:Bugfix for C++ code compilation failure with rv32imafc_zve32f[pr116883]Li Xu1-1/+6
2024-10-10Add a new tune avx256_avoid_vec_perm for SRF.liuhongt3-2/+21
2024-10-10Add new microarchitecture tune for SRF/GRR/CWF.liuhongt3-12/+22
2024-10-10x86: Implement Fast-Math Float Truncation to BF16 via PSRLD InstructionLevy Hsu1-7/+9
2024-10-09RISC-V: Optimize branches with shifted immediate operandsJovan Vukic3-0/+48
2024-10-09Revert "RISC-V: Enable builtin __riscv_mul with Zmmul extension."Jeff Law1-1/+1
2024-10-09aarch64: Fix SVE ACLE gimple folds for C++ LTO [PR116629]Richard Sandiford1-1/+1
2024-10-09Enable LRA for ia64René Rebe3-8/+5
2024-10-08RISC-V: Enable builtin __riscv_mul with Zmmul extension.Tsung Chun Lin1-1/+1
2024-10-08RISC-V: Implement TARGET_CAN_INLINE_PYangyu Chen2-0/+69
2024-10-08RISC-V: Implement scalar SAT_TRUNC for signed integerPan Li3-0/+92
2024-10-08x86/{,V}AES: adjust when to force EVEX encodingJan Beulich1-4/+4
2024-10-08aarch64: Expand CTZ to RBIT + CLZ for SVE [PR109498]Soumya AR1-0/+17
2024-10-08[RISC-V][PR target/116615] RISC-V: Use default LOGICAL_OP_NON_SHORT_CIRCUITPalmer Dabbelt1-2/+0
2024-10-08LoongArch: Fix up r15-4130Xi Ruoyao2-1/+4
2024-10-08ssa-math-opts, i386: Handle most unordered values rather than just 2 [PR116896]Jakub Jelinek1-4/+4
2024-10-08LoongArch: Add support to annotate tablejumpXi Ruoyao3-1/+19
2024-10-07[RISC-V] Add splitters to restore condops generation after recent phiopt changesJeff Law2-0/+114
2024-10-07arm: fix bootstrap issue with arm_noce_conversion_profitable_p patch [NFC]Andre Vieira1-2/+2
2024-10-07gcc: Remove executable permissions of testcases and *.md filesJakub Jelinek1-0/+0
2024-10-07aarch64: Fix general permutes of svbfloat16_tsRichard Sandiford2-18/+17
2024-10-07aarch64: Handle SVE modes in aarch64_evpc_reencode [PR116583]Richard Sandiford1-9/+46
2024-10-07ssa-math-opts, i386: Improve spaceship expansion [PR116896]Jakub Jelinek3-27/+180
2024-10-06hppa: Use stack slot SP-40 to copy between integer and floating-point registersJohn David Anglin2-26/+34
2024-10-05hppa: Don't clobber frame_pointer_rtx in expandersJohn David Anglin1-2/+0
2024-10-05hppa: Fix indirect_goto constraintJohn David Anglin1-1/+1
2024-10-05x86: Disable stack protector for naked functionsH.J. Lu1-0/+11
2024-10-04aarch64: Fix bug with max/min (PR116934)Saurabh Jha1-4/+4
2024-10-04AVR: target/116953 - ICE due to operands clobber in avr_out_sbxx_branch.Georg-Johann Lay1-1/+5
2024-10-04Revert: AVR: Implement TARGET_FLOATN_MODE.Georg-Johann Lay1-21/+0
2024-10-04AVR: Implement TARGET_FLOATN_MODE.Georg-Johann Lay1-0/+21
2024-10-04aarch64: Set Armv9-A generic L1 cache line size to 64 bytesKyrylo Tkachov1-1/+13
2024-10-04arm: Fix missed CE optimization for armv8.1-m.main [PR 116444]Andre Vieira2-0/+88
2024-10-04i386: Fix up ix86_expand_int_compare with TImode comparisons of SUBREGs from ...Jakub Jelinek1-0/+2
2024-10-04i386: Fix up *minmax<mode>3_2 splitter [PR116925]Jakub Jelinek1-1/+1
2024-10-03Aarch64: Define WIDEST_HARDWARE_FP_SIZEEric Botcazou1-0/+2
2024-10-03aarch64: Fix early ra for -fno-delete-dead-exceptions [PR116927]Andrew Pinski1-0/+6
2024-10-02arm: Prevent ICE when doloop dec_set is not PLUS exprAndre Vieira1-17/+32
2024-10-01AVR: avr.cc - Drop a superfluous sub-condition in avr_out_compare.Georg-Johann Lay1-1/+0
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