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AgeCommit message (Expand)AuthorFilesLines
2019-04-19PR translation/90118 Missing space between wordsChristophe Lyon1-1/+1
2019-04-18PR middle-end/89797 - ICE on a vector_size (1LU << 33) int variable Martin Sebor1-2/+1
2019-04-17rs6000: Remove a comma in a debug stringSegher Boessenkool1-1/+1
2019-04-17re PR target/90125 (Typo of AVX512 intrinsics)Jakub Jelinek1-8/+8
2019-04-17[ARC][COMMITTED] Fix diagnostic messages.Claudiu Zissulescu1-10/+12
2019-04-17rs6000: Improve the load/store-with-update patterns (PR17108)Segher Boessenkool2-158/+128
2019-04-17re PR target/89093 (C++ exception handling clobbers d8 VFP register)Jakub Jelinek1-2/+0
2019-04-16re PR target/84369 (test case gcc.dg/sms-10.c fails on power9)Pat Haugen1-0/+3
2019-04-16[ARC] Refactor deprecated macros.Claudiu Zissulescu3-15/+24
2019-04-16[ARC] Remove Rs5 constraint.Claudiu Zissulescu2-22/+12
2019-04-16[ARC] Refurb eliminate regs.Claudiu Zissulescu3-101/+115
2019-04-16[ARC] Emit blockage regardless to avoid delay slot scheduling.Claudiu Zissulescu2-28/+15
2019-04-16[NDS32] Fix nds32_split_ashiftdi3 with large shift amount.Kito Cheng1-7/+14
2019-04-16[NDS32] Handle subreg correctly in wext_odd_dep_p.Chung-Ju Wu1-4/+12
2019-04-16re PR target/90096 (Misleading option hint for AVX intrinsics)Jakub Jelinek1-15/+21
2019-04-15microblaze.c (microblaze_expand_block_move): Treat size and alignment as unsi...Jeff Law1-6/+6
2019-04-15[NDS32] Rewrite PIC/TLS patterns.Monk Chiang4-23/+69
2019-04-13re PR target/89093 (C++ exception handling clobbers d8 VFP register)Jakub Jelinek1-6/+6
2019-04-12* config/mips/loongson-mmiintrin.h: Fix up #error message.Jakub Jelinek1-2/+2
2019-04-12re PR target/87532 (bad results from vec_extract(unsigned char, foo) dependen...Kelvin Nilsen2-5/+5
2019-04-12re PR target/52726 (Composed error message will not get translated)Jakub Jelinek1-1/+1
2019-04-12S/390: Fix a problem with the bswap vector patternAndreas Krebbel3-46/+89
2019-04-11re PR rtl-optimization/87763 (aarch64 target testcases fail after r265398)Steve Ellcey1-1/+14
2019-04-11xcoffout.h (xcoff_private_rodata_section_name): Declare.David Edelsohn1-4/+6
2019-04-11[aarch64] PR90016 - aarch64: reference to undeclared N in help for command li...Christophe Lyon1-1/+1
2019-04-11S/390: Add arch13 pipeline and model numberRobin Dapp7-9/+326
2019-04-10re PR rtl-optimization/87763 (aarch64 target testcases fail after r265398)Steve Ellcey3-0/+120
2019-04-10[aarch64] PR90016 - aarch64: reference to undeclared N in help for command li...Richard Earnshaw1-1/+1
2019-04-09Hi there,Matthew Malcomson3-38/+52
2019-04-09re PR translation/90011 (trailing space in diagnostic)Jakub Jelinek4-5/+5
2019-04-09re PR target/90015 (riscv: typo "intterupt" in diagnostic)Jakub Jelinek1-2/+2
2019-04-08[AArch64] Add tsv110 pipeline schedulingwu yuan3-1/+710
2019-04-08The fma_forest, fma_root_node and func_fma_steering classes lack a copy const...Andrea Corallo1-0/+10
2019-04-08re PR rtl-optimization/89865 (FAIL: gcc.target/i386/pr49095.c scan-assembler-...Jakub Jelinek1-0/+94
2019-04-08re PR rtl-optimization/89865 (FAIL: gcc.target/i386/pr49095.c scan-assembler-...Jakub Jelinek1-6/+119
2019-04-08re PR target/89623 (Can't build mips-wrs-vxworks cross-compiler)Chenghua Xu1-1/+1
2019-04-07re PR target/89945 (ICE in gen_lowpart_general, at rtlhooks.c:63)Uros Bizjak1-1/+10
2019-04-05Remove usage of apostrophes in error and warning messages (PR translation/899...Martin Liska14-46/+48
2019-04-03S/390: Reject long disp for vector load/store earlyAndreas Krebbel1-0/+11
2019-04-03[ARC] Restore blink first when optimizing for speed.Claudiu Zissulescu1-2/+35
2019-04-02re PR target/89902 (ICE: in extract_insn, at recog.c:2310: unrecognizable ins...Uros Bizjak1-121/+9
2019-04-02S/390: arch13: vector float-int conversion builtinsAndreas Krebbel4-34/+44
2019-04-02S/390: arch13: vector string search builtinsAndreas Krebbel5-0/+114
2019-04-02S/390: arch13: vector shift double by bit builtinsAndreas Krebbel5-3/+70
2019-04-02S/390: arch13: vector load byte reversed element and replicateAndreas Krebbel2-1/+20
2019-04-02S/390: arch13: vector load/store byte reversed element for builtinsAndreas Krebbel2-0/+77
2019-04-02S/390: arch13: vec_reve element order reversal builtinsAndreas Krebbel5-1/+117
2019-04-02S/390: arch13: vec_revb vector byte swap builtinAndreas Krebbel4-0/+94
2019-04-02S/390: arch13: New vector builtins - preparationAndreas Krebbel2-3/+7
2019-04-02S/390: arch13: Support 32 bit fp-int scalar convertsAndreas Krebbel1-27/+44
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