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2017-03-28OpenMP/PTX privatization in SIMD regionsAlexander Monakov5-18/+196
2017-03-28re PR target/53383 (Allow -mpreferred-stack-boundary=3 on x86-64)Uros Bizjak1-3/+2
2017-03-28[ARC] Define _REENTRANT when -pthread is passed.Claudiu Zissulescu3-2/+30
2017-03-28[ARC] Update ARC SIMD patterns.Claudiu Zissulescu1-31/+67
2017-03-27re PR target/78543 (ICE in push_reload, at reload.c:1349 on powerpc64le-linux...Michael Meissner1-80/+96
2017-03-27re PR target/80103 (ICE in output_1144, at config/rs6000/vsx.md:2298)Kelvin Nilsen2-6/+59
2017-03-27[ARC] Fix move_double_src_operand predicate.Claudiu Zissulescu1-1/+1
2017-03-27[ARC] Disable TP register when building for bare metal.Claudiu Zissulescu3-1/+9
2017-03-27[ARC] Fix detection of long immediate for load/store operands.Claudiu Zissulescu1-0/+5
2017-03-27[ARC] Save/restore blink when in ISR.Claudiu Zissulescu2-5/+12
2017-03-25re PR target/80180 (Incorrect codegen from rdseed intrinsic use (CVE-2017-116...Uros Bizjak1-8/+22
2017-03-24S/390: arch12: New builtins.Andreas Krebbel8-1906/+2473
2017-03-24S/390: arch12: Support new vector floating point modes.Andreas Krebbel4-171/+301
2017-03-24S/390: arch12: Support the mul/add/subtractAndreas Krebbel1-13/+85
2017-03-24S/390: arch12: Add indirect branch patternAndreas Krebbel1-11/+37
2017-03-24S/390: arch12: Add vllezlf instruction.Andreas Krebbel2-0/+45
2017-03-24S/390: arch12: New vector popcount variantsAndreas Krebbel1-8/+30
2017-03-24S/390: arch12: Add support for new vector bitAndreas Krebbel2-2/+44
2017-03-24S/390: arch12: Add arch12 option.Andreas Krebbel8-14/+57
2017-03-24S/390: Rearrange fixuns_trunc pattern definitions.Andreas Krebbel1-110/+143
2017-03-24S/390: Use wfc for scalar vector comparesAndreas Krebbel3-122/+14
2017-03-24S/390: movdf improvementsAndreas Krebbel1-16/+14
2017-03-24S/390: movsf/sd pattern fixes.Andreas Krebbel1-3/+3
2017-03-24S/390: vec_init improvementsAndreas Krebbel3-21/+57
2017-03-24S/390: Improve support of 128 bit vectors in GPRsAndreas Krebbel4-10/+71
2017-03-24S/390: Rename cpu facility vec to vx.Andreas Krebbel1-23/+23
2017-03-24S/390: PR79904: Disallow reg + sym_ref literal pool addresses.Andreas Krebbel1-7/+4
2017-03-24S/390: PR79893: Add diagnostics vec_load_bndry builtin.Andreas Krebbel1-2/+10
2017-03-23p9-options-1.c: New test.Kelvin Nilsen1-7/+48
2017-03-23[ARM] PR target/71436: Restrict *load_multiple pattern till after LRAKyrylo Tkachov1-1/+4
2017-03-22re PR rtl-optimization/63191 (32-bit gcc uses excessive memory during dead st...Jakub Jelinek1-5/+25
2017-03-22Recently we've put a lot of effort into improving ifcvt to use CSEL on AArch64.Wilco Dijkstra1-2/+2
2017-03-22Many supported cores implement fusion of AES instructions.Wilco Dijkstra1-1/+1
2017-03-22re PR target/80123 (libgomp tests pr66199-2.c and pr66199-5.c fail with -mcpu...Aaron Sawdey4-2/+11
2017-03-22Fix PR80082: LDRD erronously used for 64bit load on ARMv7-RThomas Preud'homme4-8/+8
2017-03-22Error message on target attribute on power target (PR target/79906)Martin Liska1-1/+4
2017-03-22rs6000-c.c (rs6000_target_modify_macros): Add comments.Kelvin Nilsen2-3/+255
2017-03-21Apply temporary fix for PR rtl-optimization/79150.Toma Tabacu1-0/+3
2017-03-20re PR target/80083 (libgomp doacross2.f90 regtest fails with -mcpu=power9 -O1)Aaron Sawdey1-1/+1
2017-03-20re PR target/79963 (vec_eq_any extracts wrong CR bit when compiling with -mcp...Kelvin Nilsen2-4/+4
2017-03-20i386.c (ix86_function_regparm): Save an extra register for -fsplit-stack with...Ian Lance Taylor1-2/+8
2017-03-20RISC-V: Don't prefer FP_REGS for integersPalmer Dabbelt1-13/+0
2017-03-20Use more conservative fences on RISC-VPalmer Dabbelt2-2/+2
2017-03-20S/390: PR78857: Don't use load and test if result is live.Andreas Krebbel1-2/+25
2017-03-17[aarch64] Fix typo in aarch64.opt (dummping -> dumping).Richard Earnshaw1-1/+1
2017-03-17re PR target/79951 (ICE in extract_insn, at recog.c:2311 on ppc64le with -mno...Pat Haugen1-1/+1
2017-03-16re PR target/71294 (ICE in gen_add2_insn, at optabs.c:4442 on powerpc64le-linux)Michael Meissner1-5/+18
2017-03-162017-03-16 Tamar Christina <tamar.christina@arm.com>Tamar Christina1-3/+3
2017-03-16[AArch64] Use 'x' constraint for vector HFmode multiplication by indexed elem...Kyrylo Tkachov2-5/+5
2017-03-15re PR target/79038 (Improve PowerPC ISA 3.0 conversion between integers and h...Michael Meissner1-0/+69
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