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AgeCommit message (Expand)AuthorFilesLines
2013-05-02AArch64 Support for BICS in the backendIan Bolton1-0/+66
2013-05-01[AArch64] Refactor reduc_<su>plus patterns.James Greenhalgh5-254/+140
2013-05-01[AArch64] Rewrite v<max,min><nm><q><v>_<sfu><8, 16, 32, 64> intrinsics using ...James Greenhalgh1-362/+277
2013-05-01[AArch64] Fold max and min reduction builtins to tree.James Greenhalgh1-0/+15
2013-05-01[AArch64] Refactor vector max and min RTL and builtins.James Greenhalgh4-79/+105
2013-05-01[AArch64] Rewrite vca<ge, gt, le, lt> Neon patterns in C.James Greenhalgh1-176/+104
2013-05-01[AArch64] Add combiner patterns for FAC instructionsJames Greenhalgh2-0/+20
2013-05-01[AArch64] Add special case when expanding vcond with arms {-1, -1}, {0, 0}.James Greenhalgh1-18/+69
2013-05-01[AArch64] Remap neon vcmp functions to C/TREEJames Greenhalgh3-339/+1147
2013-05-01[AArch64] Improve description of <F>CM instructions in RTLJames Greenhalgh5-52/+205
2013-05-01thumb2.md (thumb2_smaxsi3,thumb2_sminsi3): Convert define_insn to define_insn...Greta Yorsh1-63/+329
2013-04-30thumb2.md (thumb2_incscc, [...]): Delete.Greta Yorsh1-26/+0
2013-04-30Committed as obvious.Greta Yorsh1-5/+5
2013-04-30gcc: arm: linux-eabi: fix handling of armv4 bx fixups when linkingMike Frysinger2-2/+6
2013-04-29re PR target/44578 (GCC generates MMX instructions but fails to generate "emms")Uros Bizjak1-2/+2
2013-04-29re PR target/57098 (ICE: in extract_insn, at recog.c:2154 (unrecognizable ins...Uros Bizjak1-3/+3
2013-04-29[AArch64] Support LDR/STR from/to S and D registersIan Bolton1-8/+12
2013-04-29arm.md (store_minmaxsi): Use only when optimize_insn_for_size_p.Kyrylo Tkachov1-1/+1
2013-04-29re PR target/57108 ([4.7/4.8/4.9] SH internal compiler error: in int_mode_for...Christian Bruel1-1/+1
2013-04-29[AArch64] fcvt instructions - arm_neon.h changes.James Greenhalgh1-726/+431
2013-04-29[AArch64] Add vector fix, fixuns, fix_trunc, fixuns_trunc standard patternsJames Greenhalgh2-0/+28
2013-04-29[AArch64] Vectorize over more math.h functions.James Greenhalgh1-0/+18
2013-04-29re PR target/54349 (_mm_cvtsi128_si64 unnecessary stores value at stack)Uros Bizjak6-33/+50
2013-04-29[AArch64] Implement vector float->double widening and double->float narrowing.James Greenhalgh2-0/+108
2013-04-29[AArch64] Add vector int to float conversions.James Greenhalgh4-0/+30
2013-04-29[AArch64] Map fcvt intrinsics to builtin name directly.James Greenhalgh4-24/+85
2013-04-29[AArch64] Fix order of modes to lroundmn2 standard names.James Greenhalgh1-1/+1
2013-04-29[AArch64] Convert NEON frint implementations to use builtins.James Greenhalgh1-165/+139
2013-04-29[AArch64] Map frint intrinsics to standard pattern names directly.James Greenhalgh5-25/+23
2013-04-29predicates.md (general_vector_operand): New predicate.Jakub Jelinek3-12/+45
2013-04-27* config/i386/i386.c (ix86_expand_call): Make cregs_size unsigned.Jakub Jelinek1-1/+2
2013-04-27re PR target/56866 (with '-O3 -march=bdver2' misscompiles glibc-2.17/crypt/sh...Jakub Jelinek2-2/+5
2013-04-26i386.md (type, unit): Fix long lines.Uros Bizjak1-11/+18
2013-04-25[AArch64] Describe the 'BSL' RTL pattern more accurately.James Greenhalgh2-18/+31
2013-04-25[AArch64] Change iterator for neg<mode>2 from VDQM to VDQ.James Greenhalgh1-2/+2
2013-04-25[AArch64] Make vabs<q>_f<32, 64> a tree/gimple intrinsic.James Greenhalgh5-33/+45
2013-04-25[AArch64] Implement TARGET_GIMPLE_FOLD_BUILTIN for aarch64 backend.James Greenhalgh6-5/+92
2013-04-25gcc/Naveen H.S1-0/+12
2013-04-25aarch64.md (*ngc<mode>): New pattern.Naveen H.S1-0/+21
2013-04-25arm.c (neon_builtin_type_mode): Add T_V4HF.Kyrylo Tkachov8-31/+153
2013-04-25[AArch64] Fix printf format warning in aarch64_print_operandJames Greenhalgh1-1/+1
2013-04-25re PR target/57052 (missed optimization with rotate and mask)Alan Modra1-58/+626
2013-04-25config.host: Match little-endian powerpc-linux.Alan Modra8-83/+101
2013-04-25rs6000.c (rs6000_secondary_reload_inner): Use replace_equiv_address_nv.Alan Modra1-1/+1
2013-04-25rs6000.c (rs6000_emit_set_long_const): Tidy.Alan Modra1-24/+9
2013-04-24Handle -mx32 in x86-64 ASM_SPECH.J. Lu1-1/+1
2013-04-24[AArch64] Fix vld1<q>_* asm constraints in arm_neon.hJames Greenhalgh1-240/+240
2013-04-24micromips.md (jraddiusp): New pattern.Catherine Moore2-1/+26
2013-04-24fix comment pastoAlan Modra1-1/+1
2013-04-23mips.md (*movhi_internal, [...]): New operands.Catherine Moore1-6/+8