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Age
Commit message (
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Author
Files
Lines
2023-06-20
aarch64: Optimise ADDP with same source operands
Kyrylo Tkachov
1
-0
/
+30
2023-06-20
AArch64: remove test comment from *mov<mode>_aarch64
Tamar Christina
1
-1
/
+1
2023-06-20
x86: correct and improve "*vec_dupv2di"
Jan Beulich
1
-6
/
+22
2023-06-20
RISC-V: Add tuple vector mode psABI checking and simplify code
Lehua Ding
1
-36
/
+17
2023-06-19
RISC-V: Save and restore FCSR in interrupt functions to avoid program errors.
Jin Ma
2
-3
/
+58
2023-06-19
AArch64: convert some patterns to compact MD syntax
Tamar Christina
1
-83
/
+78
2023-06-19
RISC-V: Fix VWEXTF iterator requirement
Li Xu
1
-6
/
+6
2023-06-19
RISC-V: Bugfix for RVV widenning reduction in ZVE32/64
Pan Li
3
-199
/
+163
2023-06-19
RISC-V: Bugfix for RVV float reduction in ZVE32/64
Pan Li
3
-216
/
+280
2023-06-19
amdgcn: implement vector div and mod libfuncs
Andrew Stubbs
1
-0
/
+244
2023-06-19
amdgcn: minimal V64TImode vector support
Andrew Stubbs
3
-130
/
+299
2023-06-19
Fix build of aarc64
Richard Biener
1
-1
/
+2
2023-06-19
avr: Fix wrong array bounds warning on SFR access
Senthil Kumar Selvaraj
1
-0
/
+17
2023-06-19
RISC-V: Add autovec FP unary operations.
Robin Dapp
1
-1
/
+35
2023-06-19
RISC-V: Add autovec FP binary operations.
Robin Dapp
5
-14
/
+137
2023-06-19
RISC-V: Add sign-extending variants for vmv.x.s.
Robin Dapp
2
-0
/
+34
2023-06-19
RISC-V: Implement vec_set and vec_extract.
Robin Dapp
3
-2
/
+132
2023-06-19
avr: Fix ICE on optimize attribute.
Senthil Kumar Selvaraj
1
-2
/
+2
2023-06-18
xtensa: constantsynth: Add new 2-insns synthesis pattern
Takayuki 'January June' Suwa
1
-2
/
+10
2023-06-18
xtensa: Remove TARGET_MEMORY_MOVE_COST hook
Takayuki 'January June' Suwa
1
-13
/
+0
2023-06-19
rs6000: Enable const_anchor for 'addi'
Jiufu Guo
1
-0
/
+4
2023-06-19
Refined 256/512-bit vpacksswb/vpackssdw patterns.
liuhongt
1
-18
/
+147
2023-06-19
Reimplement packuswb/packusdw with UNSPEC_US_TRUNCATE instead of original us_...
liuhongt
4
-30
/
+59
2023-06-19
RISC-V: Fix one typo for reduc expand GET_MODE_CLASS
Pan Li
1
-1
/
+1
2023-06-18
Fix arc assumption that insns are not re-recognized
Jeff Law
1
-1
/
+7
2023-06-18
i386: Refactor new ix86_expand_carry to set the carry flag.
Roger Sayle
3
-14
/
+19
2023-06-18
i386: Standardize shift amount constants as QImode in i386.md.
Roger Sayle
1
-6
/
+6
2023-06-18
RISC-V:Add float16 tuple type support
yulong
7
-3
/
+144
2023-06-17
i386: Two minor tweaks to ix86_expand_move.
Roger Sayle
1
-4
/
+6
2023-06-17
RISC-V: Bugfix for RVV integer reduction in ZVE32/64.
Pan Li
3
-60
/
+222
2023-06-17
RISC-V: Fix VL operand bug in VSETVL PASS[PR110264]
Juzhe-Zhong
1
-1
/
+4
2023-06-16
PR target/31985: Improve memory operand use with doubleword add.
Roger Sayle
1
-0
/
+30
2023-06-16
aarch64: Handle ASHIFTRT in patterns for shrn2
Kyrylo Tkachov
3
-29
/
+31
2023-06-16
aarch64: [US]Q(R)SHR(U)N2 refactoring
Kyrylo Tkachov
4
-198
/
+237
2023-06-16
aarch64: Add ASHIFTRT handling for shrn pattern
Kyrylo Tkachov
3
-3
/
+10
2023-06-16
aarch64: [US]Q(R)SHR(U)N scalar forms refactoring
Kyrylo Tkachov
2
-8
/
+106
2023-06-16
aarch64: Reimplement [US]Q(R)SHR(U)N patterns with RTL codes
Kyrylo Tkachov
5
-98
/
+174
2023-06-16
RISC-V: Fix one warning of maybe-uninitialized in riscv-vsetvl.cc
Pan Li
1
-1
/
+1
2023-06-16
Add MinGW option -mcrtdll= for choosing C RunTime DLL library
Pali Rohár
3
-5
/
+49
2023-06-16
MIPS16: Implement `code_readable` function attribute.
Simon Dardis
1
-1
/
+96
2023-06-15
x86/AVX512: use VMOVDDUP for broadcast to V2DF
Jan Beulich
1
-2
/
+2
2023-06-15
x86: add Bk and Br to comment list B's sub-chars
Jan Beulich
1
-0
/
+2
2023-06-15
LoongArch: Avoid non-returning indirect jumps through $ra [PR110136]
Lulu Cheng
1
-2
/
+6
2023-06-15
LoongArch: Set default alignment for functions and labels with -mtune
Xi Ruoyao
4
-0
/
+27
2023-06-15
middle-end, i386: Pattern recognize add/subtract with carry [PR79173]
Jakub Jelinek
1
-4
/
+69
2023-06-15
i386: Add peephole2 patterns to improve subtract with borrow with memory dest...
Jakub Jelinek
1
-3
/
+151
2023-06-15
i386: Add peephole2 patterns to improve add with carry or subtract with borro...
Jakub Jelinek
1
-0
/
+289
2023-06-15
AArch64: New RTL for ABD
Oluwatamilore Adebayo
2
-2
/
+14
2023-06-15
LoongArch: Change the default value of LARCH_CALL_RATIO to 6.
chenxiaolong
1
-1
/
+1
2023-06-15
RISC-V: Use merge approach to optimize vector permutation
Juzhe-Zhong
1
-0
/
+53
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