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AgeCommit message (Expand)AuthorFilesLines
2023-06-20aarch64: Optimise ADDP with same source operandsKyrylo Tkachov1-0/+30
2023-06-20AArch64: remove test comment from *mov<mode>_aarch64Tamar Christina1-1/+1
2023-06-20x86: correct and improve "*vec_dupv2di"Jan Beulich1-6/+22
2023-06-20RISC-V: Add tuple vector mode psABI checking and simplify codeLehua Ding1-36/+17
2023-06-19RISC-V: Save and restore FCSR in interrupt functions to avoid program errors.Jin Ma2-3/+58
2023-06-19AArch64: convert some patterns to compact MD syntaxTamar Christina1-83/+78
2023-06-19RISC-V: Fix VWEXTF iterator requirementLi Xu1-6/+6
2023-06-19RISC-V: Bugfix for RVV widenning reduction in ZVE32/64Pan Li3-199/+163
2023-06-19RISC-V: Bugfix for RVV float reduction in ZVE32/64Pan Li3-216/+280
2023-06-19amdgcn: implement vector div and mod libfuncsAndrew Stubbs1-0/+244
2023-06-19amdgcn: minimal V64TImode vector supportAndrew Stubbs3-130/+299
2023-06-19Fix build of aarc64Richard Biener1-1/+2
2023-06-19avr: Fix wrong array bounds warning on SFR accessSenthil Kumar Selvaraj1-0/+17
2023-06-19RISC-V: Add autovec FP unary operations.Robin Dapp1-1/+35
2023-06-19RISC-V: Add autovec FP binary operations.Robin Dapp5-14/+137
2023-06-19RISC-V: Add sign-extending variants for vmv.x.s.Robin Dapp2-0/+34
2023-06-19RISC-V: Implement vec_set and vec_extract.Robin Dapp3-2/+132
2023-06-19avr: Fix ICE on optimize attribute.Senthil Kumar Selvaraj1-2/+2
2023-06-18xtensa: constantsynth: Add new 2-insns synthesis patternTakayuki 'January June' Suwa1-2/+10
2023-06-18xtensa: Remove TARGET_MEMORY_MOVE_COST hookTakayuki 'January June' Suwa1-13/+0
2023-06-19rs6000: Enable const_anchor for 'addi'Jiufu Guo1-0/+4
2023-06-19Refined 256/512-bit vpacksswb/vpackssdw patterns.liuhongt1-18/+147
2023-06-19Reimplement packuswb/packusdw with UNSPEC_US_TRUNCATE instead of original us_...liuhongt4-30/+59
2023-06-19RISC-V: Fix one typo for reduc expand GET_MODE_CLASSPan Li1-1/+1
2023-06-18Fix arc assumption that insns are not re-recognizedJeff Law1-1/+7
2023-06-18i386: Refactor new ix86_expand_carry to set the carry flag.Roger Sayle3-14/+19
2023-06-18i386: Standardize shift amount constants as QImode in i386.md.Roger Sayle1-6/+6
2023-06-18RISC-V:Add float16 tuple type supportyulong7-3/+144
2023-06-17i386: Two minor tweaks to ix86_expand_move.Roger Sayle1-4/+6
2023-06-17RISC-V: Bugfix for RVV integer reduction in ZVE32/64.Pan Li3-60/+222
2023-06-17RISC-V: Fix VL operand bug in VSETVL PASS[PR110264]Juzhe-Zhong1-1/+4
2023-06-16PR target/31985: Improve memory operand use with doubleword add.Roger Sayle1-0/+30
2023-06-16aarch64: Handle ASHIFTRT in patterns for shrn2Kyrylo Tkachov3-29/+31
2023-06-16aarch64: [US]Q(R)SHR(U)N2 refactoringKyrylo Tkachov4-198/+237
2023-06-16aarch64: Add ASHIFTRT handling for shrn patternKyrylo Tkachov3-3/+10
2023-06-16aarch64: [US]Q(R)SHR(U)N scalar forms refactoringKyrylo Tkachov2-8/+106
2023-06-16aarch64: Reimplement [US]Q(R)SHR(U)N patterns with RTL codesKyrylo Tkachov5-98/+174
2023-06-16RISC-V: Fix one warning of maybe-uninitialized in riscv-vsetvl.ccPan Li1-1/+1
2023-06-16Add MinGW option -mcrtdll= for choosing C RunTime DLL libraryPali Rohár3-5/+49
2023-06-16MIPS16: Implement `code_readable` function attribute.Simon Dardis1-1/+96
2023-06-15x86/AVX512: use VMOVDDUP for broadcast to V2DFJan Beulich1-2/+2
2023-06-15x86: add Bk and Br to comment list B's sub-charsJan Beulich1-0/+2
2023-06-15LoongArch: Avoid non-returning indirect jumps through $ra [PR110136]Lulu Cheng1-2/+6
2023-06-15LoongArch: Set default alignment for functions and labels with -mtuneXi Ruoyao4-0/+27
2023-06-15middle-end, i386: Pattern recognize add/subtract with carry [PR79173]Jakub Jelinek1-4/+69
2023-06-15i386: Add peephole2 patterns to improve subtract with borrow with memory dest...Jakub Jelinek1-3/+151
2023-06-15i386: Add peephole2 patterns to improve add with carry or subtract with borro...Jakub Jelinek1-0/+289
2023-06-15AArch64: New RTL for ABDOluwatamilore Adebayo2-2/+14
2023-06-15LoongArch: Change the default value of LARCH_CALL_RATIO to 6.chenxiaolong1-1/+1
2023-06-15RISC-V: Use merge approach to optimize vector permutationJuzhe-Zhong1-0/+53