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2022-05-18x86: Fix -fsplit-stack feature detection via TARGET_CAN_SPLIT_STACKUros Bizjak2-4/+6
2022-05-18Correct ix86_rtx_cost for multi-word multiplication.Roger Sayle1-1/+11
2022-05-18Avoid andn and generate shorter not;and with -Oz on x86.Roger Sayle1-0/+34
2022-05-18This patch adds a combine pattern for "CA minus one". The SImode "CA minus on...Haochen Gui1-0/+13
2022-05-18recognize bzhi pattern when there's zero_extendsidi.liuhongt1-0/+16
2022-05-18Expand __builtin_memcmp_eq with ptest for OImode.liuhongt2-1/+25
2022-05-17rs6000: Prefer assigning the MMA vector operands to altivec registers [PR105556]Peter Bergner1-75/+75
2022-05-17Fix register count when not splitting Complex IEEE 128-bit args.Pat Haugen1-0/+6
2022-05-17Revert 'Use more ARRAY_SIZE.' for mkoffloadTobias Burnus2-4/+4
2022-05-17i386: Fix ICE in final_scan_insn_1 [PR105624]Uros Bizjak5-249/+249
2022-05-17gcn/t-omp-device: Add 'amdgcn' as 'arch' [PR105602]Tobias Burnus2-2/+2
2022-05-17i386: Fix up V2DI and V1TI inequality comparisons [PR105613]Jakub Jelinek1-2/+8
2022-05-17Optimize vpermtiw/b to vpunpcklqdq for certain cases.liuhongt1-5/+59
2022-05-16Use more ARRAY_SIZE.Martin Liska14-25/+25
2022-05-16Fix ICE caused by wrong condition.liuhongt1-7/+2
2022-05-15i386: Remove constraints when used with constant integer predicates.Uros Bizjak5-249/+249
2022-05-13Improved V1TI (and V2DI) mode equality/inequality on x86_64.Roger Sayle1-2/+46
2022-05-13RISC-V: Implement C[LT]Z_DEFINED_VALUE_AT_ZEROPhilipp Tomsich1-0/+5
2022-05-13[AArch64] add barriers to ool __sync builtinsSebastian Pop2-4/+10
2022-05-13arm: correctly handle misaligned MEMs on MVE [PR105463]Richard Earnshaw2-21/+73
2022-05-13arm: fix some issues in mve_vector_mem_operandRichard Earnshaw1-9/+10
2022-05-13xtensa: Reflect the 32-bit Integer Divide OptionTakayuki 'January June' Suwa1-0/+5
2022-05-13xtensa: Rename deprecated extv/extzv insn patterns to extvsi/extzvsiTakayuki 'January June' Suwa1-8/+8
2022-05-13Make gimple_build main workers more flexibleRichard Biener4-3/+4
2022-05-12i386: Add combine splitter to transform pxor/pcmpeqb/pmovmskb/cmp 0xffff to p...Haochen Jiang1-0/+18
2022-05-11rs6000: Remove <Fv>Segher Boessenkool1-52/+46
2022-05-11rs6000: Remove <Ff>Segher Boessenkool1-60/+57
2022-05-11rs6000: Delete RS6000_CONSTRAINT_fSegher Boessenkool3-16/+5
2022-05-11i386: simplify cpu_feature handlingMartin Liska1-40/+39
2022-05-11Optimize movzwl + vmovd/vmovq to vmovw.liuhongt1-0/+94
2022-05-11rs6000: Fix constraint v with rs6000_constraints[RS6000_CONSTRAINT_v]Kewen Lin1-1/+1
2022-05-11opts: do not allow Separate+Joined ending with =Martin Liska1-1/+1
2022-05-10RISC-V: Provide `fmin'/`fmax' RTL patternsMaciej W. Rozycki1-0/+22
2022-05-10Avoid andb %dil when optimizing for size.Roger Sayle2-7/+28
2022-05-10Fix internal error with vectorization on SPARCEric Botcazou1-2/+2
2022-05-10rs6000: avoid peeking eof after __vectorJiufu Guo1-4/+5
2022-05-09i386: Adjust -fzero-call-used-regs to always use XOR [PR101891]Qing Zhao1-65/+28
2022-05-09Implement permutation with pslldq + psrldq + por when pshufb is not available.liuhongt1-0/+107
2022-05-09Optimize vec_setv8{hi,hf}_0 + pmovzxbq to pmovzxbq.liuhongt1-4/+41
2022-05-09RISC-V: Fix wrong expansion for arch-canonicalizeKito Cheng1-3/+5
2022-05-06rs6000: Ignore fusion option flags for inlining test [PR102059]Michael Meissner1-0/+5
2022-05-06aarch64: remove useless GPF_TF_F16 iteratorChristophe Lyon1-3/+0
2022-05-04arm: Restrict support of vectors of boolean immediates (PR target/104662)Christophe Lyon1-0/+3
2022-05-03Objective-C, NeXT: Adjust symbol marking to match host tools.Iain Sandoe1-0/+2
2022-05-03i386: Optimize _mm_storeu_si16 w/o SSE4 [PR105079]Uros Bizjak1-0/+20
2022-05-01rs6000: "Y" is DS-form, not DQ-formSegher Boessenkool1-1/+1
2022-04-29i386: Optimize double-word negation [PR51954]Uros Bizjak1-0/+44
2022-04-28i386: Improve ix86_expand_int_movccJakub Jelinek1-2/+1
2022-04-28i386: Fix up ix86_gimplify_va_arg [PR105331]Jakub Jelinek1-0/+1
2022-04-28loongarch: ignore zero-size fields in calling conventionXi Ruoyao1-0/+3
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