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2020-10-15RISC-V: Add support for -mcpu option.Kito Cheng6-52/+139
2020-10-15Enable Intel HRESET InstructionHongyu Wang10-3/+86
2020-10-15Enable gcc support for UINTRliuhongt13-3/+168
2020-10-14x86: Add missing intrinsics [PR95483]Sunil K Pandey14-14/+752
2020-10-14Fix the VX_CPU selection for -mcpu=xscale on arm-vxworksOlivier Hainque1-1/+1
2020-10-14Rework CPP_BUILTINS_SPEC for powerpc-vxworksOlivier Hainque1-7/+50
2020-10-14Fallback to default CPP spec for C++ on VxWorksOlivier Hainque1-0/+6
2020-10-14Adjust the VxWorks alternative LIMITS_H guard for glimits.hOlivier Hainque1-1/+1
2020-10-14i386: Improve chaining of _{addcarry,subborrow}_u{32,64} [PR97387]Jakub Jelinek2-12/+70
2020-10-14Tigthen flag_pic processing in vxworks_override_optionsOlivier Hainque1-2/+4
2020-10-13AArch64: Add Neoverse N2 tuning modelKyrylo Tkachov2-1/+27
2020-10-13nvptx/mkoffload.c: Add missing fcloseTobias Burnus1-0/+1
2020-10-13AArch64: Add FLAG for mul/mla/mls intrinsics [PR94442]zhengnannan1-26/+26
2020-10-12arm: Use E_FOOmode instead of FOOmode in arm_preferred_simd_modeChristophe Lyon1-5/+5
2020-10-12PR target/97349 AArch64: Incorrect types for some Neon vdupq_n_<...> intrinsicsKyrylo Tkachov1-7/+7
2020-10-12IBM Z: Change vector copysign to use bitwise operationsIlya Leoshkevich3-28/+45
2020-10-12[nvptx] Fix -msoft-stack-reserve-local formatTom de Vries1-1/+1
2020-10-11Darwin, Objective-C : Adjust objective-c symbol linkage with version.Iain Sandoe1-3/+30
2020-10-11Darwin, Objective-C : Update meta-data linkage.Iain Sandoe1-1/+42
2020-10-11Objective-C, Darwin : Revise the runtime selection options.Iain Sandoe2-3/+3
2020-10-10[nvptx] Replace dots in function namesTom de Vries1-3/+54
2020-10-10[nvptx] Factor out write_fn_proto_1Tom de Vries1-19/+23
2020-10-10Darwin : Only emit Objective-C section switches for older linkers.Iain Sandoe1-3/+4
2020-10-10Objective-C, Darwin : Update metadata section uses.Iain Sandoe2-0/+10
2020-10-10Objective-C, Darwin : Use special string sections for V2 NeXT runtime.Iain Sandoe2-0/+19
2020-10-10Darwin : Begin rework of zero-fill sections.Iain Sandoe1-28/+14
2020-10-09x86: Add <x86gprintrin.h>H.J. Lu30-270/+309
2020-10-09[nvptx] Set -misa=sm_35 by defaultTom de Vries2-2/+6
2020-10-08[PATCH, rs6000] Rename BU_P10_MISC_2 define to BU_P10_POWERPC64_MISC_2Will Schmidt1-6/+6
2020-10-08arm: [MVE] Add missing __arm_vcvtnq_u32_f32 intrinsic (PR 96914)Christophe Lyon1-0/+8
2020-10-08arm: [MVE] Remove illegal intrinsics (PR target/96914)Christophe Lyon5-212/+19
2020-10-08arm: [MVE[ Add vqdmlashq intrinsics (PR target/96914)Christophe Lyon5-0/+156
2020-10-08arm: Fix ICE on glibc compilation after my DIVMOD optimization [PR97322]Jakub Jelinek1-3/+1
2020-10-07amdgcn: Use scalar instructions for addptrdi3Andrew Stubbs1-12/+31
2020-10-07debug: Pass --gdwarf-N to assembler if fixed gas is detected during configureJakub Jelinek2-0/+4
2020-10-06arm: Enable MVE SIMD modes for vectorizationDennis Zhang1-0/+24
2020-10-06[PATCH][GCC] arm: Move iterators from mve.md to iterators.md to maintain cons...Srinath Parvathaneni3-648/+1266
2020-10-06arm: Add +nomve and +nomve.fp options to -mcpu=cortex-m55Joe Ramsay3-7/+84
2020-10-05arm: Add missing part number for Neoverse V1Alex Coplan1-0/+2
2020-10-02rs6000: clean up headers in rs6000.c and rs6000-call.cDavid Edelsohn2-11/+5
2020-10-02arm: Remove coercion from scalar argument to vmin & vmax intrinsicsJoe Ramsay1-36/+36
2020-10-02AArch64: Add neoversev1_tunings structKyrylo Tkachov2-2/+28
2020-10-02aarch64: Remove aarch64_sve_pred_dominates_pRichard Sandiford4-162/+853
2020-10-02arm: Make more use of the new mode macrosRichard Sandiford1-39/+25
2020-10-02[RS6000] ICE in decompose, at rtl.h:2282Alan Modra1-1/+1
2020-10-02[RS6000] rs6000_linux64_override_options fixAlan Modra1-13/+7
2020-10-02[RS6000] function for linux64 SUBSUBTARGET_OVERRIDE_OPTIONSAlan Modra3-152/+98
2020-10-01Fix build of ppc64 target.Martin Liska2-0/+2
2020-10-01[nvptx] Emit mov.u32 instead of cvt.u32.u32 for truncsiqi2Tom de Vries1-3/+7
2020-10-01arm: Add missing vec_cmp and vcond patternsRichard Sandiford3-217/+187
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