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2013-09-14re PR target/48094 (ld: warning: section has unexpectedly large size errors ↵Iain Sandoe1-15/+43
in objc/obj-c++ lto) gcc: PR target/48094 * config/darwin.c (darwin_objc2_section): Note if ObjC Metadata is seen. (darwin_objc1_section): Likewise. (darwin_file_end): Emit Image Info section when required. gcc/c-family: PR target/48094 * c.opt (fgnu-runtime, fnext-runtime, fobjc-abi-version, fobjc-gc, freplace-objc-classes): Accept for LTO. gcc/objc: PR target/48094 * objc-next-runtime-abi-01.c (generate_objc_image_info): Remove. (objc_generate_v1_next_metadata): Remove generation of ImageInfo. * objc-next-runtime-abi-02.c (generate_v2_objc_image_info): Remove. (objc_generate_v2_next_metadata): Remove generation of ImageInfo. From-SVN: r202593
2013-09-14re PR target/58269 (ICE when building libobjc on x86_64-apple-darwin* after ↵Iain Sandoe1-11/+3
revision 201915) gcc: PR target/58269 config/i386/i386.c (ix86_function_arg_regno_p): Make Darwin use the xmm register set described in the psABI. From-SVN: r202590
2013-09-13c-target.def: New hookJacek Caban2-0/+61
2013-09-13 Jacek Caban <jacek@codeweavers.com> * c-target.def: New hook gcc/ChangeLog: 2013-09-13 Jacek Caban <jacek@codeweavers.com> * config.gcc: Use new winnt-c.c target hooks * config/t-winnt: New file * config/winnt-c.c: New file * doc/tm.texi.in: Document new hook * doc/tm.texi: Regenerated gcc/cp/Changelog: 2013-09-13 Jacek Caban <jacek@codeweavers.com> * decl.c: Use new cxx_implicit_extern_c hook gcc/testsuite/ChangeLog: 2013-09-13 Jacek Caban <jacek@codeweavers.com> * g++.dg/abi/main.C: Added implicit C linkage tests From-SVN: r202573
2013-09-13arm.md (arm_cmpsi_insn): Split rI alternative.Kyrylo Tkachov1-6/+8
2013-09-13 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * config/arm/arm.md (arm_cmpsi_insn): Split rI alternative. Set type attribute correctly. Set predicable_short_it attribute. (cmpsi_shiftsi): Remove %? from output template. From-SVN: r202560
2013-09-13re PR target/58314 (SH4 error: 'asm' operand requires impossible reload)Christian Bruel1-8/+12
2013-09-13 Christian Bruel <christian.bruel@st.com> PR target/58314 * config/sh/sh.md (mov<mode>_reg_reg): Allow memory reloads. From-SVN: r202557
2013-09-13winnt-cxx.c (i386_pe_type_dllexport_p): Don't dll-export inline-functions.Kai Tietz2-0/+12
2013-09-13 Kai Tietz <ktietz@redhat.com> * config/i386/winnt-cxx.c (i386_pe_type_dllexport_p): Don't dll-export inline-functions. * config/i386/winnt.c (i386_pe_determine_dllexport_p): Likewise. Additional fix ChangeLog-date of prior commit. From-SVN: r202555
2013-09-12rl78-virt.md: Change from | to \; for asm line separators.DJ Delorie1-53/+53
* config/rl78/rl78-virt.md: Change from | to \; for asm line separators. From-SVN: r202545
2013-09-12rl78.opt (mrelax): New.DJ Delorie2-0/+14
* config/rl78/rl78.opt (mrelax): New. * config/rl78/rl78.h (ASM_SPEC): New, pass on -mrelax to gas. * config/rl78/rl78.h (LINK_SPEC): New, pass on -mrelax to ld. From-SVN: r202543
2013-09-12rl78.c (rl78_expand_prologue): Use AX to copy between SP and FP.DJ Delorie1-3/+9
* config/rl78/rl78.c (rl78_expand_prologue): Use AX to copy between SP and FP. (rl78_expand_epilogue): Likewise. From-SVN: r202542
2013-09-12MAINTAINERS: Add Nick Clifton and DJ Delorie as msp430 maintainers.DJ Delorie11-0/+3687
* MAINTAINERS: Add Nick Clifton and DJ Delorie as msp430 maintainers. [gcc] * config/msp430/: New port. * config.gcc (msp430): Added. * doc/invoke.texi: Document MSP430 options. * doc/install.texi: Document msp430-elf * doc/md.texi: Document msp430-elf * doc/contrib.texi: Document msp430-elf [libgcc] * config.host (msp*-*-elf): New. * config/msp430/: New port. [contrib] * config-list.mk: Add msp430-elf. From-SVN: r202535
2013-09-12x86-tune.def: Turn on X86_TUNE_AVOID_MEM_OPND_FOR_CMOVE for SLM.Yuri Rumyantsev1-1/+2
* config/i386/x86-tune.def: Turn on X86_TUNE_AVOID_MEM_OPND_FOR_CMOVE for SLM. From-SVN: r202520
2013-09-12rs6000.c (toc_relative_expr_p): Use add_cint_operand.Alan Modra1-1/+1
* config/rs6000/rs6000.c (toc_relative_expr_p): Use add_cint_operand. From-SVN: r202515
2013-09-11predicates.md (rl78_cmp_operator_signed): New.DJ Delorie8-293/+1531
* config/rl78/predicates.md (rl78_cmp_operator_signed): New. (rl78_stack_based_mem): New. * config/rl78/constraints.md (Iv08): New. (Iv16): New. (Iv24): New. (Is09): New. (Is17): New. (Is25): New. (ISsi): New. (IShi): New. (ISqi): New. * config/rl78/rl78-expand.md (movqi): Reject more SUBREG operands. (movhi): Likewise. (movsi): Change from expand to insn-and-split. (ashrsi3): Clobber AX. (lshrsi3): New. (ashlsi3): New. (cbranchsi4): New. * config/rl78/rl78.md (CC_REG): Fix. (addsi3): Allow memory and immediate operands. (addsi3_internal): Split into... (addsi3_internal_virt): ...new, and ... (addsi3_internal_real): ...new. (subsi): New. (subsi3_internal_virt): New. (subsi3_internal_real): New. (mulsi3): Add memory operand. (mulsi3_rl78): Likewise. (mulsi3_g13): Likewise. * config/rl78/rl78-real.md (cbranchqi4_real_signed): New. (cbranchqi4_real): Add more constraint options. (cbranchhi4_real): Expand pattern. (cbranchhi4_real_signed): New. (cbranchhi4_real_inverted): New. (cbranchsi4_real_lt): New. (cbranchsi4_real_ge): New. (cbranchsi4_real_signed): New. (cbranchsi4_real): New. (peephole2): New. * config/rl78/rl78-virt.md (ashrsi3_virt): Add custom cases for constant shifts. (lshrsi3_virt): Likewise. (ashlsi3_virt): Likewise. (cbranchqi4_virt_signed): New. (cbranchhi4_virt_signed): New. (cbranchsi4_virt): New. * config/rl78/rl78.c: Whitespace fixes throughout. (move_elim_pass): New. (pass_data_rl78_move_elim): New. (pass_rl78_move_elim): New. (make_pass_rl78_move_elim): New. (rl78_devirt_info): Run devirt earlier. (rl78_move_elim_info): New. (rl78_asm_file_start): Register it. (rl78_split_movsi): New. (rl78_as_legitimate_address): Allow virtual base registers when appropriate. (rl78_addr_space_convert): Remove spurious debug stuff. (rl78_print_operand_1): Add z,s,S,r,E modifiers. (rl78_print_operand): More cases for not printing '#'. (rl78_expand_compare): Remove most of the logic. (content_memory): New. (clear_content_memory): New. (get_content_index): New. (get_content_name): New. (display_content_memory): New. (update_content): New. (record_content): New. (already_contains): New. (insn_ok_now): Re-recog insns with virtual registers. (add_postponed_content_update): New. (process_postponed_content_update): New. (gen_and_emit_move): New. (transcode_memory_rtx): Record new location content. Use gen_and_emit_move. (force_into_acc): New. (move_to_acc): Use gen_and_emit_move. (move_from_acc): Likewise. (move_acc_to_reg): Likewise. (move_to_x): Likewise. (move_to_hl): Likewise. (move_to_de): Likewise. (rl78_alloc_physical_registers_op1): Record location content. (has_constraint): New. (rl78_alloc_physical_registers_op2): Record location content. Optimize use of HL. (rl78_alloc_physical_registers_ro1): Likewise. (rl78_alloc_physical_registers_cmp): Likewise. (rl78_alloc_physical_registers_umul): Likewise. (rl78_alloc_address_registers_macax): New. (rl78_alloc_physical_registers): Initialize and set location content memory as needed. (rl78_reorg): Make sure split2 is called. (rl78_rtx_costs): New. Co-Authored-By: Nick Clifton <nickc@redhat.com> From-SVN: r202511
2013-09-11arm.md (arm_shiftsi3): New alternative l/l/M.Kyrylo Tkachov1-6/+6
[gcc/] * config/arm/arm.md (arm_shiftsi3): New alternative l/l/M. [gcc/testsuite] * gcc.target/arm/thumb-ifcvt-2.c: New test. From-SVN: r202493
2013-09-11constraints.md (k): New.Alexander Ivchenko5-62/+317
* config/i386/constraints.md (k): New. (Yk): Ditto. * config/i386/i386.c (const regclass_map): Add new mask registers. (dbx_register_map): Ditto. (dbx64_register_map): Ditto. (svr4_dbx_register_map): Ditto. (ix86_conditional_register_usage): Squash mask registers if AVX512F is disabled. (ix86_preferred_reload_class): Disable constants for mask registers. (ix86_secondary_reload): Do spill of mask register using 32-bit insn. (ix86_hard_regno_mode_ok): Support new mask registers. (x86_order_regs_for_local_alloc): Ditto. * config/i386/i386.h (FIRST_PSEUDO_REGISTER): Update. (FIXED_REGISTERS): Add new mask registers. (CALL_USED_REGISTERS): Ditto. (REG_ALLOC_ORDER): Ditto. (VALID_MASK_REG_MODE): New. (FIRST_MASK_REG): Ditto. (LAST_MASK_REG): Ditto. (reg_class): Add MASK_EVEX_REGS, MASK_REGS. (MAYBE_MASK_CLASS_P): New. (REG_CLASS_NAMES): Add MASK_EVEX_REGS, MASK_REGS. (REG_CLASS_CONTENTS): Ditto. (MASK_REGNO_P): New. (ANY_MASK_REG_P): Ditto. (HI_REGISTER_NAMES): Add new mask registers. * config/i386/i386.md (MASK0_REG, MASK1_REG, MASK2_REG, MASK3_REG, MASK4_REG, MASK5_REG, MASK6_REG, MASK7_REG): Constants for new mask registers. (attribute "type"): Add mskmov, msklog. (attribute "length_immediate"): Support them. (attribute "memory"): Ditto. (attribute "prefix_0f"): Ditto. (*movhi_internal): Support new mask registers. (*movqi_internal): Ditto. (define_split): Split out clobber pattern is a logic insn on mask registers. (*k<logic><mode>): New. (*andhi_1): Extend to support mask regs. (*andqi_1): Extend to support mask regs. (kandn<mode>): New. (define_split): Split and-not to and and not if operands are not mask regs. (*<code><mode>_1): Separate HI mode to new pattern... (*<code>hi_1): This. (*<code>qi_1): Extend to support mask regs. (kxnor<mode>): New. (kortestzhi): Ditto. (kortestchi): Ditto. (kunpckhi): Ditto. (*one_cmpl<mode>2_1): Remove HImode and handle it... (*one_cmplhi2_1): ...Here, now with mask registers support. (*one_cmplqi2_1): Support new mask registers. (HI/QImode arithmetics splitter): Don't split if mask registers are used. (HI/QImode not splitter): Ditto. * config/i386/predicated.md (mask_reg_operand): New. (general_reg_operand): Ditto. Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com> Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com> Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com> Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com> Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com> Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com> Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com> Co-Authored-By: Sergey Lega <sergey.s.lega@intel.com> From-SVN: r202491
2013-09-10re PR target/58361 (Wrong floating point code generated for ARM target)Richard Earnshaw1-13/+16
PR target/58361 * arm/vfp.md (combine_vcvt_f32_<FCVTI32typename>): Fix pattern to support conditional execution. (combine_vcvt_f64_<FCVTI32typename>): Likewise. From-SVN: r202475
2013-09-10[AArch64] Prevent generic pipeline description from dominating other ↵James Greenhalgh2-2/+12
pipeline descriptions. gcc/ * config/aarch64/aarch64.md (generic_sched): New. * config/aarch64/aarch64-generic.md (load): Make conditional on generic_sched attribute. (nonload): Likewise. From-SVN: r202448
2013-09-10invoke.texi (fms-extensions): Document changed behavior for ms-abi targets.Kai Tietz1-0/+6
* doc/invoke.texi (fms-extensions): Document changed behavior for ms-abi targets. * config/i386/i386.c (ix86_option_override_internal): Set default value of option -fms-extension for ms-abi targets. From-SVN: r202429
2013-09-10i386.c (ix86_expand_movmem): Fix epilogue generation.Michael Zolotukhin1-1/+1
gcc: * config/i386/i386.c (ix86_expand_movmem): Fix epilogue generation. gcc/testsuite: * gcc.dg/torture/memcpy-1.c: New test. From-SVN: r202423
2013-09-10re PR target/58330 (powerpc64 atomic store split in two)Alan Modra1-1/+3
PR target/58330 gcc/ * config/rs6000/rs6000.md (bswapdi2_64bit): Disable for volatile mems. gcc/testsuite/ * gcc.target/powerpc/pr58330.c: New. From-SVN: r202418
2013-09-10predicates.md (add_cint_operand): New.Alan Modra2-5/+11
gcc/ * config/rs6000/predicates.md (add_cint_operand): New. (reg_or_add_cint_operand, small_toc_ref): Use add_cint_operand. * config/rs6000/rs6000.md (largetoc_high_plus): Restrict offset using add_cint_operand. (largetoc_high_plus_aix): Likewise. gcc/testsuite/ * gcc.target/powerpc/medium_offset.c: New. From-SVN: r202417
2013-09-09[AArch64] obvious - Fix parameter to vrsqrte_f64James Greenhalgh1-4/+4
gcc/ * config/aarch64/arm_neon.h (vrsqrte_f64): Fix parameter type. From-SVN: r202407
2013-09-09Improve handling of constants destined for FP_REGS on AArch64Ian Bolton1-3/+11
From-SVN: r202403
2013-09-09aarch64.c (aarch64_select_cc_mode): Return CC_SWP for comparison with ↵Kyrylo Tkachov2-7/+8
negated operand. [gcc/] 2013-09-09 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * config/aarch64/aarch64.c (aarch64_select_cc_mode): Return CC_SWP for comparison with negated operand. * config/aarch64/aarch64.md (compare_neg<mode>): Match canonical RTL form. [gcc/testsuite/] 2013-09-09 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * gcc.target/aarch64/cmn-neg.c: New test. From-SVN: r202400
2013-09-06i386.c (ix86_hard_regno_mode_ok): AVX modes are valid only when AVX is enabled.Jan Hubicka1-1/+1
* i386.c (ix86_hard_regno_mode_ok): AVX modes are valid only when AVX is enabled. From-SVN: r202335
2013-09-06[AArch64] Use neon_<ldm,stm>_2 where appropriate as "type".James Greenhalgh1-4/+4
gcc/ * config/aarch64/aarch64.md (*movtf_aarch64): Use neon_<ls>dm_2 as type where v8type is fpsimd_<load/store>2. (load_pair<mode>): Likewise. (store_pair<mode>): Likewise. From-SVN: r202334
2013-09-06[AArch64, ARM] Introduce "mrs" type attribute.James Greenhalgh15-14/+17
gcc/ * config/arm/types.md (type): Add "mrs" type. * config/aarch64/aarch64.md (aarch64_load_tp_hard): Make type "mrs". * config/arm/arm.md (load_tp_hard): Make type "mrs". * config/arm/cortex-a15.md: Update with new attributes. * config/arm/cortex-a5.md: Update with new attributes. * config/arm/cortex-a53.md: Update with new attributes. * config/arm/cortex-a7.md: Update with new attributes. * config/arm/cortex-a8.md: Update with new attributes. * config/arm/cortex-a9.md: Update with new attributes. * config/arm/cortex-m4.md: Update with new attributes. * config/arm/cortex-r4.md: Update with new attributes. * config/arm/fa526.md: Update with new attributes. * config/arm/fa606te.md: Update with new attributes. * config/arm/fa626te.md: Update with new attributes. * config/arm/fa726te.md: Update with new attributes. From-SVN: r202333
2013-09-06[AArch64, ARM] Use "multiple" for type, where more than one instruction is ↵James Greenhalgh2-5/+5
used for a move gcc/ * config/aarch64/aarch64.md (*movti_aarch64): Use "multiple" for type where v8type is "move2". (*movtf_aarch64): Likewise. * config/arm/arm.md (thumb1_movdi_insn): Use "multiple" for type where more than one instruction is used for a move. (*arm32_movhf): Likewise. (*thumb_movdf_insn): Likewise. From-SVN: r202332
2013-09-06[AArch64, ARM] Rename the FCPYS type to FMOVJames Greenhalgh17-30/+30
gcc/ * config/arm/types.md (type): Rename fcpys to fmov. * config/arm/vfp.md (*arm_movsi_vfp): Rename type fcpys as fmov. (*thumb2_movsi_vfp): Likewise (*movhf_vfp_neon): Likewise (*movhf_vfp): Likewise (*movsf_vfp): Likewise (*thumb2_movsf_vfp): Likewise (*movsfcc_vfp): Likewise (*thumb2_movsfcc_vfp): Likewise * config/aarch64/aarch64-simd.md (move_lo_quad_<mode>): Replace type mov_reg with fmovs. * config/aarch64/aarch64.md (*movsi_aarch64): Replace type mov_reg with fmovs. (*movdi_aarch64): Likewise (*movsf_aarch64): Likewise (*movdf_aarch64): Likewise * config/arm/arm.c (cortexa7_older_only): Rename TYPE_FCPYS to TYPE_FMOV. * config/arm/iwmmxt.md (*iwmmxt_movsi_insn): Rename type fcpys as fmov. * config/arm/arm1020e.md: Update with new attributes. * config/arm/cortex-a15-neon.md: Update with new attributes. * config/arm/cortex-a5.md: Update with new attributes. * config/arm/cortex-a53.md: Update with new attributes. * config/arm/cortex-a7.md: Update with new attributes. * config/arm/cortex-a8-neon.md: Update with new attributes. * config/arm/cortex-a9.md: Update with new attributes. * config/arm/cortex-m4-fpu.md: Update with new attributes. * config/arm/cortex-r4f.md: Update with new attributes. * config/arm/marvell-pj4.md: Update with new attributes. * config/arm/vfp11.md: Update with new attributes. From-SVN: r202331
2013-09-06[Patch AArch64] Fix types for some multiply instructions.James Greenhalgh1-6/+6
gcc/ * config/aarch64/aarch64.md (*madd<mode>): Fix type attribute. (*maddsi_uxtw): Likewise. (*msub<mode>): Likewise. (*msubsi_uxtw): Likewise. (<su_optab>maddsidi4): Likewise. (<su_optab>msubsidi4): Likewise. From-SVN: r202330
2013-09-06[Patch ARM AARCH64] Split "type" attributes: fdivJames Greenhalgh15-25/+27
gcc/ * config/arm/types.md: Split fdiv<sd> as fsqrt<sd>, fdiv<sd>. * config/arm/arm.md (core_cycles): Remove fdiv. * config/arm/vfp.md: (*sqrtsf2_vfp): Update for attribute changes. (*sqrtdf2_vfp): Likewise. * config/aarch64/aarch64.md: (sqrt<mode>2): Update for attribute changes. * config/arm/arm1020e.md: Update with new attributes. * config/arm/cortex-a15-neon.md: Update with new attributes. * config/arm/cortex-a5.md: Update with new attributes. * config/arm/cortex-a53.md: Update with new attributes. * config/arm/cortex-a7.md: Update with new attributes. * config/arm/cortex-a8-neon.md: Update with new attributes. * config/arm/cortex-a9.md: Update with new attributes. * config/arm/cortex-m4-fpu.md: Update with new attributes. * config/arm/cortex-r4f.md: Update with new attributes. * config/arm/marvell-pj4.md: Update with new attributes. * config/arm/vfp11.md: Update with new attributes. From-SVN: r202329
2013-09-06[ARM,AARCH64] Insn type reclassification. Split f_cvt type.James Greenhalgh14-26/+34
gcc/ * config/arm/types.md (type): Split f_cvt as f_cvt, f_cvtf2i, f_cvti2f. * config/aarch64/aarch64.md (l<fcvt_pattern><su_optab><GPF:mode><GPI:mode>2): Update with new attributes. (fix_trunc<GPF:mode><GPI:mode>2): Likewise. (fixuns_trunc<GPF:mode><GPI:mode>2): Likewise. (float<GPI:mode><GPF:mode>2): Likewise. * config/arm/vfp.md (*truncsisf2_vfp): Update with new attributes. (*truncsidf2_vfp): Likewise. (fixuns_truncsfsi2): Likewise. (fixuns_truncdfsi2): Likewise. (*floatsisf2_vfp): Likewise. (*floatsidf2_vfp): Likewise. (floatunssisf2): Likewise. (floatunssidf2): Likewise. (*combine_vcvt_f32_<FCVTI32typename>): Likewise. (*combine_vcvt_f64_<FCVTI32typename>): Likewise. * config/arm/arm1020e.md: Update with new attributes. * config/arm/cortex-a15-neon.md: Update with new attributes. * config/arm/cortex-a5.md: Update with new attributes. * config/arm/cortex-a53.md: Update with new attributes. * config/arm/cortex-a7.md: Update with new attributes. * config/arm/cortex-a8-neon.md: Update with new attributes. * config/arm/cortex-a9.md: Update with new attributes. * config/arm/cortex-m4-fpu.md: Update with new attributes. * config/arm/cortex-r4f.md: Update with new attributes. * config/arm/marvell-pj4.md: Update with new attributes. * config/arm/vfp11.md: Update with new attributes. From-SVN: r202328
2013-09-06[AArch64] Fix types of second parameter to qtbl/qtbx intrinsicsJames Greenhalgh1-16/+16
gcc/ * config/aarch64/arm_neon.h (vqtbl<1,2,3,4><q>_s8): Fix control vector parameter type. (vqtbx<1,2,3,4><q>_s8): Likewise. gcc/testsuite/ * gcc.target/aarch64/table-intrinsics.c (qtbl_tests8_< ,2,3,4>): Fix control vector parameter type. (qtb_tests8_< ,2,3,4>): Likewise. (qtblq_tests8_< ,2,3,4>): Likewise. (qtbxq_tests8_< ,2,3,4>): Likewise. From-SVN: r202327
2013-09-06[Patch ARM] Add "type" attribute to Everything!James Greenhalgh21-260/+488
gcc/ * config/arm/types.md: Add "no_insn", "multiple" and "untyped" types. * config/arm/arm-fixed.md: Add type attribute to all insn patterns. * config/arm/vfp.md: Add type attribute to all insn patterns. * config/arm/arm.md: Add type attribute to all insn patterns. * config/arm/thumb2.md: Add type attribute to all insn patterns. * config/arm/arm1020e.md: Update with new attributes. * config/arm/arm1026ejs.md: Update with new attributes. * config/arm/arm1136jfs.md: Update with new attributes. * config/arm/arm926ejs.md: Update with new attributes. * config/arm/cortex-a15.md: Update with new attributes. * config/arm/cortex-a5.md: Update with new attributes. * config/arm/cortex-a53.md: Update with new attributes. * config/arm/cortex-a7.md: Update with new attributes. * config/arm/cortex-a8.md: Update with new attributes. * config/arm/cortex-a9.md: Update with new attributes. * config/arm/cortex-m4.md: Update with new attributes. * config/arm/cortex-r4.md: Update with new attributes. * config/arm/fa526.md: Update with new attributes. * config/arm/fa606te.md: Update with new attributes. * config/arm/fa626te.md: Update with new attributes. * config/arm/fa726te.md: Update with new attributes. From-SVN: r202323
2013-09-06[Patch AArch64] Fix register constraints for lane intrinsics.James Greenhalgh2-73/+73
gcc/ * config/aarch64/aarch64-simd.md (aarch64_sqdml<SBINQOPS:as>l_n<mode>_internal): Use <vwx> iterator to ensure correct register choice. (aarch64_sqdml<SBINQOPS:as>l2_n<mode>_internal): Likewise. (aarch64_sqdmull_n<mode>): Likewise. (aarch64_sqdmull2_n<mode>_internal): Likewise. * config/aarch64/arm_neon.h (vml<as><q>_lane<q>_<su>16): Use 'x' constraint for element vector. (vml<as><q>_n_<su>16): Likewise. (vml<as>l_high_lane<q>_<su>16): Likewise. (vml<as>l_high_n_<su>16): Likewise. (vml<as>l_lane<q>_<su>16): Likewise. (vml<as>l_n_<su>16): Likewise. (vmul<q>_lane<q>_<su>16): Likewise. (vmul<q>_n_<su>16): Likewise. (vmull_lane<q>_<su>16): Likewise. (vmull_n_<su>16): Likewise. (vmull_high_lane<q>_<su>16): Likewise. (vmull_high_n_<su>16): Likewise. (vqrdmulh<q>_n_s16): Likewise. From-SVN: r202322
2013-09-06arm_neon.h: Fix all vdup<bhsd_lane<q> intrinsics to have the correct lane ↵Tejas Belagod1-41/+41
parameter. 2013-09-06 Tejas Belagod <tejas.belagod@arm.com> gcc/ * config/aarch64/arm_neon.h: Fix all vdup<bhsd_lane<q> intrinsics to have the correct lane parameter. From-SVN: r202321
2013-09-06re PR target/58269 (ICE when building libobjc on x86_64-apple-darwin* after ↵Kirill Yukhin1-1/+1
revision 201915) PR target/58269 * config/i386/i386.c (ix86_conditional_register_usage): Proper initialize extended SSE registers. From-SVN: r202318
2013-09-062013-09-06 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>Andreas Krebbel2-2/+97
* config/s390/s390.md (UNSPEC_FPINT_FLOOR, UNSPEC_FPINT_BTRUNC) (UNSPEC_FPINT_ROUND, UNSPEC_FPINT_CEIL, UNSPEC_FPINT_NEARBYINT) (UNSPEC_FPINT_RINT): New constant definitions. (FPINT, fpint_name, fpint_roundingmode): New integer iterator definition with 2 attributes. ("<FPINT:fpint_name><BFP:mode>2", "rint<BFP:mode>2") ("<FPINT:fpint_name><DFP:mode>2", "rint<DFP:mode>2"): New pattern definitions. 2013-09-06 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> * gcc.target/s390/nearestint-1.c: New testcase. From-SVN: r202312
2013-09-06s390.md: Add "bcr_flush" value to mnemonic attribute.Andreas Krebbel2-5/+15
2013-09-06 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> * config/s390/s390.md: Add "bcr_flush" value to mnemonic attribute. ("mem_thread_fence_1"): Use bcr 14,0 for z196 and later. Set the mnemonic attribute to "bcr_flush". Set the "z196prop" attribute to "z196_alone". * config/s390/2827.md: Add "bcr_flush" to "ooo_groupalone" and "zEC12_simple". From-SVN: r202311
2013-09-05[AArch64] Fix categorisation of the frecp* insns.James Greenhalgh2-30/+14
gcc/ * config/aarch64/aarch64.md (type): Remove frecpe, frecps, frecpx. (aarch64_frecp<FRECP:frecp_suffix><mode>): Move to aarch64-simd.md, fix to be a TARGET_SIMD instruction. (aarch64_frecps): Remove. * config/aarch64/aarch64-simd.md (aarch64_frecp<FRECP:frecp_suffix><mode>): New, moved from aarch64.md (aarch64_frecps<mode>): Handle all float/vector of float modes. From-SVN: r202292
2013-09-05[AARCH64][Insn classification unification 3/N] ALU/shift typesJames Greenhalgh24-299/+528
2013-09-05 James Greenhalgh <james.greenhalgh@arm.com> Sofiane Naci <sofiane.naci@arm.com> * config/arm/types.md (define_attr "type"): Expand "arlo_imm" into "adr", "alu_imm", "alus_imm", "logic_imm", "logics_imm". Expand "arlo_reg" into "adc_reg", "adc_imm", "adcs_reg", "adcs_imm", "alu_ext", "alu_reg", "alus_ext", "alus_reg", "bfm", "csel", "logic_reg", "logics_reg", "rev". Expand "arlo_shift" into "alu_shift_imm", "alus_shift_imm", "logic_shift_imm", "logics_shift_imm". Expand "arlo_shift_reg" into "alu_shift_reg", "alus_shift_reg", "logic_shift_reg", "logics_shift_reg". Expand "clz" into "clz, "rbit". Rename "shift" to "shift_imm". * config/arm/arm.md (define_attr "core_cycles"): Update for attribute changes. Update for attribute changes all occurrences of arlo_* and shift* types. * config/arm/arm-fixed.md: Update for attribute changes all occurrences of arlo_* types. * config/arm/thumb2.md: Update for attribute changes all occurrences of arlo_* types. * config/arm/arm.c (xscale_sched_adjust_cost): (rtx insn, rtx (cortexa7_older_only): Likewise. (cortexa7_younger): Likewise. * config/arm/arm1020e.md (1020alu_op): Update for attribute changes. (1020alu_shift_op): Likewise. (1020alu_shift_reg_op): Likewise. * config/arm/arm1026ejs.md (alu_op): Update for attribute changes. (alu_shift_op): Likewise. (alu_shift_reg_op): Likewise. * config/arm/arm1136jfs.md (11_alu_op): Update for attribute changes. (11_alu_shift_op): Likewise. (11_alu_shift_reg_op): Likewise. * config/arm/arm926ejs.md (9_alu_op): Update for attribute changes. (9_alu_shift_reg_op): Likewise. * config/arm/cortex-a15.md (cortex_a15_alu): Update for attribute changes. (cortex_a15_alu_shift): Likewise. (cortex_a15_alu_shift_reg): Likewise. * config/arm/cortex-a5.md (cortex_a5_alu): Update for attribute changes. (cortex_a5_alu_shift): Likewise. * config/arm/cortex-a53.md (cortex_a53_alu): Update for attribute changes. (cortex_a53_alu_shift): Likewise. * config/arm/cortex-a7.md (cortex_a7_alu_imm): Update for attribute changes. (cortex_a7_alu_reg): Likewise. (cortex_a7_alu_shift): Likewise. * config/arm/cortex-a8.md (cortex_a8_alu): Update for attribute changes. (cortex_a8_alu_shift): Likewise. (cortex_a8_alu_shift_reg): Likewise. * config/arm/cortex-a9.md (cortex_a9_dp): Update for attribute changes. (cortex_a9_dp_shift): Likewise. * config/arm/cortex-m4.md (cortex_m4_alu): Update for attribute changes. * config/arm/cortex-r4.md (cortex_r4_alu): Update for attribute changes. (cortex_r4_mov): Likewise. (cortex_r4_alu_shift_reg): Likewise. * config/arm/fa526.md (526_alu_op): Update for attribute changes. (526_alu_shift_op): Likewise. * config/arm/fa606te.md (606te_alu_op): Update for attribute changes. * config/arm/fa626te.md (626te_alu_op): Update for attribute changes. (626te_alu_shift_op): Likewise. * config/arm/fa726te.md (726te_alu_op): Update for attribute changes. (726te_alu_shift_op): Likewise. (726te_alu_shift_reg_op): Likewise. * config/arm/fmp626.md (mp626_alu_op): Update for attribute changes. (mp626_alu_shift_op): Likewise. * config/arm/marvell-pj4.md (pj4_alu): Update for attribute changes. (pj4_alu_conds): Likewise. (pj4_shift): Likewise. (pj4_shift_conds): Likewise. (pj4_alu_shift): Likewise. (pj4_alu_shift_conds): Likewise. * config/aarch64/aarch64.md: Update for attribute change all occurrences of arlo_* and shift* types. Co-Authored-By: Sofiane Naci <sofiane.naci@arm.com> From-SVN: r202291
2013-09-05arm.c (thumb2_emit_strd_push): Rewrite to use pre-decrement on initial store.Richard Earnshaw2-95/+152
* arm.c (thumb2_emit_strd_push): Rewrite to use pre-decrement on initial store. * thumb2.md (thumb2_storewb_parisi): New pattern. From-SVN: r202279
2013-09-05[AArch64] Support the 'crc' extension in -march and -mcpu options.Yufeng Zhang2-0/+3
gcc/ * config/aarch64/aarch64-option-extensions.def: Add AARCH64_OPT_EXTENSION of 'crc'. * config/aarch64/aarch64.h (AARCH64_FL_CRC): New define. (AARCH64_ISA_CRC): Ditto. * doc/invoke.texi (-march and -mcpu feature modifiers): Add description of the CRC extension. From-SVN: r202275
2013-09-05linux64.h: Define OPTION_BIONIC and OPTION_UCLIBC.Alexander Ivchenko9-0/+26
* config/rs6000/linux64.h: Define OPTION_BIONIC and OPTION_UCLIBC. * config/rs6000/linux.h: Ditto. * alpha/linux.h: Ditto. * config/bfin/uclinux.h: Define TARGET_LIBC_HAS_FUNCTION as no_c99_libc_has_function. * config/c6x/uclinux-elf.h: Ditto. * config/lm32/uclinux-elf.h: Ditto. * config/m68k/uclinux.h: Ditto. * config/moxie/uclinux.h: Ditto. * config.gcc (bfin*-linux-uclibc*): Add t-linux-android to tmake_file. (crisv32-*-linux*, cris-*-linux*): Ditto. * config/bfin/bfin.c: Include "tm_p.h". From-SVN: r202274
2013-09-05[AArch64, AArch32][Insn classification refactoring 6/N] Remove "neon_type" ↵James Greenhalgh23-718/+707
attribute gcc/ * config/aarch64/aarch64.md: Rename r_2_f and f_2_r where appropriate. * config/arm/arm.md (attribute "neon_type"): Delete. Move attribute values to config/arm/types.md. Update patterns where appropriate. * config/arm/types.md (type): Add Neon types. * config/arm/neon.md: Remove "neon_type" attribute, use "type" attribute everywhere appropriate. * doc/md.texi: Change references to neon_type to refer to type. * config/arm/vfp.md: Update patterns for attribute changes. * config/arm/arm.c (cortexa7_older_only): Update for attribute change. * config/arm/arm1020e.md: Update for attribute change. * config/arm/cortex-a15-neon.md: Update for attribute change. * config/arm/cortex-a15.md: Update for attribute change. * config/arm/cortex-a5.md: Update for attribute change. * config/arm/cortex-a53.md: Update for attribute change. * config/arm/cortex-a7.md: Update for attribute change. * config/arm/cortex-a8-neon.md: Update for attribute change. * config/arm/cortex-a8.md: Update for attribute change. * config/arm/cortex-a9-neon.md: Update for attribute change. * config/arm/cortex-a9.md: Update for attribute change. * config/arm/cortex-m4-fpu.md: Update for attribute change. * config/arm/cortex-r4f.md: Update for attribute change. * config/arm/iterators.md: Update comment referring to neon_type. * config/arm/iwmmxt.md: Update for attribute change. * config/arm/marvell-pj4.md: Update for attribute change. * config/arm/neon-schedgen.ml (emit_insn_reservations): Update for attribute change. * config/arm/vfp11.md: Update for attribute change. Co-Authored-By: Sofiane Naci <sofiane.naci@arm.com> From-SVN: r202272
2013-09-04rs6000.h (ASM_OUTPUT_DEF_FROM_DECLS): Only emit lglobl if not weak.David Edelsohn1-6/+9
* config/rs6000/rs6000.h (ASM_OUTPUT_DEF_FROM_DECLS): Only emit lglobl if not weak. From-SVN: r202264
2013-09-04[AArch64] Obvious - Fix return types for vaddvq_<su>64James Greenhalgh1-2/+2
gcc/ * config/aarch64/arm_neon.h (vaddvq_<su>64): Fix return types. From-SVN: r202259
2013-09-04config/rx/rx.h: Add option -mcpu for target variants RX100 and RX200.Sandeep Kumar Singh1-0/+1
From-SVN: r202250
2013-09-03rs6000.h (ASM_OUTPUT_DEF_FROM_DECLS): Emit lglobl for function descriptor.David Edelsohn1-0/+3
* config/rs6000/rs6000.h (ASM_OUTPUT_DEF_FROM_DECLS): Emit lglobl for function descriptor. From-SVN: r202226
2013-09-03config.gcc (powerpc*-*-linux*): Add support for little-endian multilibs to ↵Alan Modra4-5/+22
big-endian target and vice versa. * config.gcc (powerpc*-*-linux*): Add support for little-endian multilibs to big-endian target and vice versa. * config/rs6000/t-linux64: Use := assignment on all vars. (MULTILIB_EXTRA_OPTS): Remove fPIC. (MULTILIB_OSDIRNAMES): Specify using mapping from multilib_options. * config/rs6000/t-linux64le: New file. * config/rs6000/t-linux64bele: New file. * config/rs6000/t-linux64lebe: New file. From-SVN: r202190
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