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| author | James Greenhalgh <james.greenhalgh@arm.com> | 2013-09-05 15:53:37 +0000 |
|---|---|---|
| committer | James Greenhalgh <jgreenhalgh@gcc.gnu.org> | 2013-09-05 15:53:37 +0000 |
| commit | fe6f68e2bb8ba87612605cc0f6b55b188f002491 (patch) | |
| tree | 8c8a2e49078948520f48b3ae7e0e4b606af7eb54 /gcc/config | |
| parent | 6e4150e1d402f8d1c8f23dfbdb5157978133c42f (diff) | |
| download | gcc-fe6f68e2bb8ba87612605cc0f6b55b188f002491.zip gcc-fe6f68e2bb8ba87612605cc0f6b55b188f002491.tar.gz gcc-fe6f68e2bb8ba87612605cc0f6b55b188f002491.tar.bz2 | |
[AArch64] Fix categorisation of the frecp* insns.
gcc/
* config/aarch64/aarch64.md
(type): Remove frecpe, frecps, frecpx.
(aarch64_frecp<FRECP:frecp_suffix><mode>): Move to aarch64-simd.md,
fix to be a TARGET_SIMD instruction.
(aarch64_frecps): Remove.
* config/aarch64/aarch64-simd.md
(aarch64_frecp<FRECP:frecp_suffix><mode>): New, moved from aarch64.md
(aarch64_frecps<mode>): Handle all float/vector of float modes.
From-SVN: r202292
Diffstat (limited to 'gcc/config')
| -rw-r--r-- | gcc/config/aarch64/aarch64-simd.md | 18 | ||||
| -rw-r--r-- | gcc/config/aarch64/aarch64.md | 26 |
2 files changed, 14 insertions, 30 deletions
diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md index f4b929e..c085fb9 100644 --- a/gcc/config/aarch64/aarch64-simd.md +++ b/gcc/config/aarch64/aarch64-simd.md @@ -4179,13 +4179,23 @@ (set_attr "simd_mode" "<MODE>")] ) +(define_insn "aarch64_frecp<FRECP:frecp_suffix><mode>" + [(set (match_operand:GPF 0 "register_operand" "=w") + (unspec:GPF [(match_operand:GPF 1 "register_operand" "w")] + FRECP))] + "TARGET_SIMD" + "frecp<FRECP:frecp_suffix>\\t%<s>0, %<s>1" + [(set_attr "simd_type" "simd_frecp<FRECP:frecp_suffix>") + (set_attr "mode" "<MODE>")] +) + (define_insn "aarch64_frecps<mode>" - [(set (match_operand:VDQF 0 "register_operand" "=w") - (unspec:VDQF [(match_operand:VDQF 1 "register_operand" "w") - (match_operand:VDQF 2 "register_operand" "w")] + [(set (match_operand:VALLF 0 "register_operand" "=w") + (unspec:VALLF [(match_operand:VALLF 1 "register_operand" "w") + (match_operand:VALLF 2 "register_operand" "w")] UNSPEC_FRECPS))] "TARGET_SIMD" - "frecps\\t%0.<Vtype>, %1.<Vtype>, %2.<Vtype>" + "frecps\\t%<v>0<Vmtype>, %<v>1<Vmtype>, %<v>2<Vmtype>" [(set_attr "simd_type" "simd_frecps") (set_attr "simd_mode" "<MODE>")] ) diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md index 6cdff87..4dfd2ab 100644 --- a/gcc/config/aarch64/aarch64.md +++ b/gcc/config/aarch64/aarch64.md @@ -240,9 +240,6 @@ fmovf2i,\ fmovi2f,\ fmul,\ - frecpe,\ - frecps,\ - frecpx,\ frint,\ fsqrt,\ load_acq,\ @@ -3946,29 +3943,6 @@ (set_attr "mode" "<MODE>")] ) -(define_insn "aarch64_frecp<FRECP:frecp_suffix><mode>" - [(set (match_operand:GPF 0 "register_operand" "=w") - (unspec:GPF [(match_operand:GPF 1 "register_operand" "w")] - FRECP))] - "TARGET_FLOAT" - "frecp<FRECP:frecp_suffix>\\t%<s>0, %<s>1" - [(set_attr "v8type" "frecp<FRECP:frecp_suffix>") - (set_attr "type" "ffarith<s>") - (set_attr "mode" "<MODE>")] -) - -(define_insn "aarch64_frecps<mode>" - [(set (match_operand:GPF 0 "register_operand" "=w") - (unspec:GPF [(match_operand:GPF 1 "register_operand" "w") - (match_operand:GPF 2 "register_operand" "w")] - UNSPEC_FRECPS))] - "TARGET_FLOAT" - "frecps\\t%<s>0, %<s>1, %<s>2" - [(set_attr "v8type" "frecps") - (set_attr "type" "ffarith<s>") - (set_attr "mode" "<MODE>")] -) - ;; ------------------------------------------------------------------- ;; Reload support ;; ------------------------------------------------------------------- |