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Files
Lines
2019-12-30
Arrange to preinclude yvals.h ahead of stdint on VxWorks 7
Olivier Hainque
2
-0
/
+40
2019-12-30
Add missing file expected with rev 279781
Olivier Hainque
1
-0
/
+37
2019-12-30
Add missing files expected with rev 279784
Olivier Hainque
6
-0
/
+207
2019-12-30
Add missing file expected with rev 279783
Olivier Hainque
1
-0
/
+54
2019-12-30
Add missing file expected with rev 279781
Olivier Hainque
1
-0
/
+32
2019-12-30
Simplify the compilation commands for config/vxworks.c
Olivier Hainque
1
-3
/
+3
2019-12-30
Setup TARGET_C_PREINCLUDE for VxWorks
Joel Brobecker
1
-0
/
+4
2019-12-30
Refine definitions for wchar_t/wint_t on VxWorks
Alexandre Oliva
1
-6
/
+21
2019-12-30
Identify sections in vx-common.h
Olivier Hainque
1
-6
/
+14
2019-12-30
Define STARTFILE_PREFIX_SPEC for powerpc VxWorks < 7
Doug Rupp
1
-0
/
+7
2019-12-30
Improve recursion protection for VxWorks limits.h
Olivier Hainque
1
-3
/
+34
2019-12-30
Fix builtin functions needlessly using VIEW_CONVERT_EXPRs on their operands.
Peter Bergner
2
-225
/
+386
2019-12-29
re PR target/93078 (Missing fma and round functions auto-vectorization with x...
Jakub Jelinek
3
-25
/
+18
2019-12-27
[AArch64] Fix typo in V_INT_CONTAINER
Richard Sandiford
1
-1
/
+1
2019-12-24
rs6000: re-enable web and rnreg with -funroll-loops
Jiufu Guo
1
-4
/
+11
2019-12-20
Rename signed integer 16/34-bit macros.
Michael Meissner
3
-14
/
+12
2019-12-20
re PR target/92841 (Optimize -fstack-protector-strong code generation a bit)
Jakub Jelinek
1
-3
/
+4
2019-12-20
re PR target/93002 (while(i--) optimization)
Jakub Jelinek
1
-0
/
+30
2019-12-19
Allow constants in amdgcn extends and truncates
Andrew Stubbs
1
-12
/
+12
2019-12-19
Use V64SI for all amdgcn add-with-carry insns
Andrew Stubbs
1
-7
/
+7
2019-12-19
[AArch64] Fix handling of npatterns>1 constants for partial SVE modes
Richard Sandiford
2
-4
/
+21
2019-12-19
Implement sub-dword add/sub on amdgcn
Andrew Stubbs
1
-16
/
+16
2019-12-19
[AArch64] Reject invalid subregs involving partial SVE modes
Richard Sandiford
1
-3
/
+22
2019-12-19
[AArch64] Handle arguments and return types with partial SVE modes
Richard Sandiford
1
-20
/
+75
2019-12-18
[AArch64] Fixup core tunings
Wilco Dijkstra
1
-6
/
+6
2019-12-18
* config/avr/avr-mcus.def: Typo.
Georg-Johann Lay
1
-21
/
+21
2019-12-17
Generate PADDI to add large constants if -mcpu=future.
Michael Meissner
2
-6
/
+9
2019-12-17
Use PLI to load up 32-bit SImode constants if -mcpu=future.
Michael Meissner
1
-8
/
+8
2019-12-17
Use PLI to load up large constants if -mcpu=future.
Michael Meissner
2
-6
/
+11
2019-12-17
re PR target/92841 (Optimize -fstack-protector-strong code generation a bit)
Jakub Jelinek
1
-2
/
+100
2019-12-17
[ARM] Add support for -mpure-code in thumb-1 (v6m)
Christophe Lyon
4
-19
/
+147
2019-12-17
Add extract_last for amdgcn
Andrew Stubbs
1
-0
/
+42
2019-12-17
Add clz and ctz for amdgcn
Andrew Stubbs
2
-2
/
+32
2019-12-17
Add abs pattern to handle {si,di} mode abs to avoid pmax/cmove conversion.
Hongyu Wang
3
-0
/
+48
2019-12-17
Use add for a = a + b and a = b + a when possible.
H.J. Lu
1
-9
/
+18
2019-12-16
rs6000: Use symbolic names for the CR fields in more cases
Segher Boessenkool
1
-2
/
+2
2019-12-16
MSP430: Add new msp430-elfbare target
Jozef Lawrynowicz
3
-2
/
+27
2019-12-16
Fix PR92950: Wrong code emitted for movv1qi
Andreas Krebbel
1
-7
/
+5
2019-12-14
[Darwin, PPC] Use Darwin9 bundle header for Rosetta builds.
Iain Sandoe
2
-11
/
+14
2019-12-13
[Darwin, PPC] Use Darwin9 dylib header for Rosetta builds.
Iain Sandoe
1
-0
/
+6
2019-12-13
Sub-dword vector multiply for amdgcn
Andrew Stubbs
1
-11
/
+11
2019-12-13
Sub-dword vector extend and truncate for amdgcn
Andrew Stubbs
2
-34
/
+142
2019-12-13
[AArch64] Enable CLI for Armv8.6-a: armv8.6-a, i8mm and bf16
Dennis Zhang
4
-6
/
+47
2019-12-13
[rs6000] Adjust vectorization cost for scalar COND_EXPR
Kewen Lin
1
-0
/
+24
2019-12-13
re PR target/92904 (varargs for __int128 is placed at an unaligned location a...
Jakub Jelinek
1
-0
/
+6
2019-12-12
Add support for some more AVR devices from avrxmega3 family.
Georg-Johann Lay
1
-0
/
+11
2019-12-12
[ARC] generate signaling FDCMPF for hard float comparisons
Vineet Gupta
5
-3
/
+33
2019-12-12
[ARC] Use hardware support for double-precision compare instructions.
Claudiu Zissulescu
1
-2
/
+2
2019-12-11
MSP430: Add -fno-exceptions multilib
Jozef Lawrynowicz
2
-6
/
+14
2019-12-11
arm: Fix an incorrect warning when -mcpu=cortex-a55 is used with -mfloat-abi=...
Richard Earnshaw
2
-28
/
+41
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