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2019-12-30Arrange to preinclude yvals.h ahead of stdint on VxWorks 7Olivier Hainque2-0/+40
2019-12-30Add missing file expected with rev 279781Olivier Hainque1-0/+37
2019-12-30Add missing files expected with rev 279784Olivier Hainque6-0/+207
2019-12-30Add missing file expected with rev 279783Olivier Hainque1-0/+54
2019-12-30Add missing file expected with rev 279781Olivier Hainque1-0/+32
2019-12-30Simplify the compilation commands for config/vxworks.cOlivier Hainque1-3/+3
2019-12-30Setup TARGET_C_PREINCLUDE for VxWorksJoel Brobecker1-0/+4
2019-12-30Refine definitions for wchar_t/wint_t on VxWorksAlexandre Oliva1-6/+21
2019-12-30Identify sections in vx-common.hOlivier Hainque1-6/+14
2019-12-30Define STARTFILE_PREFIX_SPEC for powerpc VxWorks < 7Doug Rupp1-0/+7
2019-12-30Improve recursion protection for VxWorks limits.hOlivier Hainque1-3/+34
2019-12-30Fix builtin functions needlessly using VIEW_CONVERT_EXPRs on their operands.Peter Bergner2-225/+386
2019-12-29re PR target/93078 (Missing fma and round functions auto-vectorization with x...Jakub Jelinek3-25/+18
2019-12-27[AArch64] Fix typo in V_INT_CONTAINERRichard Sandiford1-1/+1
2019-12-24rs6000: re-enable web and rnreg with -funroll-loopsJiufu Guo1-4/+11
2019-12-20Rename signed integer 16/34-bit macros.Michael Meissner3-14/+12
2019-12-20re PR target/92841 (Optimize -fstack-protector-strong code generation a bit)Jakub Jelinek1-3/+4
2019-12-20re PR target/93002 (while(i--) optimization)Jakub Jelinek1-0/+30
2019-12-19Allow constants in amdgcn extends and truncatesAndrew Stubbs1-12/+12
2019-12-19Use V64SI for all amdgcn add-with-carry insnsAndrew Stubbs1-7/+7
2019-12-19[AArch64] Fix handling of npatterns>1 constants for partial SVE modesRichard Sandiford2-4/+21
2019-12-19Implement sub-dword add/sub on amdgcnAndrew Stubbs1-16/+16
2019-12-19[AArch64] Reject invalid subregs involving partial SVE modesRichard Sandiford1-3/+22
2019-12-19[AArch64] Handle arguments and return types with partial SVE modesRichard Sandiford1-20/+75
2019-12-18[AArch64] Fixup core tuningsWilco Dijkstra1-6/+6
2019-12-18* config/avr/avr-mcus.def: Typo.Georg-Johann Lay1-21/+21
2019-12-17Generate PADDI to add large constants if -mcpu=future.Michael Meissner2-6/+9
2019-12-17Use PLI to load up 32-bit SImode constants if -mcpu=future.Michael Meissner1-8/+8
2019-12-17Use PLI to load up large constants if -mcpu=future.Michael Meissner2-6/+11
2019-12-17re PR target/92841 (Optimize -fstack-protector-strong code generation a bit)Jakub Jelinek1-2/+100
2019-12-17[ARM] Add support for -mpure-code in thumb-1 (v6m)Christophe Lyon4-19/+147
2019-12-17Add extract_last for amdgcnAndrew Stubbs1-0/+42
2019-12-17Add clz and ctz for amdgcnAndrew Stubbs2-2/+32
2019-12-17Add abs pattern to handle {si,di} mode abs to avoid pmax/cmove conversion.Hongyu Wang3-0/+48
2019-12-17Use add for a = a + b and a = b + a when possible.H.J. Lu1-9/+18
2019-12-16rs6000: Use symbolic names for the CR fields in more casesSegher Boessenkool1-2/+2
2019-12-16MSP430: Add new msp430-elfbare targetJozef Lawrynowicz3-2/+27
2019-12-16Fix PR92950: Wrong code emitted for movv1qiAndreas Krebbel1-7/+5
2019-12-14[Darwin, PPC] Use Darwin9 bundle header for Rosetta builds.Iain Sandoe2-11/+14
2019-12-13[Darwin, PPC] Use Darwin9 dylib header for Rosetta builds.Iain Sandoe1-0/+6
2019-12-13Sub-dword vector multiply for amdgcnAndrew Stubbs1-11/+11
2019-12-13Sub-dword vector extend and truncate for amdgcnAndrew Stubbs2-34/+142
2019-12-13[AArch64] Enable CLI for Armv8.6-a: armv8.6-a, i8mm and bf16Dennis Zhang4-6/+47
2019-12-13[rs6000] Adjust vectorization cost for scalar COND_EXPRKewen Lin1-0/+24
2019-12-13re PR target/92904 (varargs for __int128 is placed at an unaligned location a...Jakub Jelinek1-0/+6
2019-12-12Add support for some more AVR devices from avrxmega3 family.Georg-Johann Lay1-0/+11
2019-12-12[ARC] generate signaling FDCMPF for hard float comparisonsVineet Gupta5-3/+33
2019-12-12[ARC] Use hardware support for double-precision compare instructions.Claudiu Zissulescu1-2/+2
2019-12-11MSP430: Add -fno-exceptions multilibJozef Lawrynowicz2-6/+14
2019-12-11arm: Fix an incorrect warning when -mcpu=cortex-a55 is used with -mfloat-abi=...Richard Earnshaw2-28/+41
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