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2015-12-03Add cost model for Exynos M1Evandro Menezes5-2/+194
2015-12-03Add an rsqrt_optab and IFN_RSQRT internal functionRichard Sandiford6-155/+106
2015-12-03Fix some issues with the ROP patch (PR 68471, 68472)Bernd Schmidt2-1/+3
2015-12-03nvptx-protos.h (npvptx_section_from_addr_space): Delete.Nathan Sidwell4-182/+116
2015-12-02configure.ac: Check assembler support for R_PPC64_ENTRY relocation.Ulrich Weigand1-10/+80
2015-12-02nvptx.c (enum nvptx_shuffle_kind): New.Nathan Sidwell1-9/+16
2015-12-02mips.c (mips_emit_probe_stack_range): Adjust.Eric Botcazou1-16/+10
2015-12-02aarch64.md: New pattern.David Sherwood3-0/+32
2015-12-02nvptx-protos.h (nvptx_output_mov_insn): Declare.Nathan Sidwell4-235/+111
2015-12-02AVX-512. Split out mask version for vec_extract_hi_<mode>.Kirill Yukhin1-18/+26
2015-12-02rs6000: Optimise SImode cstore on 64-bitSegher Boessenkool1-0/+50
2015-12-02PR 68432: Add a target hook to control size/speed optab choicesRichard Sandiford2-68/+47
2015-12-02S/390: Make constant checking more strictAndreas Krebbel4-109/+114
2015-12-02S/390: vec_set mode DI->SI for shift_countAndreas Krebbel1-1/+1
2015-12-02S/390: Fix vec_splat_* builtins.Andreas Krebbel4-8/+29
2015-12-02S/390: Sort builtin types - cleanup only.Andreas Krebbel1-511/+511
2015-12-02S/390: Fix RT flag in vstrc instruction.Andreas Krebbel1-16/+8
2015-12-02S/390: Enable vrepi constants.Andreas Krebbel3-30/+49
2015-12-02S/390: Fix vrepi constraint letter.Andreas Krebbel1-2/+2
2015-12-02S/390: Further bswap enhancements.Andreas Krebbel1-10/+28
2015-12-01freebsd64.h (ELFv2_ABI_CHECK): Add new macro.Andreas Tobler1-0/+13
2015-12-01nvptx-protos.h (nvptx_output_aligned_decl): Declare.Nathan Sidwell3-46/+60
2015-12-01nvptx.c (nvptx_function_arg_advance): Don't consider mode.Nathan Sidwell1-7/+5
2015-12-01rs6000.c (const_load_sequence_p): Handle extra indirection for large and smal...Bill Schmidt1-2/+16
2015-12-01re PR target/68617 (arm ice output_operand: invalid %-code for -march=armv6k...Christian Bruel4-27/+26
2015-12-01Fix typo in aarch64.cRamana Radhakrishnan1-1/+1
2015-11-30re PR tree-optimization/68501 (sqrt builtin is not used anymore)Jakub Jelinek3-14/+68
2015-11-30nvptx.c (nvptx_name_replacement): Move earlier.Nathan Sidwell1-138/+116
2015-11-30[AVX-512] Enable QI-mode mask logic patterns on non-AVX-512DQ targets.Kirill Yukhin1-3/+6
2015-11-30re PR target/28115 (possible bug in recog_memoized usage in rs6000.c??)Eric Botcazou1-3/+3
2015-11-29nvptx.md (const_0_operand, [...]): Delete.Nathan Sidwell1-21/+1
2015-11-29re PR target/28115 (possible bug in recog_memoized usage in rs6000.c??)David Edelsohn1-2/+2
2015-11-28nvptx.h (FIRST_PARM_OFFSET): Add void cast.Nathan Sidwell1-4/+6
2015-11-27nvptx-protos.h (nvptx_addr_space_from_address): Don't declare.Nathan Sidwell2-38/+46
2015-11-27nvptx-protos.h (nvptx_record_needed_decl): Don't declaree.Nathan Sidwell3-142/+131
2015-11-26[AArch64] Add NEON intrinsics vqrdmlah_lane and vqrdmlsh_lane.Matthew Wahab1-0/+168
2015-11-26[AArch64] Add NEON intrinsics vqrdmlah and vqrdmlsh.Matthew Wahab1-0/+53
2015-11-26[AArch64] Add ACLE feature macro for ARMv8.1 Adv.SIMD instructions.Matthew Wahab1-0/+1
2015-11-26aarch64-simd-builtins.def: Add missing changes from r230962.Matthew Wahab1-0/+14
2015-11-26nvptx.c (write_func_decl_from_insn): Replace callee arg with name.Nathan Sidwell1-107/+58
2015-11-26[AArch64] Add sqrdmah, sqrdmsh instructions.Matthew Wahab2-2/+98
2015-11-26[AArch64] Add support for ARMv8.1 Adv.SIMD instructions.Matthew Wahab1-0/+4
2015-11-26re PR target/68416 ([MPX] GCC emits a lot of redundant bndmov instructions)Ilya Enkovich1-1/+1
2015-11-26[AArch64] Update patterns to support FP zeroWilco Dijkstra2-13/+13
2015-11-25<patch #10>Michael Meissner4-31/+78
2015-11-25nvptx.md (load_arg_reg<mode>): Arg number constraint is 'n'.Nathan Sidwell2-23/+18
2015-11-25nvptx.c (walk_args_for_params): Delete.Nathan Sidwell1-82/+69
2015-11-25rs6000.c (rs6000_declare_alias): Rename and globalize both the symbol and the...David Edelsohn1-10/+14
2015-11-25Port libvtv to SolarisRainer Orth1-8/+28
2015-11-252015-11-24 Michael Collison <michael.collison@linaro.org>Michael Collison2-0/+80
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