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AgeCommit message (Expand)AuthorFilesLines
2015-12-01Fix typo in aarch64.cRamana Radhakrishnan1-1/+1
2015-11-30re PR tree-optimization/68501 (sqrt builtin is not used anymore)Jakub Jelinek3-14/+68
2015-11-30nvptx.c (nvptx_name_replacement): Move earlier.Nathan Sidwell1-138/+116
2015-11-30[AVX-512] Enable QI-mode mask logic patterns on non-AVX-512DQ targets.Kirill Yukhin1-3/+6
2015-11-30re PR target/28115 (possible bug in recog_memoized usage in rs6000.c??)Eric Botcazou1-3/+3
2015-11-29nvptx.md (const_0_operand, [...]): Delete.Nathan Sidwell1-21/+1
2015-11-29re PR target/28115 (possible bug in recog_memoized usage in rs6000.c??)David Edelsohn1-2/+2
2015-11-28nvptx.h (FIRST_PARM_OFFSET): Add void cast.Nathan Sidwell1-4/+6
2015-11-27nvptx-protos.h (nvptx_addr_space_from_address): Don't declare.Nathan Sidwell2-38/+46
2015-11-27nvptx-protos.h (nvptx_record_needed_decl): Don't declaree.Nathan Sidwell3-142/+131
2015-11-26[AArch64] Add NEON intrinsics vqrdmlah_lane and vqrdmlsh_lane.Matthew Wahab1-0/+168
2015-11-26[AArch64] Add NEON intrinsics vqrdmlah and vqrdmlsh.Matthew Wahab1-0/+53
2015-11-26[AArch64] Add ACLE feature macro for ARMv8.1 Adv.SIMD instructions.Matthew Wahab1-0/+1
2015-11-26aarch64-simd-builtins.def: Add missing changes from r230962.Matthew Wahab1-0/+14
2015-11-26nvptx.c (write_func_decl_from_insn): Replace callee arg with name.Nathan Sidwell1-107/+58
2015-11-26[AArch64] Add sqrdmah, sqrdmsh instructions.Matthew Wahab2-2/+98
2015-11-26[AArch64] Add support for ARMv8.1 Adv.SIMD instructions.Matthew Wahab1-0/+4
2015-11-26re PR target/68416 ([MPX] GCC emits a lot of redundant bndmov instructions)Ilya Enkovich1-1/+1
2015-11-26[AArch64] Update patterns to support FP zeroWilco Dijkstra2-13/+13
2015-11-25<patch #10>Michael Meissner4-31/+78
2015-11-25nvptx.md (load_arg_reg<mode>): Arg number constraint is 'n'.Nathan Sidwell2-23/+18
2015-11-25nvptx.c (walk_args_for_params): Delete.Nathan Sidwell1-82/+69
2015-11-25rs6000.c (rs6000_declare_alias): Rename and globalize both the symbol and the...David Edelsohn1-10/+14
2015-11-25Port libvtv to SolarisRainer Orth1-8/+28
2015-11-252015-11-24 Michael Collison <michael.collison@linaro.org>Michael Collison2-0/+80
2015-11-24frame-header-opt.c (gate): Check for optimize > 0.Steve Ellcey3-16/+132
2015-11-24nvptx.c (maybe_split_mode): Return new mode or VOIDmode, don't alter incoming...Nathan Sidwell1-76/+62
2015-11-24rs6000.md (lround<mode>di2): Remove constraints.Michael Meissner1-2/+2
2015-11-24rs6000.md (UNSPEC_XSRDPI): New unspec.David Edelsohn1-38/+68
2015-11-24[PATCH][AArch64] Improve add immediate expansionWilco Dijkstra1-19/+35
2015-11-24rs6000: Fix for and_operand oversight (PR68332, PR67677)Segher Boessenkool1-1/+2
2015-11-24[AArch64][v2] Improve comparison with complex immediates followed by branch/csetKyrylo Tkachov3-3/+78
2015-11-24Fix PR68497 (ICE with -fno-checking)Mikhail Maltsev1-12/+14
2015-11-23Add uaddv4_optab and usubv4_optabRichard Henderson2-4/+76
2015-11-23[AArch64] PR target/68363 Check that argument is real INSN in aarch64_madd_ne...Kyrylo Tkachov1-1/+1
2015-11-23[AARCH64] Adding constant folding for __builtin_fmulx* with scalar 32 and 64 ...Bilyan Borisov1-2/+49
2015-11-23S/390: Fix symbol ref alignmentRobin Dapp3-28/+76
2015-11-22re PR target/68390 (Incorrect code due to indirect tail call of varargs funct...Kugan Vivekanandarajah1-1/+6
2015-11-22[AARCH64][PATCH 2/3] Implementing vmulx_lane NEON intrinsic variantsBilyan Borisov2-26/+146
2015-11-21* config/nvptx/nvptx.md (clz<mode>2): Use operand 1 for type.Nathan Sidwell1-1/+1
2015-11-21nvptx.c (write_function_decl_and_comment): Print leading blank line.Nathan Sidwell2-11/+12
2015-11-20sparc.md (umulxhi_vis): Move around.Eric Botcazou1-174/+149
2015-11-20[AArch64] Add attribute for compatibility with ARM pipeline modelsEvandro Menezes2-0/+7
2015-11-20[ARM] Do not expand movmisalign pattern if not in 32-bit modeKyrylo Tkachov2-7/+8
2015-11-20[ARM] PR 68149 Fix ICE in unaligned_loaddi splitKyrylo Tkachov2-57/+24
2015-11-20nvptx.c (nvptx_use_anchors_for_symbol_p): New.Nathan Sidwell1-0/+16
2015-11-20S/390: Add bswaphi2 patternAndreas Krebbel1-0/+10
2015-11-20S/390: Clobber r1 in patterns resulting in pfpo instruction.Dominik Vogt1-8/+17
2015-11-19nvptx.h (SUPPORTS_WEAK): Define.Nathan Sidwell2-3/+5
2015-11-19revert: rs6000.c (use_toc_relative_ref): Ignore type-limits warning.David Edelsohn1-5/+0
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