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2022-05-30i386: Remove constraints when used with constant integer predicates, take 2Uros Bizjak5-246/+246
2022-05-30x86: correct bmi2_umul<mode><dwi>3_1's MEM_P() usesJan Beulich1-1/+1
2022-05-30[ARM] Fix prototype for vec_perm_const hook.Prathamesh Kulkarni1-2/+2
2022-05-29Darwin: Fix empty g++ command lines [PR105599].Iain Sandoe1-11/+6
2022-05-28[PATCH 1/2] avr: Added AVR-DA and DB MCU seriesJoel Holdsworth3-2/+24
2022-05-28Fix ICE on shVladimir Makarov1-0/+6
2022-05-28Darwin: Amend REAL_LIBGCC_SPEC comment [NFC].Iain Sandoe1-25/+13
2022-05-27Pre-reload splitter to transform and;cmp into not;test on x86.Roger Sayle1-0/+21
2022-05-26xtensa: Improve bswap[sd]i2 insn patternsTakayuki 'January June' Suwa1-16/+61
2022-05-26xtensa: Add setmemsi insn patternTakayuki 'January June' Suwa4-1/+230
2022-05-26xtensa: Fix instruction counting regarding block move expansionTakayuki 'January June' Suwa1-4/+4
2022-05-26xtensa: Make use of IN_RANGE macro where appropriateTakayuki 'January June' Suwa4-16/+15
2022-05-26xtensa: Simplify EXTUI instruction maskimm validationsTakayuki 'January June' Suwa2-22/+4
2022-05-25RISC-V: Don't unconditionally add m,a,f,d in arch-canonicalizeSimon Cook1-1/+1
2022-05-25Add new parameter to vec_perm_const hook for specifying operand mode.Prathamesh Kulkarni11-25/+64
2022-05-24x86: Document -mcet-switchH.J. Lu1-1/+1
2022-05-24amdgcn: Add gfx90a supportAndrew Stubbs8-22/+91
2022-05-24amdgcn: Remove LLVM 9 assembler/linker supportAndrew Stubbs4-199/+26
2022-05-24Optimize double word negation of zero extended values on x86.Roger Sayle1-0/+40
2022-05-24PR tree-optimization/105668: Provide vcond_mask_v1tiv1ti pattern.Roger Sayle2-11/+12
2022-05-24RISC-V: Cache Management Operation instructionsShiYulong5-0/+98
2022-05-24RISC-V: Add mininal support for Zicbo[mzp]ShiYulong2-0/+11
2022-05-24RISC-V: Inhibit FP <--> int register moves via tune paramVineet Gupta1-0/+9
2022-05-24rs6000: Skip debug insns for union [PR105627]Kewen Lin1-4/+6
2022-05-23RISC-V: Enable TARGET_SUPPORTS_WIDE_INTVineet Gupta3-1/+9
2022-05-23[x86_64]: Zhaoxin lujiazui enablementMayshao10-45/+1045
2022-05-23tilepro: fix missing ARRAY_SIZE macroMartin Liska1-0/+2
2022-05-23Some additional ix86_rtx_costs clean-ups: NEG, AND, andn and pandn.Roger Sayle1-39/+94
2022-05-23RISC-V: Fix canonical extension order (K and J)Tsukasa OI1-1/+1
2022-05-23Increase move cost between mask and gpr.liuhongt1-2/+2
2022-05-20AArch64: Improve rotate patternsWilco Dijkstra2-65/+125
2022-05-20AArch64: Cleanup CPU option processing codeWilco Dijkstra2-93/+31
2022-05-20Use "final" and "override" directly, rather than via macrosDavid Malcolm4-384/+384
2022-05-20aarch64: Add backend support for DFPChristophe Lyon3-51/+89
2022-05-19[PATCH, rs6000] Remove the (no longer used) BTC defines.Will Schmidt2-51/+4
2022-05-18x86: Fix -fsplit-stack feature detection via TARGET_CAN_SPLIT_STACKUros Bizjak2-4/+6
2022-05-18Correct ix86_rtx_cost for multi-word multiplication.Roger Sayle1-1/+11
2022-05-18Avoid andn and generate shorter not;and with -Oz on x86.Roger Sayle1-0/+34
2022-05-18This patch adds a combine pattern for "CA minus one". The SImode "CA minus on...Haochen Gui1-0/+13
2022-05-18recognize bzhi pattern when there's zero_extendsidi.liuhongt1-0/+16
2022-05-18Expand __builtin_memcmp_eq with ptest for OImode.liuhongt2-1/+25
2022-05-17rs6000: Prefer assigning the MMA vector operands to altivec registers [PR105556]Peter Bergner1-75/+75
2022-05-17Fix register count when not splitting Complex IEEE 128-bit args.Pat Haugen1-0/+6
2022-05-17Revert 'Use more ARRAY_SIZE.' for mkoffloadTobias Burnus2-4/+4
2022-05-17i386: Fix ICE in final_scan_insn_1 [PR105624]Uros Bizjak5-249/+249
2022-05-17gcn/t-omp-device: Add 'amdgcn' as 'arch' [PR105602]Tobias Burnus2-2/+2
2022-05-17i386: Fix up V2DI and V1TI inequality comparisons [PR105613]Jakub Jelinek1-2/+8
2022-05-17Optimize vpermtiw/b to vpunpcklqdq for certain cases.liuhongt1-5/+59
2022-05-16Use more ARRAY_SIZE.Martin Liska14-25/+25
2022-05-16Fix ICE caused by wrong condition.liuhongt1-7/+2
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